From nobody Sun May 19 03:38:26 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+103633+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+103633+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1682496208; cv=none; d=zohomail.com; s=zohoarc; b=b+GOGqYm7e/3fFxM6M7nAavtCG13QxrzkSj5klc0gLTGyLw4/goICgZenTowcQ1SAe6f7Wo2JihBzTQDQRW+gwUoulD0SC0nDd/0co48kEV4PatdXNRayc/LjpC5FZxzf8HMUwFHyniBxoHQ30o2pYf2K9kR/q19U9iu9lr94IY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1682496208; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=vvmlfI1sdguF4Yx64t7DNSRpNRmnQePhLfWWtdrKC7s=; b=RWLwZXBLIBVgWtM9ZVqX5cpXvQNYlLpWkF9sB2uHK/T92G9A+APD3zci4Pjbvm0M7n1t2pidBjo521BTWztKa7zJlHpclwaMTztJGFqMi2yH5TdHeaX0S64Lbc/cMZ4zw8B9xq5U84QrQg2zrFrqsk8iiBID89RFmLirHUHmvkU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+103633+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1682496208010858.5804360108147; Wed, 26 Apr 2023 01:03:28 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id qU13YY1788612x9TM117xcNI; Wed, 26 Apr 2023 01:03:27 -0700 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.2867.1682496203492988182 for ; Wed, 26 Apr 2023 01:03:27 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10691"; a="433315638" X-IronPort-AV: E=Sophos;i="5.99,227,1677571200"; d="scan'208";a="433315638" X-Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2023 01:03:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10691"; a="763218438" X-IronPort-AV: E=Sophos;i="5.99,227,1677571200"; d="scan'208";a="763218438" X-Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.92]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2023 01:03:25 -0700 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Xiao X Chen Subject: [edk2-devel] [Patch V4 1/2] UefiCpuPkg: Update code to support enable ProcTrace only on BSP Date: Wed, 26 Apr 2023 16:03:09 +0800 Message-Id: <20230426080310.3548-2-dun.tan@intel.com> In-Reply-To: <20230426080310.3548-1-dun.tan@intel.com> References: <20230426080310.3548-1-dun.tan@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,dun.tan@intel.com X-Gm-Message-State: 3cfMkYlFofWT97vKPUm1Ubmwx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1682496207; bh=aVKJ3ltT0N6Mz3TXJ0d5XwRwXE38uucRLA6vGvx9ywY=; h=Cc:Date:From:Reply-To:Subject:To; b=X2p2zG8/8kSXf6CUBpyJRV1WbrgkJcKNZ2EKXokgy7pDau0ZlRAVcQr83ulMesRomkS n5yXxQZiZ93GDvtDpL/NvbuYGiwSVhxAj5zm+wPXpiY318esTJXbK82Qx65uAQwPlXQQE 5Ly9iV2xnCMBQR59qIspqMHob+efuoen/hI= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1682496209954100002 Content-Type: text/plain; charset="utf-8" Update code to support enable ProcTrace only on BSP. Add a new dynamic PCD to indicate if enable ProcTrace only on BSP. In ProcTrace.c code, if this new PCD is true, only allocate buffer and set CtrlReg.Bits.TraceEn to 1 for BSP. Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4423 Signed-off-by: Dun Tan Cc: Eric Dong Reviewed-by: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Xiao X Chen --- UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 3 ++- UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 174 +++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++++++++++++++-------------------------------------------= --------------------- UefiCpuPkg/UefiCpuPkg.dec | 7 +++= ++++ 3 files changed, 119 insertions(+), 65 deletions(-) diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.i= nf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf index 7fbcd8da0e..d803012ce2 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf @@ -4,7 +4,7 @@ # This library registers CPU features defined in Intel(R) 64 and IA-32 # Architectures Software Developer's Manual. # -# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -62,3 +62,4 @@ gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset ## SOMETIMES_= CONSUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ## SOMETIMES_= CONSUMES gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ## SOMETIMES_= CONSUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ## SOMETIMES_= CONSUMES diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c b/UefiCpuP= kg/Library/CpuCommonFeaturesLib/ProcTrace.c index 04e6a60728..92d6f54b42 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c @@ -1,7 +1,7 @@ /** @file Intel Processor Trace feature. =20 - Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2017 - 2023, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -46,6 +46,8 @@ typedef struct { =20 UINTN *TopaMemArray; =20 + BOOLEAN EnableOnBspOnly; + PROC_TRACE_PROCESSOR_DATA *ProcessorData; } PROC_TRACE_DATA; =20 @@ -77,6 +79,7 @@ ProcTraceGetConfigData ( ConfigData->NumberOfProcessors =3D (UINT32)NumberOfProcessors; ConfigData->ProcTraceMemSize =3D PcdGet32 (PcdCpuProcTraceMemSize); ConfigData->ProcTraceOutputScheme =3D PcdGet8 (PcdCpuProcTraceOutputSche= me); + ConfigData->EnableOnBspOnly =3D PcdGetBool (PcdCpuProcTraceBspOnly= ); =20 return ConfigData; } @@ -188,6 +191,7 @@ ProcTraceInitialize ( MSR_IA32_RTIT_OUTPUT_BASE_REGISTER OutputBaseReg; MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTER OutputMaskPtrsReg; RTIT_TOPA_TABLE_ENTRY *TopaEntryPtr; + BOOLEAN IsBsp; =20 // // The scope of the MSR_IA32_RTIT_* is core for below processor type, on= ly program @@ -236,6 +240,12 @@ ProcTraceInitialize ( return RETURN_SUCCESS; } =20 + IsBsp =3D (CpuInfo->ProcessorInfo.StatusFlag & PROCESSOR_AS_BSP_BIT) ? T= RUE : FALSE; + + if (ProcTraceData->EnableOnBspOnly && !IsBsp) { + return RETURN_SUCCESS; + } + MemRegionBaseAddr =3D 0; FirstIn =3D FALSE; =20 @@ -260,43 +270,62 @@ ProcTraceInitialize ( // address base in MSR, IA32_RTIT_OUTPUT_BASE (560h) bits 47:12. Not= e that all regions must be // aligned based on their size, not just 4K. Thus a 2M region must h= ave bits 20:12 cleared. // - ThreadMemRegionTable =3D (UINTN *)AllocatePool (ProcTraceData->NumberO= fProcessors * sizeof (UINTN *)); - if (ThreadMemRegionTable =3D=3D NULL) { - DEBUG ((DEBUG_ERROR, "Allocate ProcTrace ThreadMemRegionTable Failed= \n")); - return RETURN_OUT_OF_RESOURCES; - } =20 - ProcTraceData->ThreadMemRegionTable =3D ThreadMemRegionTable; - - for (Index =3D 0; Index < ProcTraceData->NumberOfProcessors; Index++, = ProcTraceData->AllocatedThreads++) { - Pages =3D EFI_SIZE_TO_PAGES (MemRegionSize); - Alignment =3D MemRegionSize; - AlignedAddress =3D (UINTN)AllocateAlignedReservedPages (Pages, Align= ment); - if (AlignedAddress =3D=3D 0) { - DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated only for %d= threads\n", ProcTraceData->AllocatedThreads)); - if (Index =3D=3D 0) { - // - // Could not allocate for BSP even - // - FreePool ((VOID *)ThreadMemRegionTable); - ThreadMemRegionTable =3D NULL; - return RETURN_OUT_OF_RESOURCES; + Pages =3D EFI_SIZE_TO_PAGES (MemRegionSize); + Alignment =3D MemRegionSize; + if (ProcTraceData->EnableOnBspOnly) { + // + // When only enable ProcTrace on BSP, this is the first and only tim= e ProcTraceInitialize() runs. + // + MemRegionBaseAddr =3D (UINTN)AllocateAlignedReservedPages (Pages, Al= ignment); + if (MemRegionBaseAddr =3D=3D 0) { + // + // Could not allocate for BSP even + // + DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, failed to allocate bu= ffer for BSP\n")); + return RETURN_OUT_OF_RESOURCES; + } + + DEBUG ((DEBUG_INFO, "ProcTrace: Allocated PT MemRegionBaseAddr(align= ed) for BSP only: 0x%llX.\n", (UINT64)MemRegionBaseAddr)); + } else { + ThreadMemRegionTable =3D (UINTN *)AllocatePool (ProcTraceData->Numbe= rOfProcessors * sizeof (UINTN *)); + if (ThreadMemRegionTable =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "Allocate ProcTrace ThreadMemRegionTable Fail= ed\n")); + return RETURN_OUT_OF_RESOURCES; + } + + ProcTraceData->ThreadMemRegionTable =3D ThreadMemRegionTable; + + for (Index =3D 0; Index < ProcTraceData->NumberOfProcessors; Index++= , ProcTraceData->AllocatedThreads++) { + AlignedAddress =3D (UINTN)AllocateAlignedReservedPages (Pages, Ali= gnment); + if (AlignedAddress =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated only for = %d threads\n", ProcTraceData->AllocatedThreads)); + if (Index =3D=3D 0) { + // + // Could not allocate for BSP even + // + FreePool ((VOID *)ThreadMemRegionTable); + ThreadMemRegionTable =3D NULL; + return RETURN_OUT_OF_RESOURCES; + } + + break; } =20 - break; + ThreadMemRegionTable[Index] =3D AlignedAddress; + DEBUG ((DEBUG_INFO, "ProcTrace: PT MemRegionBaseAddr(aligned) for = thread %d: 0x%llX \n", Index, (UINT64)ThreadMemRegionTable[Index])); } =20 - ThreadMemRegionTable[Index] =3D AlignedAddress; - DEBUG ((DEBUG_INFO, "ProcTrace: PT MemRegionBaseAddr(aligned) for th= read %d: 0x%llX \n", Index, (UINT64)ThreadMemRegionTable[Index])); + DEBUG ((DEBUG_INFO, "ProcTrace: Allocated PT mem for %d thread \n", = ProcTraceData->AllocatedThreads)); } - - DEBUG ((DEBUG_INFO, "ProcTrace: Allocated PT mem for %d thread \n", Pr= ocTraceData->AllocatedThreads)); } =20 - if (ProcessorNumber < ProcTraceData->AllocatedThreads) { - MemRegionBaseAddr =3D ProcTraceData->ThreadMemRegionTable[ProcessorNum= ber]; - } else { - return RETURN_SUCCESS; + if (!ProcTraceData->EnableOnBspOnly) { + if (ProcessorNumber < ProcTraceData->AllocatedThreads) { + MemRegionBaseAddr =3D ProcTraceData->ThreadMemRegionTable[ProcessorN= umber]; + } else { + return RETURN_SUCCESS; + } } =20 /// @@ -367,50 +396,67 @@ ProcTraceInitialize ( // if (FirstIn) { DEBUG ((DEBUG_INFO, "ProcTrace: Enabling ToPA scheme \n")); - // - // Let BSP allocate ToPA table mem for all threads - // - TopaMemArray =3D (UINTN *)AllocatePool (ProcTraceData->AllocatedThre= ads * sizeof (UINTN *)); - if (TopaMemArray =3D=3D NULL) { - DEBUG ((DEBUG_ERROR, "ProcTrace: Allocate mem for ToPA Failed\n")); - return RETURN_OUT_OF_RESOURCES; - } =20 - ProcTraceData->TopaMemArray =3D TopaMemArray; + Pages =3D EFI_SIZE_TO_PAGES (sizeof (PROC_TRACE_TOPA_TABLE)); + Alignment =3D 0x1000; =20 - for (Index =3D 0; Index < ProcTraceData->AllocatedThreads; Index++) { - Pages =3D EFI_SIZE_TO_PAGES (sizeof (PROC_TRACE_TOPA_TABL= E)); - Alignment =3D 0x1000; - AlignedAddress =3D (UINTN)AllocateAlignedReservedPages (Pages, Ali= gnment); - if (AlignedAddress =3D=3D 0) { - if (Index < ProcTraceData->AllocatedThreads) { - ProcTraceData->AllocatedThreads =3D Index; - } + if (ProcTraceData->EnableOnBspOnly) { + // + // When only enable ProcTrace on BSP, this is the first and only t= ime ProcTraceInitialize() runs. + // + TopaTableBaseAddr =3D (UINTN)AllocateAlignedReservedPages (Pages, = Alignment); + if (TopaTableBaseAddr =3D=3D 0) { + DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, failed to allocate = ToPA mem for BSP")); + return RETURN_OUT_OF_RESOURCES; + } =20 - DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated ToPA mem= only for %d threads\n", ProcTraceData->AllocatedThreads)); - if (Index =3D=3D 0) { - // - // Could not allocate for BSP even - // - FreePool ((VOID *)TopaMemArray); - TopaMemArray =3D NULL; - return RETURN_OUT_OF_RESOURCES; + DEBUG ((DEBUG_INFO, "ProcTrace: Topa table address(aligned) for BS= P only: 0x%llX \n", (UINT64)TopaTableBaseAddr)); + } else { + // + // Let BSP allocate ToPA table mem for all threads + // + TopaMemArray =3D (UINTN *)AllocatePool (ProcTraceData->AllocatedTh= reads * sizeof (UINTN *)); + if (TopaMemArray =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "ProcTrace: Allocate mem for ToPA Failed\n"= )); + return RETURN_OUT_OF_RESOURCES; + } + + ProcTraceData->TopaMemArray =3D TopaMemArray; + + for (Index =3D 0; Index < ProcTraceData->AllocatedThreads; Index++= ) { + AlignedAddress =3D (UINTN)AllocateAlignedReservedPages (Pages, A= lignment); + if (AlignedAddress =3D=3D 0) { + if (Index < ProcTraceData->AllocatedThreads) { + ProcTraceData->AllocatedThreads =3D Index; + } + + DEBUG ((DEBUG_ERROR, "ProcTrace: Out of mem, allocated ToPA m= em only for %d threads\n", ProcTraceData->AllocatedThreads)); + if (Index =3D=3D 0) { + // + // Could not allocate for BSP even + // + FreePool ((VOID *)TopaMemArray); + TopaMemArray =3D NULL; + return RETURN_OUT_OF_RESOURCES; + } + + break; } =20 - break; + TopaMemArray[Index] =3D AlignedAddress; + DEBUG ((DEBUG_INFO, "ProcTrace: Topa table address(aligned) for = thread %d is 0x%llX \n", Index, (UINT64)TopaMemArray[Index])); } =20 - TopaMemArray[Index] =3D AlignedAddress; - DEBUG ((DEBUG_INFO, "ProcTrace: Topa table address(aligned) for th= read %d is 0x%llX \n", Index, (UINT64)TopaMemArray[Index])); + DEBUG ((DEBUG_INFO, "ProcTrace: Allocated ToPA mem for %d thread \= n", ProcTraceData->AllocatedThreads)); } - - DEBUG ((DEBUG_INFO, "ProcTrace: Allocated ToPA mem for %d thread \n"= , ProcTraceData->AllocatedThreads)); } =20 - if (ProcessorNumber < ProcTraceData->AllocatedThreads) { - TopaTableBaseAddr =3D ProcTraceData->TopaMemArray[ProcessorNumber]; - } else { - return RETURN_SUCCESS; + if (!ProcTraceData->EnableOnBspOnly) { + if (ProcessorNumber < ProcTraceData->AllocatedThreads) { + TopaTableBaseAddr =3D ProcTraceData->TopaMemArray[ProcessorNumber]; + } else { + return RETURN_SUCCESS; + } } =20 TopaTable =3D (PROC_TRACE_TOPA_TABLE *)TopaTableBaseAd= dr; diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index a5528277ff..6845e80706 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -338,6 +338,13 @@ # @Prompt Current boot is a power-on reset. gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset|FALSE|BOOLEAN|0x0000001B =20 + ## This PCD indicates whether CPU processor trace is enabled on BSP only= when CPU processor trace is enabled.

+ # This PCD is ignored if CPU processor trace is disabled.

+ # TRUE - CPU processor trace is enabled on BSP only.
+ # FASLE - CPU processor trace is enabled on all CPU.
+ # @Prompt Enable CPU processor trace only on BSP. + gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly|FALSE|BOOLEAN|0x60000019 + [PcdsFixedAtBuild.X64, PcdsPatchableInModule.X64, PcdsDynamic.X64, PcdsDyn= amicEx.X64] ## Indicate access to non-SMRAM memory is restricted to reserved, runtim= e and ACPI NVS type after SmmReadyToLock. # MMIO access is always allowed regardless of the value of this PCD. --=20 2.39.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103633): https://edk2.groups.io/g/devel/message/103633 Mute This Topic: https://groups.io/mt/98510428/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 03:38:26 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+103634+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+103634+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1682496211; cv=none; d=zohomail.com; s=zohoarc; b=CLXhfa7kiS+ZdPr5qJQlQ7a8DelMTMu3E8EpK6VF8oMd5pkieJd33Ebvzu0BLBiSWIqU+q4jBaw3iv0iBR/HK92wsF+z0fnkXuFt2WKfizyh5vfsTxSspH+Xhw1JQEEZoCKBMa+yDw9aP9MVt0GZltpk7oFpPewInnOkajvX2kY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1682496211; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=+9Xyb2JX9vdJWZUEKw4qqGhLbApJo4eQ5qNG9wfDcSk=; b=a2TUihUiczGWnPIhSq38DjQkh9nSGWdYngQmxepH2y2cmiBRcJ6giQQKw7c7fHGm90c3r9dFmNdYuHFa1ZhWtlr6UCLETvkiF8UxNM3oozxP37KKKoxBjCcR+iPfyAT/0Lo0L74JFhexJlg1oEsLE5POQR1sEAMhHq/ga8MN+pE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+103634+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1682496211054546.0885306960018; Wed, 26 Apr 2023 01:03:31 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id rN4sYY1788612xzRUAc7WwH6; Wed, 26 Apr 2023 01:03:30 -0700 X-Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.2867.1682496203492988182 for ; Wed, 26 Apr 2023 01:03:30 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10691"; a="433315659" X-IronPort-AV: E=Sophos;i="5.99,227,1677571200"; d="scan'208";a="433315659" X-Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2023 01:03:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10691"; a="763218459" X-IronPort-AV: E=Sophos;i="5.99,227,1677571200"; d="scan'208";a="763218459" X-Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.92]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2023 01:03:27 -0700 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann , Xiao X Chen Subject: [edk2-devel] [Patch V4 2/2] UefiCpuPkg: Update PT code to support enable collect performance Date: Wed, 26 Apr 2023 16:03:10 +0800 Message-Id: <20230426080310.3548-3-dun.tan@intel.com> In-Reply-To: <20230426080310.3548-1-dun.tan@intel.com> References: <20230426080310.3548-1-dun.tan@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,dun.tan@intel.com X-Gm-Message-State: PNFZREe9TDlAHnRp2PlluEVsx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1682496210; bh=wmjspfNgU6EvfqaoJYkrixsCGNNdB/2N281LZD9eQLI=; h=Cc:Date:From:Reply-To:Subject:To; b=uSDjK/skWyKyF+AI9eZDPTFjs07zyGFn1tvRnBwLKr9O0asRtsZXYKnRB8WYQFWSn2B mq9c5wHtn5mvKz9w4DZ4cH/V3wVZIpRPqMwUfeJbTgDPDEqGEA2Zwfkym9aIayQiNiELB UXOzRhf9w1ocYUBq7+iKdZBFcpGtQnpnihk= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1682496211940100005 Content-Type: text/plain; charset="utf-8" Update ProcTrace feature code to support enable collect performance data by generating CYC and TSC packets. Add a new dynamic PCD to indicate if enable performance collecting. In ProcTrace.c code, if this new PCD is true, after check cpuid, CYC and TSC packets will be generated by setting the corresponding MSR bits feilds if supported. Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4423 Signed-off-by: Dun Tan Cc: Eric Dong Reviewed-by: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Xiao X Chen --- UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 11 ++++= ++----- UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 38 ++++= ++++++++++++++++++++++++++-------- UefiCpuPkg/UefiCpuPkg.dec | 8 ++++= ++++ 3 files changed, 44 insertions(+), 13 deletions(-) diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.i= nf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf index d803012ce2..1b823155b1 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf @@ -58,8 +58,9 @@ LocalApicLib =20 [Pcd] - gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle ## SOMETIMES_= CONSUMES - gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset ## SOMETIMES_= CONSUMES - gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ## SOMETIMES_= CONSUMES - gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ## SOMETIMES_= CONSUMES - gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ## SOMETIMES_= CONSUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuClockModulationDutyCycle ## SOMETI= MES_CONSUMES + gUefiCpuPkgTokenSpaceGuid.PcdIsPowerOnReset ## SOMETI= MES_CONSUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ## SOMETI= MES_CONSUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ## SOMETI= MES_CONSUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly ## SOMETI= MES_CONSUMES + gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTracePerformanceCollecting ## SOMETI= MES_CONSUMES diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c b/UefiCpuP= kg/Library/CpuCommonFeaturesLib/ProcTrace.c index 92d6f54b42..a4510eb802 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c @@ -33,6 +33,7 @@ typedef struct { MSR_IA32_RTIT_CTL_REGISTER RtitCtrl; MSR_IA32_RTIT_OUTPUT_BASE_REGISTER RtitOutputBase; MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTER RtitOutputMaskPtrs; + BOOLEAN CycPacketSupported; } PROC_TRACE_PROCESSOR_DATA; =20 typedef struct { @@ -47,6 +48,7 @@ typedef struct { UINTN *TopaMemArray; =20 BOOLEAN EnableOnBspOnly; + BOOLEAN EnablePerformanceCollecting; =20 PROC_TRACE_PROCESSOR_DATA *ProcessorData; } PROC_TRACE_DATA; @@ -76,10 +78,11 @@ ProcTraceGetConfigData ( ASSERT (ConfigData !=3D NULL); ConfigData->ProcessorData =3D (PROC_TRACE_PROCESSOR_DATA *)((UINT8 *)Con= figData + sizeof (PROC_TRACE_DATA)); =20 - ConfigData->NumberOfProcessors =3D (UINT32)NumberOfProcessors; - ConfigData->ProcTraceMemSize =3D PcdGet32 (PcdCpuProcTraceMemSize); - ConfigData->ProcTraceOutputScheme =3D PcdGet8 (PcdCpuProcTraceOutputSche= me); - ConfigData->EnableOnBspOnly =3D PcdGetBool (PcdCpuProcTraceBspOnly= ); + ConfigData->NumberOfProcessors =3D (UINT32)NumberOfProcessors; + ConfigData->ProcTraceMemSize =3D PcdGet32 (PcdCpuProcTraceMem= Size); + ConfigData->ProcTraceOutputScheme =3D PcdGet8 (PcdCpuProcTraceOutp= utScheme); + ConfigData->EnableOnBspOnly =3D PcdGetBool (PcdCpuProcTraceB= spOnly); + ConfigData->EnablePerformanceCollecting =3D PcdGetBool (PcdCpuProcTraceP= erformanceCollecting); =20 return ConfigData; } @@ -111,7 +114,8 @@ ProcTraceSupport ( { PROC_TRACE_DATA *ProcTraceData; CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX Ebx; - CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_ECX Ecx; + CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_ECX ProcTraceEcx; + CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_EBX ProcTraceEbx; =20 // // Check if ProcTraceMemorySize option is enabled (0xFF means disable by= user) @@ -132,15 +136,17 @@ ProcTraceSupport ( return FALSE; } =20 - AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE, CPUID_INTEL_PROCESSOR_TRACE_MAI= N_LEAF, NULL, NULL, &Ecx.Uint32, NULL); - ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported =3D (= BOOLEAN)(Ecx.Bits.RTIT =3D=3D 1); - ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported =3D (= BOOLEAN)(Ecx.Bits.SingleRangeOutput =3D=3D 1); + AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE, CPUID_INTEL_PROCESSOR_TRACE_MAI= N_LEAF, NULL, &ProcTraceEbx.Uint32, &ProcTraceEcx.Uint32, NULL); + ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported =3D (= BOOLEAN)(ProcTraceEcx.Bits.RTIT =3D=3D 1); + ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported =3D (= BOOLEAN)(ProcTraceEcx.Bits.SingleRangeOutput =3D=3D 1); if ((ProcTraceData->ProcessorData[ProcessorNumber].TopaSupported && (Pro= cTraceData->ProcTraceOutputScheme =3D=3D RtitOutputSchemeToPA)) || (ProcTraceData->ProcessorData[ProcessorNumber].SingleRangeSupported = && (ProcTraceData->ProcTraceOutputScheme =3D=3D RtitOutputSchemeSingleRange= ))) { ProcTraceData->ProcessorData[ProcessorNumber].RtitCtrl.Uint64 = =3D AsmReadMsr64 (MSR_IA32_RTIT_CTL); ProcTraceData->ProcessorData[ProcessorNumber].RtitOutputBase.Uint64 = =3D AsmReadMsr64 (MSR_IA32_RTIT_OUTPUT_BASE); ProcTraceData->ProcessorData[ProcessorNumber].RtitOutputMaskPtrs.Uint6= 4 =3D AsmReadMsr64 (MSR_IA32_RTIT_OUTPUT_MASK_PTRS); + ProcTraceData->ProcessorData[ProcessorNumber].CycPacketSupported = =3D (BOOLEAN)(ProcTraceEbx.Bits.ConfigurablePsb =3D=3D 1); + return TRUE; } =20 @@ -517,6 +523,22 @@ ProcTraceInitialize ( CtrlReg.Bits.User =3D 1; CtrlReg.Bits.BranchEn =3D 1; CtrlReg.Bits.TraceEn =3D 1; + + // + // Generate CYC/TSC timing packets to collect performance data. + // + if (ProcTraceData->EnablePerformanceCollecting) { + if (ProcTraceData->ProcessorData[ProcessorNumber].CycPacketSupported) { + CtrlReg.Bits.CYCEn =3D 1; + CtrlReg.Bits.CYCThresh =3D 5; + } + + // + // Write to TSCEn is always supported + // + CtrlReg.Bits.TSCEn =3D 1; + } + CPU_REGISTER_TABLE_WRITE64 ( ProcessorNumber, Msr, diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 6845e80706..d31c3b127c 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -345,6 +345,14 @@ # @Prompt Enable CPU processor trace only on BSP. gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceBspOnly|FALSE|BOOLEAN|0x60000019 =20 + ## This PCD indicates if enable performance collecting when CPU processo= r trace is enabled.

+ # CYC/TSC timing packets will be generated to collect performance data = if this PCD is TRUE. + # This PCD is ignored if CPU processor trace is disabled.

+ # TRUE - Performance collecting will be enabled in processor trace.
+ # FASLE - Performance collecting will be disabled in processor trace. + # @Prompt Enable performance collecting when processor trace is enabled. + gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTracePerformanceCollecting|FALSE|BOO= LEAN|0x60000020 + [PcdsFixedAtBuild.X64, PcdsPatchableInModule.X64, PcdsDynamic.X64, PcdsDyn= amicEx.X64] ## Indicate access to non-SMRAM memory is restricted to reserved, runtim= e and ACPI NVS type after SmmReadyToLock. # MMIO access is always allowed regardless of the value of this PCD. --=20 2.39.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103634): https://edk2.groups.io/g/devel/message/103634 Mute This Topic: https://groups.io/mt/98510431/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-