[edk2-devel] [PATCH] SimicsOpenBoardPkg: BoardX58Ich10 set PcdSmrrEnable as False

Zhiguang Liu posted 1 patch 1 year ago
Failed in applying to current master (apply log)
.../Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc   | 1 +
1 file changed, 1 insertion(+)
[edk2-devel] [PATCH] SimicsOpenBoardPkg: BoardX58Ich10 set PcdSmrrEnable as False
Posted by Zhiguang Liu 1 year ago
In BoardX58Ich10 platform, MSR 0x1f2 (ia32_smrr_physbase) and MSR 0x1f3
(ia32_smrr_physmask) are both unimplemented. So set the PcdSmrrEnable
as disable to avoid access SMRR

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
 .../Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc   | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
index 472318cc44..732d95e44f 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
@@ -39,6 +39,7 @@
   gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
   gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable|FALSE
+  gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable|FALSE
 
   ######################################
   # Platform Configuration
-- 
2.31.1.windows.1



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Re: [edk2-devel] [PATCH] SimicsOpenBoardPkg: BoardX58Ich10 set PcdSmrrEnable as False
Posted by Ni, Ray 1 year ago
Reviewed-by: Ray Ni <ray.ni@intel.com>

> -----Original Message-----
> From: Liu, Zhiguang <zhiguang.liu@intel.com>
> Sent: Tuesday, April 25, 2023 2:37 PM
> To: devel@edk2.groups.io
> Cc: Liu, Zhiguang <zhiguang.liu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Ni, Ray <ray.ni@intel.com>
> Subject: [PATCH] SimicsOpenBoardPkg: BoardX58Ich10 set PcdSmrrEnable as
> False
> 
> In BoardX58Ich10 platform, MSR 0x1f2 (ia32_smrr_physbase) and MSR 0x1f3
> (ia32_smrr_physmask) are both unimplemented. So set the PcdSmrrEnable
> as disable to avoid access SMRR
> 
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
> ---
>  .../Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc   | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git
> a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds
> c
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds
> c
> index 472318cc44..732d95e44f 100644
> ---
> a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds
> c
> +++
> b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds
> c
> @@ -39,6 +39,7 @@
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE
>    gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
>    gUefiCpuPkgTokenSpaceGuid.PcdSmmFeatureControlEnable|FALSE
> +  gUefiCpuPkgTokenSpaceGuid.PcdSmrrEnable|FALSE
> 
>    ######################################
>    # Platform Configuration
> --
> 2.31.1.windows.1



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