From nobody Tue May 14 21:21:16 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+102356+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102356+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1680448688; cv=none; d=zohomail.com; s=zohoarc; b=LE+X1Cok54fn8+oFTHQuqGgDHV8EAJMxncR1vVynumDaVOlvBKgN0e1usSb4GgGhRTu4CfvjxcjbcAspCmd/meGCt6kjkurM3F2dd1GwFMyO3m/EiJV6H702Q6R1duh1MXqvdsXtvD9Fwm1eTXsaXK+oW51r+9PLtoHGciNHHmA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1680448688; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=VROSrUPcfPEL1vGfX4cTc9nVPM6/lPoD0l3kS6U9wTY=; b=fljgDftdUwdleQhiuMiI9ORIMXioQQUa7QDr74/yVaV7PrgJYTxBXWtg3PJxse4skyKn/U/4au9vP3twVCFpVv2OT2kmkhhXB14hGVKP6izIieBaB01eTi34sRFI8Lun9M52fNLh0PJVmza35lyz3S1eotsrUaY/vgwB46VnzrM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102356+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1680448688941468.3732870724399; Sun, 2 Apr 2023 08:18:08 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 9OI3YY1788612xyrxjHllMu8; Sun, 02 Apr 2023 08:18:08 -0700 X-Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.46697.1680448687554603681 for ; Sun, 02 Apr 2023 08:18:07 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10668"; a="330310565" X-IronPort-AV: E=Sophos;i="5.98,312,1673942400"; d="scan'208";a="330310565" X-Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2023 08:18:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10668"; a="679188136" X-IronPort-AV: E=Sophos;i="5.98,312,1673942400"; d="scan'208";a="679188136" X-Received: from evancy.sh.intel.com ([10.239.158.113]) by orsmga007.jf.intel.com with ESMTP; 02 Apr 2023 08:18:04 -0700 From: "Chai, Evan" To: devel@edk2.groups.io Cc: Daniel Schaefer , Sunil V L , Andrei Warkentin Subject: [edk2-devel] [PATCH 1/5] Silicon/RISC-V/ProcessorPkg: remove redundant CpuDxe driver Date: Sun, 2 Apr 2023 23:15:38 +0800 Message-Id: <20230402151542.325929-2-evan.chai@intel.com> In-Reply-To: <20230402151542.325929-1-evan.chai@intel.com> References: <20230402151542.325929-1-evan.chai@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,evan.chai@intel.com X-Gm-Message-State: VO8OJjwzvoYHVK7NLHMtYAtHx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1680448688; bh=WdbF3gjlTL0r5ZoR0gdfZFTqLd8es2CX71bMH9/pfIU=; h=Cc:Date:From:Reply-To:Subject:To; b=Q37ufmwFggiDtfQfQ2rNhRxqQW+Amu5xWKhArEwcJM8Ay1p51V2eCLHa5FVQ4QWhbar mQYL86lLwJTOTwnDdtGk7XcvjZk+P2wWbzXM/oYGDj/Ib/GN/1gY4iYZmNm/5+p97M8xV gTrSLpzxWhFteqX7n2XOlcr++wC1zoukmgA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1680448691003100002 Content-Type: text/plain; charset="utf-8" UefiCpuPkg/CpuDxeRiscV64 will replace it later. Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 2= +- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 2= +- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2= +- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 2= +- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c | 310= --------------------------------------------------------------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= ----------- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.h | 198= --------------------------------------------------------------------------= ---------------------------------------------------------------------------= ------------------------------------------------- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf | 49= ------------------------------------------------- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni | 13= ------------- Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni | 14= -------------- 9 files changed, 4 insertions(+), 588 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/P= latform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index fc1ed012..efcfdd35 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -466,7 +466,7 @@ # # RISC-V Core module # - Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf + UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf =20 diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf b/P= latform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf index 4ce19279..da4d3379 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf @@ -151,7 +151,7 @@ INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbSe= rvicesRuntimeDxe/FvbServi =20 # RISC-V Core Drivers INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf -INF Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf +INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf =20 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.d= sc index e59955d0..d92f8166 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc @@ -465,7 +465,7 @@ # # RISC-V Core module # - Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf + UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf =20 diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.f= df index c58fa635..237ed74a 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf @@ -151,7 +151,7 @@ INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbSe= rvicesRuntimeDxe/FvbServi =20 # RISC-V Core Drivers INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf -INF Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf +INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf =20 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c b/Silico= n/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c deleted file mode 100644 index 8d4d406e..00000000 --- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.c +++ /dev/null @@ -1,310 +0,0 @@ -/** @file - RISC-V CPU DXE driver. - - Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include "CpuDxe.h" - -// -// Global Variables -// -STATIC BOOLEAN mInterruptState =3D FALSE; -STATIC EFI_HANDLE mCpuHandle =3D NULL; - -EFI_CPU_ARCH_PROTOCOL gCpu =3D { - CpuFlushCpuDataCache, - CpuEnableInterrupt, - CpuDisableInterrupt, - CpuGetInterruptState, - CpuInit, - CpuRegisterInterruptHandler, - CpuGetTimerValue, - CpuSetMemoryAttributes, - 1, // NumberOfTimers - 4 // DmaBufferAlignment -}; - -// -// CPU Arch Protocol Functions -// - -/** - Flush CPU data cache. If the instruction cache is fully coherent - with all DMA operations then function can just return EFI_SUCCESS. - - @param This Protocol instance structure - @param Start Physical address to start flushing from. - @param Length Number of bytes to flush. Round up to chipset - granularity. - @param FlushType Specifies the type of flush operation to perfo= rm. - - @retval EFI_SUCCESS If cache was flushed - @retval EFI_UNSUPPORTED If flush type is not supported. - @retval EFI_DEVICE_ERROR If requested range could not be flushed. - -**/ -EFI_STATUS -EFIAPI -CpuFlushCpuDataCache ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_PHYSICAL_ADDRESS Start, - IN UINT64 Length, - IN EFI_CPU_FLUSH_TYPE FlushType - ) -{ - return EFI_SUCCESS; -} - -/** - Enables CPU interrupts. - - @param This Protocol instance structure - - @retval EFI_SUCCESS If interrupts were enabled in the CPU - @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU. - -**/ -EFI_STATUS -EFIAPI -CpuEnableInterrupt ( - IN EFI_CPU_ARCH_PROTOCOL *This - ) -{ - EnableInterrupts (); - mInterruptState =3D TRUE; - return EFI_SUCCESS; -} - -/** - Disables CPU interrupts. - - @param This Protocol instance structure - - @retval EFI_SUCCESS If interrupts were disabled in the CPU. - @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU. - -**/ -EFI_STATUS -EFIAPI -CpuDisableInterrupt ( - IN EFI_CPU_ARCH_PROTOCOL *This - ) -{ - DisableInterrupts (); - mInterruptState =3D FALSE; - return EFI_SUCCESS; -} - -/** - Return the state of interrupts. - - @param This Protocol instance structure - @param State Pointer to the CPU's current interrupt st= ate - - @retval EFI_SUCCESS If interrupts were disabled in the CPU. - @retval EFI_INVALID_PARAMETER State is NULL. - -**/ -EFI_STATUS -EFIAPI -CpuGetInterruptState ( - IN EFI_CPU_ARCH_PROTOCOL *This, - OUT BOOLEAN *State - ) -{ - if (State =3D=3D NULL) { - return EFI_INVALID_PARAMETER; - } - - *State =3D mInterruptState; - return EFI_SUCCESS; -} - -/** - Generates an INIT to the CPU. - - @param This Protocol instance structure - @param InitType Type of CPU INIT to perform - - @retval EFI_SUCCESS If CPU INIT occurred. This value should never = be - seen. - @retval EFI_DEVICE_ERROR If CPU INIT failed. - @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported. - -**/ -EFI_STATUS -EFIAPI -CpuInit ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_CPU_INIT_TYPE InitType - ) -{ - return EFI_UNSUPPORTED; -} - -/** - Registers a function to be called from the CPU interrupt handler. - - @param This Protocol instance structure - @param InterruptType Defines which interrupt to hook. IA-32 - valid range is 0x00 through 0xFF - @param InterruptHandler A pointer to a function of type - EFI_CPU_INTERRUPT_HANDLER that is called - when a processor interrupt occurs. A null - pointer is an error condition. - - @retval EFI_SUCCESS If handler installed or uninstalled. - @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handl= er - for InterruptType was previously installe= d. - @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler f= or - InterruptType was not previously installe= d. - @retval EFI_UNSUPPORTED The interrupt specified by InterruptType - is not supported. - -**/ -EFI_STATUS -EFIAPI -CpuRegisterInterruptHandler ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler - ) -{ - return RegisterCpuInterruptHandler (InterruptType, InterruptHandler); -} - -/** - Returns a timer value from one of the CPU's internal timers. There is no - inherent time interval between ticks but is a function of the CPU freque= ncy. - - @param This - Protocol instance structure. - @param TimerIndex - Specifies which CPU timer is requested. - @param TimerValue - Pointer to the returned timer value. - @param TimerPeriod - A pointer to the amount of time that passes - in femtoseconds (10-15) for each increment - of TimerValue. If TimerValue does not - increment at a predictable rate, then 0 is - returned. The amount of time that has - passed between two calls to GetTimerValue() - can be calculated with the formula - (TimerValue2 - TimerValue1) * TimerPeriod. - This parameter is optional and may be NULL. - - @retval EFI_SUCCESS - If the CPU timer count was returned. - @retval EFI_UNSUPPORTED - If the CPU does not have any readable ti= mers. - @retval EFI_DEVICE_ERROR - If an error occurred while reading the t= imer. - @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is= NULL. - -**/ -EFI_STATUS -EFIAPI -CpuGetTimerValue ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN UINT32 TimerIndex, - OUT UINT64 *TimerValue, - OUT UINT64 *TimerPeriod OPTIONAL - ) -{ - if (TimerValue =3D=3D NULL) { - return EFI_INVALID_PARAMETER; - } - - if (TimerIndex !=3D 0) { - return EFI_INVALID_PARAMETER; - } - - *TimerValue =3D (UINT64)RiscVReadMachineTimerInterface (); - if (TimerPeriod !=3D NULL) { - *TimerPeriod =3D DivU64x32 ( - 1000000000000000u, - PcdGet64 (PcdRiscVMachineTimerFrequencyInHerz) - ); - } - - return EFI_SUCCESS; -} - -/** - Implementation of SetMemoryAttributes() service of CPU Architecture Prot= ocol. - - This function modifies the attributes for the memory region specified by= BaseAddress and - Length from their current attributes to the attributes specified by Attr= ibutes. - - @param This The EFI_CPU_ARCH_PROTOCOL instance. - @param BaseAddress The physical address that is the start address = of a memory region. - @param Length The size in bytes of the memory region. - @param Attributes The bit mask of attributes to set for the memor= y region. - - @retval EFI_SUCCESS The attributes were set for the memory reg= ion. - @retval EFI_ACCESS_DENIED The attributes for the memory resource ran= ge specified by - BaseAddress and Length cannot be modified. - @retval EFI_INVALID_PARAMETER Length is zero. - Attributes specified an illegal combinatio= n of attributes that - cannot be set together. - @retval EFI_OUT_OF_RESOURCES There are not enough system resources to m= odify the attributes of - the memory resource range. - @retval EFI_UNSUPPORTED The processor does not support one or more= bytes of the memory - resource range specified by BaseAddress an= d Length. - The bit mask of attributes is not support = for the memory resource - range specified by BaseAddress and Length. - -**/ -EFI_STATUS -EFIAPI -CpuSetMemoryAttributes ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length, - IN UINT64 Attributes - ) -{ - DEBUG ((DEBUG_INFO, "%a: Set memory attributes not supported yet\n", __F= UNCTION__)); - return EFI_SUCCESS; -} - -/** - Initialize the state information for the CPU Architectural Protocol. - - @param ImageHandle Image handle this driver. - @param SystemTable Pointer to the System Table. - - @retval EFI_SUCCESS Thread can be successfully created - @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure - @retval EFI_DEVICE_ERROR Cannot create the thread - -**/ -EFI_STATUS -EFIAPI -InitializeCpu ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - // - // Machine mode handler is initiated in CpuExceptionHandlerLibConstructo= r in - // CpuExecptionHandlerLib. - // - - // - // Make sure interrupts are disabled - // - DisableInterrupts (); - - // - // Install CPU Architectural Protocol - // - Status =3D gBS->InstallMultipleProtocolInterfaces ( - &mCpuHandle, - &gEfiCpuArchProtocolGuid, - &gCpu, - NULL - ); - ASSERT_EFI_ERROR (Status); - return Status; -} diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.h b/Silico= n/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.h deleted file mode 100644 index 9d70d7b6..00000000 --- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.h +++ /dev/null @@ -1,198 +0,0 @@ -/** @file - RISC-V CPU DXE module header file. - - Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef CPU_DXE_H_ -#define CPU_DXE_H_ - -#include - -#include -#include -#include -#include -#include -#include -#include - -/** - Flush CPU data cache. If the instruction cache is fully coherent - with all DMA operations then function can just return EFI_SUCCESS. - - @param This Protocol instance structure - @param Start Physical address to start flushing from. - @param Length Number of bytes to flush. Round up to chipset - granularity. - @param FlushType Specifies the type of flush operation to perfo= rm. - - @retval EFI_SUCCESS If cache was flushed - @retval EFI_UNSUPPORTED If flush type is not supported. - @retval EFI_DEVICE_ERROR If requested range could not be flushed. - -**/ -EFI_STATUS -EFIAPI -CpuFlushCpuDataCache ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_PHYSICAL_ADDRESS Start, - IN UINT64 Length, - IN EFI_CPU_FLUSH_TYPE FlushType - ); - -/** - Enables CPU interrupts. - - @param This Protocol instance structure - - @retval EFI_SUCCESS If interrupts were enabled in the CPU - @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU. - -**/ -EFI_STATUS -EFIAPI -CpuEnableInterrupt ( - IN EFI_CPU_ARCH_PROTOCOL *This - ); - -/** - Disables CPU interrupts. - - @param This Protocol instance structure - - @retval EFI_SUCCESS If interrupts were disabled in the CPU. - @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU. - -**/ -EFI_STATUS -EFIAPI -CpuDisableInterrupt ( - IN EFI_CPU_ARCH_PROTOCOL *This - ); - -/** - Return the state of interrupts. - - @param This Protocol instance structure - @param State Pointer to the CPU's current interrupt st= ate - - @retval EFI_SUCCESS If interrupts were disabled in the CPU. - @retval EFI_INVALID_PARAMETER State is NULL. - -**/ -EFI_STATUS -EFIAPI -CpuGetInterruptState ( - IN EFI_CPU_ARCH_PROTOCOL *This, - OUT BOOLEAN *State - ); - -/** - Generates an INIT to the CPU. - - @param This Protocol instance structure - @param InitType Type of CPU INIT to perform - - @retval EFI_SUCCESS If CPU INIT occurred. This value should never = be - seen. - @retval EFI_DEVICE_ERROR If CPU INIT failed. - @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported. - -**/ -EFI_STATUS -EFIAPI -CpuInit ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_CPU_INIT_TYPE InitType - ); - -/** - Registers a function to be called from the CPU interrupt handler. - - @param This Protocol instance structure - @param InterruptType Defines which interrupt to hook. IA-32 - valid range is 0x00 through 0xFF - @param InterruptHandler A pointer to a function of type - EFI_CPU_INTERRUPT_HANDLER that is called - when a processor interrupt occurs. A null - pointer is an error condition. - - @retval EFI_SUCCESS If handler installed or uninstalled. - @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handl= er - for InterruptType was previously installe= d. - @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler f= or - InterruptType was not previously installe= d. - @retval EFI_UNSUPPORTED The interrupt specified by InterruptType - is not supported. - -**/ -EFI_STATUS -EFIAPI -CpuRegisterInterruptHandler ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler - ); - -/** - Returns a timer value from one of the CPU's internal timers. There is no - inherent time interval between ticks but is a function of the CPU freque= ncy. - - @param This - Protocol instance structure. - @param TimerIndex - Specifies which CPU timer is requested. - @param TimerValue - Pointer to the returned timer value. - @param TimerPeriod - A pointer to the amount of time that passes - in femtoseconds (10-15) for each increment - of TimerValue. If TimerValue does not - increment at a predictable rate, then 0 is - returned. The amount of time that has - passed between two calls to GetTimerValue() - can be calculated with the formula - (TimerValue2 - TimerValue1) * TimerPeriod. - This parameter is optional and may be NULL. - - @retval EFI_SUCCESS - If the CPU timer count was returned. - @retval EFI_UNSUPPORTED - If the CPU does not have any readable ti= mers. - @retval EFI_DEVICE_ERROR - If an error occurred while reading the t= imer. - @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is= NULL. - -**/ -EFI_STATUS -EFIAPI -CpuGetTimerValue ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN UINT32 TimerIndex, - OUT UINT64 *TimerValue, - OUT UINT64 *TimerPeriod OPTIONAL - ); - -/** - Set memory cacheability attributes for given range of memeory. - - @param This Protocol instance structure - @param BaseAddress Specifies the start address of the - memory range - @param Length Specifies the length of the memory range - @param Attributes The memory cacheability for the memory ra= nge - - @retval EFI_SUCCESS If the cacheability of that memory range = is - set successfully - @retval EFI_UNSUPPORTED If the desired operation cannot be done - @retval EFI_INVALID_PARAMETER The input parameter is not correct, - such as Length =3D 0 - -**/ -EFI_STATUS -EFIAPI -CpuSetMemoryAttributes ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length, - IN UINT64 Attributes - ); - -#endif diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf b/Sili= con/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf deleted file mode 100644 index a422c12e..00000000 --- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.inf +++ /dev/null @@ -1,49 +0,0 @@ -## @file -# RISC-V CPU DXE module. -# -# Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. A= ll rights reserved.
-# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x0001001b - BASE_NAME =3D CpuDxe - MODULE_UNI_FILE =3D CpuDxe.uni - FILE_GUID =3D 2AEB1f3E-5B6B-441B-92C1-4A9E6FC85E92 - MODULE_TYPE =3D DXE_DRIVER - VERSION_STRING =3D 1.0 - - ENTRY_POINT =3D InitializeCpu - -[Packages] - MdeModulePkg/MdeModulePkg.dec - MdePkg/MdePkg.dec - Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec - -[LibraryClasses] - BaseLib - CpuLib - CpuExceptionHandlerLib - DebugLib - MachineModeTimerLib - RiscVCpuLib - TimerLib - UefiBootServicesTableLib - UefiDriverEntryPoint - -[Sources] - CpuDxe.c - CpuDxe.h - -[Protocols] - gEfiCpuArchProtocolGuid ## PRODUCES - -[Pcd] - gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz - -[Depex] - TRUE - -[UserExtensions.TianoCore."ExtraFiles"] - CpuDxeExtra.uni diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni b/Sili= con/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni deleted file mode 100644 index 460141a1..00000000 --- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxe.uni +++ /dev/null @@ -1,13 +0,0 @@ -// /** @file -// -// Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. A= ll rights reserved.
-// -// SPDX-License-Identifier: BSD-2-Clause-Patent -// -// **/ - - -#string STR_MODULE_ABSTRACT #language en-US "Installs RISC-V C= PU Architecture Protocol" - -#string STR_MODULE_DESCRIPTION #language en-US "RISC-V CPU driver= installs CPU Architecture Protocol." - diff --git a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni b= /Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni deleted file mode 100644 index 6f819f06..00000000 --- a/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe/CpuDxeExtra.uni +++ /dev/null @@ -1,14 +0,0 @@ -// /** @file -// CpuDxe Localized Strings and Content -// -// Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. A= ll rights reserved.
-// -// SPDX-License-Identifier: BSD-2-Clause-Patent -// -// **/ - -#string STR_PROPERTIES_MODULE_NAME -#language en-US -"RISC-V Architectural DXE Driver" - - --=20 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102356): https://edk2.groups.io/g/devel/message/102356 Mute This Topic: https://groups.io/mt/98015398/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Tue May 14 21:21:16 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+102357+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102357+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1680448710; cv=none; d=zohomail.com; s=zohoarc; b=c+VOM8vj3J6Jggos/8B6IuQbRBMPPwspSVMnFAj58y6XX/e+jLWChGzI5TqOM3i20XhjsDe5p16sk60Y8zLlJLggX0iAJGysfqOXkOSs/B1vCfpxI2odEhjx3iH9v0cdyod+RhN+XiEKAOAPZM0l1AQDFDHX34yx1VLUOjyTIF4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1680448710; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=e3MRn/rsDGgMKUV8yK5m3LUtIvPCAdoLVN5fvnd21CM=; b=MnU+Phs6ur+0ve/5g94Ue8qzr9U9bF3cs0QHfVZESzCrZQVG08JNQYTuJGzN59xnFX7RxblC5crnHB84keDB4qmqTqB9dxKhs31JZ2sIDDjJ8zAc6w4AGPanMEobi7wTDSroDI1v04DDdthVC2Vo52omAc7hoyUFo8n/zEublg4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102357+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1680448710583908.321549747203; Sun, 2 Apr 2023 08:18:30 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 60AmYY1788612xlhYbO3PHJC; Sun, 02 Apr 2023 08:18:30 -0700 X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web11.46845.1680448709093128069 for ; Sun, 02 Apr 2023 08:18:29 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10668"; a="321400313" X-IronPort-AV: E=Sophos;i="5.98,312,1673942400"; d="scan'208";a="321400313" X-Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2023 08:18:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10668"; a="679188157" X-IronPort-AV: E=Sophos;i="5.98,312,1673942400"; d="scan'208";a="679188157" X-Received: from evancy.sh.intel.com ([10.239.158.113]) by orsmga007.jf.intel.com with ESMTP; 02 Apr 2023 08:18:26 -0700 From: "Chai, Evan" To: devel@edk2.groups.io Cc: Daniel Schaefer , Sunil V L , Andrei Warkentin Subject: [edk2-devel] [PATCH 2/5] Platform/Sifive: remove redundant TimerDxe from Platform Date: Sun, 2 Apr 2023 23:15:39 +0800 Message-Id: <20230402151542.325929-3-evan.chai@intel.com> In-Reply-To: <20230402151542.325929-1-evan.chai@intel.com> References: <20230402151542.325929-1-evan.chai@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,evan.chai@intel.com X-Gm-Message-State: i9mificUcmTyjrugR7jKxSFjx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1680448710; bh=3Q42UpJyWC7uMnCYVWc6qH/CkrMh+yrKFTGKfInRpNI=; h=Cc:Date:From:Reply-To:Subject:To; b=aswmux38oRYRCaTv2ZpeZCBnHnKBVfYWrjzbgLYrZ2KFYPs5CF+HhyUNO5rknh+XNXm +9hBZDMV2T7KA17w4dldluF5l/6WJsNhvapJHRUIwvrCGoMt2UF/3+rQBI3PrcfuD+3RB cgBaIh0enwiXV5utW8eFyauTWkxQPpq3zZA= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1680448711041100001 Content-Type: text/plain; charset="utf-8" It will be replaced by UefiCpuPkg/CpuTimerDxeRiscV64. Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | 2= +- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | 2= +- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | 2= +- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | 2= +- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c | 311= --------------------------------------------------------------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= ---------------------------------------------------------------------------= ------------ Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h | 174= --------------------------------------------------------------------------= ---------------------------------------------------------------------------= ------------------------- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni | 14= -------------- Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf | 54= ------------------------------------------------------ Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni | 12= ------------ 9 files changed, 4 insertions(+), 569 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/P= latform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index efcfdd35..c26b4608 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -460,7 +460,7 @@ # # RISC-V Platform module # - Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf + UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbSe= rvicesRuntimeDxe.inf =20 # diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf b/P= latform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf index da4d3379..b17c960d 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf @@ -150,7 +150,7 @@ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockR= untimeDxe.inf INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/Fv= bServicesRuntimeDxe.inf =20 # RISC-V Core Drivers -INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf +INF UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf =20 diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.d= sc index d92f8166..4487913f 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc @@ -459,7 +459,7 @@ # # RISC-V Platform module # - Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf + UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbSe= rvicesRuntimeDxe.inf =20 # diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.f= df index 237ed74a..9ae89647 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf @@ -150,7 +150,7 @@ INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockR= untimeDxe.inf INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/Fv= bServicesRuntimeDxe.inf =20 # RISC-V Core Drivers -INF Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf +INF UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf INF UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf INF Silicon/RISC-V/ProcessorPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf =20 diff --git a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c b/P= latform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c deleted file mode 100644 index deb57992..00000000 --- a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.c +++ /dev/null @@ -1,311 +0,0 @@ -/** @file - RISC-V Timer Architectural Protocol for U5 series platform. - - Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include "Timer.h" -#include -#include -#include -#include -#include -#include - -BOOLEAN TimerHandlerReentry =3D FALSE; - -// -// The handle onto which the Timer Architectural Protocol will be installed -// -STATIC EFI_HANDLE mTimerHandle =3D NULL; - -// -// The Timer Architectural Protocol that this driver produces -// -EFI_TIMER_ARCH_PROTOCOL mTimer =3D { - TimerDriverRegisterHandler, - TimerDriverSetTimerPeriod, - TimerDriverGetTimerPeriod, - TimerDriverGenerateSoftInterrupt -}; - -// -// Pointer to the CPU Architectural Protocol instance -// -EFI_CPU_ARCH_PROTOCOL *mCpu; - -// -// The notification function to call on every timer interrupt. -// A bug in the compiler prevents us from initializing this here. -// -STATIC EFI_TIMER_NOTIFY mTimerNotifyFunction; - -// -// The current period of the timer interrupt -// -STATIC UINT64 mTimerPeriod =3D 0; - -/** - U5 Series Timer Interrupt Handler. - - @param InterruptType The type of interrupt that occured - @param SystemContext A pointer to the system context when the interru= pt occured -**/ - -VOID -EFIAPI -TimerInterruptHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext - ) -{ - EFI_TPL OriginalTPL; - UINT64 RiscvTimer; - - if (TimerHandlerReentry) { - // - // MMode timer occurred when processing - // SMode timer handler. - // - RiscvTimer =3D RiscVReadMachineTimerInterface(); - SbiSetTimer (RiscvTimer +=3D mTimerPeriod); - csr_clear(CSR_SIP, MIP_STIP); - return; - } - TimerHandlerReentry =3D TRUE; - - OriginalTPL =3D gBS->RaiseTPL (TPL_HIGH_LEVEL); - csr_clear(CSR_SIE, MIP_STIP); // Disable SMode timer int - csr_clear(CSR_SIP, MIP_STIP); - if (mTimerPeriod =3D=3D 0) { - gBS->RestoreTPL (OriginalTPL); - csr_clear(CSR_SIE, MIP_STIP); // Disable SMode timer int - return; - } - if (mTimerNotifyFunction !=3D NULL) { - mTimerNotifyFunction (mTimerPeriod); - } - RiscvTimer =3D RiscVReadMachineTimerInterface(); - SbiSetTimer (RiscvTimer +=3D mTimerPeriod); - gBS->RestoreTPL (OriginalTPL); - csr_set(CSR_SIE, MIP_STIP); // enable SMode timer int - TimerHandlerReentry =3D FALSE; -} - -/** - - This function registers the handler NotifyFunction so it is called every= time - the timer interrupt fires. It also passes the amount of time since the = last - handler call to the NotifyFunction. If NotifyFunction is NULL, then the - handler is unregistered. If the handler is registered, then EFI_SUCCESS= is - returned. If the CPU does not support registering a timer interrupt han= dler, - then EFI_UNSUPPORTED is returned. If an attempt is made to register a h= andler - when a handler is already registered, then EFI_ALREADY_STARTED is return= ed. - If an attempt is made to unregister a handler when a handler is not regi= stered, - then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to - register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ER= ROR - is returned. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param NotifyFunction The function to call when a timer interrupt fire= s. This - function executes at TPL_HIGH_LEVEL. The DXE Co= re will - register a handler for the timer interrupt, so i= t can know - how much time has passed. This information is u= sed to - signal timer based events. NULL will unregister= the handler. - - @retval EFI_SUCCESS The timer handler was registered. - @retval EFI_UNSUPPORTED The platform does not support time= r interrupts. - @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a = handler is already - registered. - @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a hand= ler was not - previously registered. - @retval EFI_DEVICE_ERROR The timer handler could not be reg= istered. - -**/ -EFI_STATUS -EFIAPI -TimerDriverRegisterHandler ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - IN EFI_TIMER_NOTIFY NotifyFunction - ) -{ - DEBUG ((DEBUG_INFO, "TimerDriverRegisterHandler(0x%lx) called\n", Notify= Function)); - mTimerNotifyFunction =3D NotifyFunction; - return EFI_SUCCESS; -} - -/** - - This function adjusts the period of timer interrupts to the value specif= ied - by TimerPeriod. If the timer period is updated, then the selected timer - period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. = If - the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. - If an error occurs while attempting to update the timer period, then the - timer hardware will be put back in its state prior to this call, and - EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer inter= rupt - is disabled. This is not the same as disabling the CPU's interrupts. - Instead, it must either turn off the timer hardware, or it must adjust t= he - interrupt controller so that a CPU interrupt is not generated when the t= imer - interrupt fires. - - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod The rate to program the timer interrupt in 100 nS= units. If - the timer hardware is not programmable, then EFI_= UNSUPPORTED is - returned. If the timer is programmable, then the= timer period - will be rounded up to the nearest timer period th= at is supported - by the timer hardware. If TimerPeriod is set to = 0, then the - timer interrupts will be disabled. - - @retval EFI_SUCCESS The timer period was changed. - @retval EFI_UNSUPPORTED The platform cannot change the period o= f the timer interrupt. - @retval EFI_DEVICE_ERROR The timer period could not be changed d= ue to a device error. - -**/ -EFI_STATUS -EFIAPI -TimerDriverSetTimerPeriod ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - IN UINT64 TimerPeriod - ) -{ - UINT64 RiscvTimer; - - DEBUG ((DEBUG_INFO, "TimerDriverSetTimerPeriod(0x%lx)\n", TimerPeriod)); - - if (TimerPeriod =3D=3D 0) { - mTimerPeriod =3D 0; - csr_clear(CSR_SIE, MIP_STIP); // disable timer int - return EFI_SUCCESS; - } - - mTimerPeriod =3D TimerPeriod; // convert unit from 100ns to 1us - RiscvTimer =3D RiscVReadMachineTimerInterface(); - SbiSetTimer(RiscvTimer + mTimerPeriod / 10); - - mCpu->EnableInterrupt(mCpu); - csr_set(CSR_SIE, MIP_STIP); // enable timer int - return EFI_SUCCESS; -} - -/** - - This function retrieves the period of timer interrupts in 100 ns units, - returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPer= iod - is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 = is - returned, then the timer is currently disabled. - - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod A pointer to the timer period to retrieve in 100 = ns units. If - 0 is returned, then the timer is currently disabl= ed. - - @retval EFI_SUCCESS The timer period was returned in TimerPer= iod. - @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. - -**/ -EFI_STATUS -EFIAPI -TimerDriverGetTimerPeriod ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - OUT UINT64 *TimerPeriod - ) -{ - *TimerPeriod =3D mTimerPeriod; - return EFI_SUCCESS; -} - -/** - - This function generates a soft timer interrupt. If the platform does not= support soft - timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCE= SS is returned. - If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.Reg= isterHandler() - service, then a soft timer interrupt will be generated. If the timer int= errupt is - enabled when this service is called, then the registered handler will be= invoked. The - registered handler should not be able to distinguish a hardware-generate= d timer - interrupt from a software-generated timer interrupt. - - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - - @retval EFI_SUCCESS The soft timer interrupt was generated. - @retval EFI_UNSUPPORTEDT The platform does not support the generation o= f soft timer interrupts. - -**/ -EFI_STATUS -EFIAPI -TimerDriverGenerateSoftInterrupt ( - IN EFI_TIMER_ARCH_PROTOCOL *This - ) -{ - return EFI_SUCCESS; -} - -/** - Initialize the Timer Architectural Protocol driver - - @param ImageHandle ImageHandle of the loaded driver - @param SystemTable Pointer to the System Table - - @retval EFI_SUCCESS Timer Architectural Protocol created - @retval EFI_OUT_OF_RESOURCES Not enough resources available to initial= ize driver. - @retval EFI_DEVICE_ERROR A device error occured attempting to init= ialize the driver. - -**/ -EFI_STATUS -EFIAPI -TimerDriverInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - // - // Initialize the pointer to our notify function. - // - mTimerNotifyFunction =3D NULL; - - // - // Make sure the Timer Architectural Protocol is not already installed i= n the system - // - ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiTimerArchProtocolGuid); - - // - // Find the CPU architectural protocol. - // - Status =3D gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **= ) &mCpu); - ASSERT_EFI_ERROR (Status); - - // - // Force the timer to be disabled - // - Status =3D TimerDriverSetTimerPeriod (&mTimer, 0); - ASSERT_EFI_ERROR (Status); - - // - // Install interrupt handler for RISC-V Timer. - // - Status =3D mCpu->RegisterInterruptHandler (mCpu, EXCEPT_RISCV_TIMER_INT,= TimerInterruptHandler); - ASSERT_EFI_ERROR (Status); - - // - // Force the timer to be enabled at its default period - // - Status =3D TimerDriverSetTimerPeriod (&mTimer, DEFAULT_TIMER_TICK_DURATI= ON); - ASSERT_EFI_ERROR (Status); - - // - // Install the Timer Architectural Protocol onto a new handle - // - Status =3D gBS->InstallMultipleProtocolInterfaces ( - &mTimerHandle, - &gEfiTimerArchProtocolGuid, &mTimer, - NULL - ); - ASSERT_EFI_ERROR (Status); - return Status; -} diff --git a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h b/P= latform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h deleted file mode 100644 index 8301685c..00000000 --- a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.h +++ /dev/null @@ -1,174 +0,0 @@ -/** @file - RISC-V Timer Architectural Protocol definitions for U5 Series platform, - - Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef U5_SERIES_TIMER_H_ -#define U5_SERIES_TIMER_H_ - -#include - -#include -#include - -#include -#include -#include -#include -#include - -// -// RISC-V use 100us timer. -// The default timer tick duration is set to 10 ms =3D 10 * 1000 * 10 100 = ns units -// -#define DEFAULT_TIMER_TICK_DURATION 100000 - -extern VOID RiscvSetTimerPeriod (UINT32 TimerPeriod); - -// -// Function Prototypes -// -/** - Initialize the Timer Architectural Protocol driver - - @param ImageHandle ImageHandle of the loaded driver - @param SystemTable Pointer to the System Table - - @retval EFI_SUCCESS Timer Architectural Protocol created - @retval EFI_OUT_OF_RESOURCES Not enough resources available to initial= ize driver. - @retval EFI_DEVICE_ERROR A device error occured attempting to init= ialize the driver. - -**/ -EFI_STATUS -EFIAPI -TimerDriverInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -; - -/** - - This function adjusts the period of timer interrupts to the value specif= ied - by TimerPeriod. If the timer period is updated, then the selected timer - period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. = If - the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. - If an error occurs while attempting to update the timer period, then the - timer hardware will be put back in its state prior to this call, and - EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer inter= rupt - is disabled. This is not the same as disabling the CPU's interrupts. - Instead, it must either turn off the timer hardware, or it must adjust t= he - interrupt controller so that a CPU interrupt is not generated when the t= imer - interrupt fires. - - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param NotifyFunction The rate to program the timer interrupt in 100 nS= units. If - the timer hardware is not programmable, then EFI_= UNSUPPORTED is - returned. If the timer is programmable, then the= timer period - will be rounded up to the nearest timer period th= at is supported - by the timer hardware. If TimerPeriod is set to = 0, then the - timer interrupts will be disabled. - - @retval EFI_SUCCESS The timer period was changed. - @retval EFI_UNSUPPORTED The platform cannot change the period o= f the timer interrupt. - @retval EFI_DEVICE_ERROR The timer period could not be changed d= ue to a device error. - -**/ -EFI_STATUS -EFIAPI -TimerDriverRegisterHandler ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - IN EFI_TIMER_NOTIFY NotifyFunction - ) -; - -/** - - This function adjusts the period of timer interrupts to the value specif= ied - by TimerPeriod. If the timer period is updated, then the selected timer - period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. = If - the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. - If an error occurs while attempting to update the timer period, then the - timer hardware will be put back in its state prior to this call, and - EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer inter= rupt - is disabled. This is not the same as disabling the CPU's interrupts. - Instead, it must either turn off the timer hardware, or it must adjust t= he - interrupt controller so that a CPU interrupt is not generated when the t= imer - interrupt fires. - - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod The rate to program the timer interrupt in 100 nS= units. If - the timer hardware is not programmable, then EFI_= UNSUPPORTED is - returned. If the timer is programmable, then the= timer period - will be rounded up to the nearest timer period th= at is supported - by the timer hardware. If TimerPeriod is set to = 0, then the - timer interrupts will be disabled. - - @retval EFI_SUCCESS The timer period was changed. - @retval EFI_UNSUPPORTED The platform cannot change the period o= f the timer interrupt. - @retval EFI_DEVICE_ERROR The timer period could not be changed d= ue to a device error. - -**/ -EFI_STATUS -EFIAPI -TimerDriverSetTimerPeriod ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - IN UINT64 TimerPeriod - ) -; - -/** - - This function retrieves the period of timer interrupts in 100 ns units, - returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPer= iod - is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 = is - returned, then the timer is currently disabled. - - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod A pointer to the timer period to retrieve in 100 = ns units. If - 0 is returned, then the timer is currently disabl= ed. - - @retval EFI_SUCCESS The timer period was returned in TimerPer= iod. - @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. - -**/ -EFI_STATUS -EFIAPI -TimerDriverGetTimerPeriod ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - OUT UINT64 *TimerPeriod - ) -; - -/** - - This function generates a soft timer interrupt. If the platform does not= support soft - timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCE= SS is returned. - If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.Reg= isterHandler() - service, then a soft timer interrupt will be generated. If the timer int= errupt is - enabled when this service is called, then the registered handler will be= invoked. The - registered handler should not be able to distinguish a hardware-generate= d timer - interrupt from a software-generated timer interrupt. - - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - - @retval EFI_SUCCESS The soft timer interrupt was generated. - @retval EFI_UNSUPPORTEDT The platform does not support the generation o= f soft timer interrupts. - -**/ -EFI_STATUS -EFIAPI -TimerDriverGenerateSoftInterrupt ( - IN EFI_TIMER_ARCH_PROTOCOL *This - ) -; - -#endif diff --git a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni b= /Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni deleted file mode 100644 index 38302244..00000000 --- a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/Timer.uni +++ /dev/null @@ -1,14 +0,0 @@ -// /** @file -// -// RISC-V Timer Arch protocol strings. -// -// Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
-// -// SPDX-License-Identifier: BSD-2-Clause-Patent -// -// **/ - - -#string STR_MODULE_ABSTRACT #language en-US "RISC-V timer driv= er that provides Timer Arch protocol" - -#string STR_MODULE_DESCRIPTION #language en-US "RISC-V timer driv= er that provides Timer Arch protocol." diff --git a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.in= f b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf deleted file mode 100644 index 4571621a..00000000 --- a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerDxe.inf +++ /dev/null @@ -1,54 +0,0 @@ -## @file -# RISC-V Timer Arch protocol module for U5 Series platform -# -# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All right= s reserved.
-# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x0001001b - BASE_NAME =3D Timer - MODULE_UNI_FILE =3D Timer.uni - FILE_GUID =3D 3F75D495-23FF-46B6-9D19-0DECC8A4EA91 - MODULE_TYPE =3D DXE_DRIVER - VERSION_STRING =3D 1.0 - ENTRY_POINT =3D TimerDriverInitialize -# -# The following information is for reference only and not required by the = build -# tools. -# -# VALID_ARCHITECTURES =3D RISCV64 -# -[Packages] - MdePkg/MdePkg.dec - Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec - Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec - -[LibraryClasses] - BaseLib - DebugLib - IoLib - MachineModeTimerLib - RiscVCpuLib - RiscVEdk2SbiLib - UefiBootServicesTableLib - UefiDriverEntryPoint - -[Sources] - Timer.h - Timer.c - -[Protocols] - gEfiCpuArchProtocolGuid ## CONSUMES - gEfiTimerArchProtocolGuid ## PRODUCES - -[Pcd] - gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz - -[Depex] - gEfiCpuArchProtocolGuid - -[UserExtensions.TianoCore."ExtraFiles"] - TimerExtra.uni diff --git a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.= uni b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni deleted file mode 100644 index cf25ff14..00000000 --- a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/TimerDxe/TimerExtra.uni +++ /dev/null @@ -1,12 +0,0 @@ -// /** @file -// Timer Localized Strings and Content -// -// Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
-// -// SPDX-License-Identifier: BSD-2-Clause-Patent -// -// **/ - -#string STR_PROPERTIES_MODULE_NAME -#language en-US -"RISC-V Timer DXE Driver" --=20 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102357): https://edk2.groups.io/g/devel/message/102357 Mute This Topic: https://groups.io/mt/98015411/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Tue May 14 21:21:16 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+102358+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102358+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1680448716; cv=none; d=zohomail.com; s=zohoarc; b=LAO/dPt8KocXZ+rMRsnihtpm51N3mpkzmoy6HI/vCER/6y3qukl+KfJrsrW8AuRzkPIAqAOG+wYN8kG02ZNzkSBnblpllhNjqxq5p+Ha998uKHO01XkH+FlVvV5Z00g+ITS7DDW3m9wJsGC0Rdm4s/9Nksf2zvJcGKyeI4EMFwI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1680448716; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=JqC55O72Td+Nt5WsKF9mCc/LUjguyeyA91pnPqxAT1E=; b=muQpXabTiWYeuFf5htg1ramkfobbV4/fwbVMpFhp7r9ZZ4EDrQAUR4WahyI4fCzWPvqVbEi8gQVRZK84orwWu/SeLGXkKJs5/IjrhytEpQPeK6iDKPP9D+VUhxSJ/FYaSqHUAw9fZVR4eTAFfj1Tr0Jr2E0AKZ6/mI3q81U7uU0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102358+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1680448716468442.9266069852465; Sun, 2 Apr 2023 08:18:36 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id HTXZYY1788612xUC4TRYNiI5; Sun, 02 Apr 2023 08:18:36 -0700 X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web11.46847.1680448715581016067 for ; Sun, 02 Apr 2023 08:18:35 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10668"; a="321400342" X-IronPort-AV: E=Sophos;i="5.98,312,1673942400"; d="scan'208";a="321400342" X-Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2023 08:18:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10668"; a="679188165" X-IronPort-AV: E=Sophos;i="5.98,312,1673942400"; d="scan'208";a="679188165" X-Received: from evancy.sh.intel.com ([10.239.158.113]) by orsmga007.jf.intel.com with ESMTP; 02 Apr 2023 08:18:32 -0700 From: "Chai, Evan" To: devel@edk2.groups.io Cc: Daniel Schaefer , Sunil V L , Andrei Warkentin Subject: [edk2-devel] [PATCH 3/5] Silicon/RISC-V: remove redundant RiscVTimerLib Date: Sun, 2 Apr 2023 23:15:40 +0800 Message-Id: <20230402151542.325929-4-evan.chai@intel.com> In-Reply-To: <20230402151542.325929-1-evan.chai@intel.com> References: <20230402151542.325929-1-evan.chai@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,evan.chai@intel.com X-Gm-Message-State: lfj3sQyF5kpLSCknaLNNmwyVx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1680448716; bh=HxCWBnM/zmI7NCB/9PJUtClhkDB4+SJchj0YW/yh6HA=; h=Cc:Date:From:Reply-To:Subject:To; b=WdNh5YKkDiBI8wL2L/hAwPiRml4+dDxkQOMJAgCk36ngtwlh4n/1qdQUGbL++nk+wH0 Z63EnHvYgq5Qva4PgEi1gmOdBBdjSxH9gS7emKR4iiIAB8AoBxpPdj5nVucBIpiCVYfw1 UkrqMk+2j0STrbppT2759D2CfEGHjVZJog8= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1680448717108100001 Content-Type: text/plain; charset="utf-8" It will be replaced by UefiCpuPkg/Library/BaseRiscV64CpuTimerLib. Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc | = 11 ++++++----- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf | = 1 + Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc | = 11 ++++++----- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf | = 1 + Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf | = 35 ----------------------------------- Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c | = 199 -----------------------------------------------------------------------= ---------------------------------------------------------------------------= ----------------------------------------------------- Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc | = 6 +----- 7 files changed, 15 insertions(+), 249 deletions(-) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/P= latform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index c26b4608..95bf5ac4 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -2,6 +2,7 @@ # RISC-V EFI on SiFive VC707 (U500) RISC-V platform # # Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All= rights reserved.
+# Copyright (c) 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -228,7 +229,7 @@ RiscVCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobL= ib/PeiCoreInfoHobLib.inf =20 [LibraryClasses.common.DXE_CORE] - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLi= b.inf HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeC= oreMemoryAllocationLib.inf @@ -245,7 +246,7 @@ =20 [LibraryClasses.common.DXE_RUNTIME_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLi= b.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf @@ -265,7 +266,7 @@ =20 [LibraryClasses.common.UEFI_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLi= b.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf @@ -280,7 +281,7 @@ =20 [LibraryClasses.common.DXE_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLi= b.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeRepor= tStatusCodeLib.inf @@ -300,7 +301,7 @@ =20 [LibraryClasses.common.UEFI_APPLICATION] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLi= b.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf !ifdef $(DEBUG_ON_SERIAL_PORT) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf b/P= latform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf index b17c960d..684d5cae 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.fdf @@ -2,6 +2,7 @@ # Flash definition file on SiFive VC707 (U500) RISC-V platform # # Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All= rights reserved.
+# Copyright (c) 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.d= sc index 4487913f..099c4e22 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc @@ -2,6 +2,7 @@ # RISC-V EFI on SiFive Freedom U540 HiFive Unleashed RISC-V platform # # Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All= rights reserved.
+# Copyright (c) 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -230,7 +231,7 @@ RiscVCoreplexInfoLib|Platform/SiFive/U5SeriesPkg/Library/PeiCoreInfoHobL= ib/PeiCoreInfoHobLib.inf =20 [LibraryClasses.common.DXE_CORE] - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLi= b.inf HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeC= oreMemoryAllocationLib.inf @@ -247,7 +248,7 @@ =20 [LibraryClasses.common.DXE_RUNTIME_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLi= b.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf @@ -267,7 +268,7 @@ =20 [LibraryClasses.common.UEFI_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLi= b.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf @@ -282,7 +283,7 @@ =20 [LibraryClasses.common.DXE_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLi= b.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeRepor= tStatusCodeLib.inf @@ -302,7 +303,7 @@ =20 [LibraryClasses.common.UEFI_APPLICATION] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf + TimerLib|UefiCpuPkg/Library/BaseRiscV64CpuTimerLib/BaseRiscV64CpuTimerLi= b.inf HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf !ifdef $(DEBUG_ON_SERIAL_PORT) diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.fdf b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.f= df index 9ae89647..c2599ee1 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.fdf @@ -2,6 +2,7 @@ # Flash definition file on SiFive Freedom U540 HiFive Unleashed RISC-V pl= atform # # Copyright (c) 2019-2021, Hewlett Packard Enterprise Development LP. All= rights reserved.
+# Copyright (c) 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTim= erLib.inf b/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf deleted file mode 100644 index 3c61149d..00000000 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.i= nf +++ /dev/null @@ -1,35 +0,0 @@ -## @file -# RISC-V Timer Library Instance. -# -# Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. A= ll rights reserved.
-# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION =3D 0x0001001b - BASE_NAME =3D BaseRiscVTimerLib - FILE_GUID =3D F0450728-3221-488E-8C63-BD3A8DF500E2 - MODULE_TYPE =3D BASE - VERSION_STRING =3D 1.0 - LIBRARY_CLASS =3D TimerLib - -[Sources] - RiscVTimerLib.c - -[Packages] - MdePkg/MdePkg.dec - Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dec - -[Pcd] - gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerTickInNanoSecond - gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz - -[LibraryClasses] - BaseLib - PcdLib - RiscVCpuLib - MachineModeTimerLib - - diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLi= b.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c deleted file mode 100644 index 85cd93c5..00000000 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/RiscVTimerLib.c +++ /dev/null @@ -1,199 +0,0 @@ -/** @file - RISC-V instance of Timer Library. - - Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include -#include -#include - -/** - Stalls the CPU for at least the given number of ticks. - - Stalls the CPU for at least the given number of ticks. It's invoked by - MicroSecondDelay() and NanoSecondDelay(). - - @param Delay A period of time to delay in ticks. - -**/ -VOID -InternalRiscVTimerDelay ( - IN UINT32 Delay - ) -{ - UINT32 Ticks; - UINT32 Times; - - Times =3D Delay >> (RISCV_TIMER_COMPARE_BITS - 2); - Delay &=3D ((1 << (RISCV_TIMER_COMPARE_BITS - 2)) - 1); - do { - // - // The target timer count is calculated here - // - Ticks =3D RiscVReadMachineTimerInterface () + Delay; - Delay =3D 1 << (RISCV_TIMER_COMPARE_BITS - 2); - while (((Ticks - RiscVReadMachineTimerInterface ()) & (1 << (RISCV_TIM= ER_COMPARE_BITS - 1))) =3D=3D 0) { - CpuPause (); - } - } while (Times-- > 0); -} - -/** - Stalls the CPU for at least the given number of microseconds. - - Stalls the CPU for the number of microseconds specified by MicroSeconds. - - @param MicroSeconds The minimum number of microseconds to delay. - - @return MicroSeconds - -**/ -UINTN -EFIAPI -MicroSecondDelay ( - IN UINTN MicroSeconds - ) -{ - InternalRiscVTimerDelay ( - (UINT32)DivU64x32 ( - MultU64x32 ( - MicroSeconds, - PcdGet64 (PcdRiscVMachineTimerFrequencyInHerz) - ), - 1000000u - ) - ); - return MicroSeconds; -} - -/** - Stalls the CPU for at least the given number of nanoseconds. - - Stalls the CPU for the number of nanoseconds specified by NanoSeconds. - - @param NanoSeconds The minimum number of nanoseconds to delay. - - @return NanoSeconds - -**/ -UINTN -EFIAPI -NanoSecondDelay ( - IN UINTN NanoSeconds - ) -{ - InternalRiscVTimerDelay ( - (UINT32)DivU64x32 ( - MultU64x32 ( - NanoSeconds, - PcdGet64 (PcdRiscVMachineTimerFrequencyInHerz) - ), - 1000000000u - ) - ); - return NanoSeconds; -} - -/** - Retrieves the current value of a 64-bit free running performance counter. - - Retrieves the current value of a 64-bit free running performance counter= . The - counter can either count up by 1 or count down by 1. If the physical - performance counter counts by a larger increment, then the counter values - must be translated. The properties of the counter can be retrieved from - GetPerformanceCounterProperties(). - - @return The current value of the free running performance counter. - -**/ -UINT64 -EFIAPI -GetPerformanceCounter ( - VOID - ) -{ - return (UINT64)RiscVReadMachineTimerInterface (); -} - -/**return - Retrieves the 64-bit frequency in Hz and the range of performance counter - values. - - If StartValue is not NULL, then the value that the performance counter s= tarts - with immediately after is it rolls over is returned in StartValue. If - EndValue is not NULL, then the value that the performance counter end wi= th - immediately before it rolls over is returned in EndValue. The 64-bit - frequency of the performance counter in Hz is always returned. If StartV= alue - is less than EndValue, then the performance counter counts up. If StartV= alue - is greater than EndValue, then the performance counter counts down. For - example, a 64-bit free running counter that counts up would have a Start= Value - of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter - that counts down would have a StartValue of 0xFFFFFF and an EndValue of = 0. - - @param StartValue The value the performance counter starts with when it - rolls over. - @param EndValue The value that the performance counter ends with bef= ore - it rolls over. - - @return The frequency in Hz. - -**/ -UINT64 -EFIAPI -GetPerformanceCounterProperties ( - OUT UINT64 *StartValue, OPTIONAL - OUT UINT64 *EndValue OPTIONAL - ) -{ - if (StartValue !=3D NULL) { - *StartValue =3D 0; - } - - if (EndValue !=3D NULL) { - *EndValue =3D 32 - 1; - } - - return PcdGet64 (PcdRiscVMachineTimerFrequencyInHerz); -} - -/** - Converts elapsed ticks of performance counter to time in nanoseconds. - - This function converts the elapsed ticks of running performance counter = to - time value in unit of nanoseconds. - - @param Ticks The number of elapsed ticks of running performance cou= nter. - - @return The elapsed time in nanoseconds. - -**/ -UINT64 -EFIAPI -GetTimeInNanoSecond ( - IN UINT64 Ticks - ) -{ - UINT64 NanoSeconds; - UINT32 Remainder; - - // - // Ticks - // Time =3D --------- x 1,000,000,000 - // Frequency - // - NanoSeconds =3D MultU64x32 (DivU64x32Remainder (Ticks, PcdGet64 (PcdRisc= VMachineTimerFrequencyInHerz), &Remainder), 1000000000u); - - // - // Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder = * 1,000,000,000) - // will not overflow 64-bit. - // - NanoSeconds +=3D DivU64x32 (MultU64x32 ((UINT64)Remainder, 1000000000u),= PcdGet64 (PcdRiscVMachineTimerFrequencyInHerz)); - - return NanoSeconds; -} diff --git a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc b/Silicon/RI= SC-V/ProcessorPkg/RiscVProcessorPkg.dsc index 0591cd6a..e0b8f30d 100644 --- a/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc +++ b/Silicon/RISC-V/ProcessorPkg/RiscVProcessorPkg.dsc @@ -2,6 +2,7 @@ # RISC-V processor package. # # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All right= s reserved.
+# Copyright (c) 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -43,7 +44,6 @@ RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.= inf RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/Risc= VEdk2SbiLib.inf RiscVOpensbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVOpensbiLib/Risc= VOpensbiLib.inf - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachine= ModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf #MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachin= eModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf BaseLib|MdePkg/Library/BaseLib/BaseLib.inf @@ -81,20 +81,16 @@ PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf =20 [LibraryClasses.common.DXE_CORE] - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf =20 [LibraryClasses.common.DXE_DRIVER] PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf PlatformBootManagerLib|Platform/RISC-V/PlatformPkg/Library/PlatformBootM= anagerLib/PlatformBootManagerLib.inf =20 [LibraryClasses.common.DXE_RUNTIME_DRIVER] - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf =20 [LibraryClasses.common.UEFI_DRIVER] - TimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTime= rLib.inf =20 [Components] - Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandle= rDxeLib.inf Silicon/RISC-V/ProcessorPkg/Library/RiscVFirmwareContextSbiLib/RiscVFirm= wareContextSbiLib.inf Silicon/RISC-V/ProcessorPkg/Library/PeiServicesTablePointerLibOpenSbi/Pe= iServicesTablePointerLibOpenSbi.inf --=20 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102358): https://edk2.groups.io/g/devel/message/102358 Mute This Topic: https://groups.io/mt/98015412/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Tue May 14 21:21:16 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+102359+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102359+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1680448719; cv=none; d=zohomail.com; s=zohoarc; b=XIX2t8mRHW/6QdeYezg7lEfRYC/c41HJ8fes0B9FElRunS785tsHeeiqiaGeDImzQPa5aQH9y7iEa4nY9AlW/ZUOPB72D89YYu68Sc0oM7XBXCZLc5A9B0Hzo43xDP4N3gcnKC0u899yilM8K3HJQhMk6nRvbI4M2W1Ynxp5GSo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1680448719; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=5FONY+x9Qzvt7SIWEzRS+YfALDR7OnN1wUKbXNzZWOM=; b=XrHXmAYtSeFPMatybTq3ZkDdwDRAoXrxdcRx/V3bV1vih7WEMIRzIUTRxDJ2KM7l7ytFD55hmGt7kxh6Rob2hAUuvfNrmr3xez69eml+LTgeqC3BLCO1Vzh5B3yXc2kIIAL658kMG4NcRFq6I8pLbrMiQkVvSGCRBmABs8jiJMo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102359+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1680448719868634.2768644709772; Sun, 2 Apr 2023 08:18:39 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id UAQzYY1788612xtZkY1Twx6f; Sun, 02 Apr 2023 08:18:39 -0700 X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web11.46847.1680448715581016067 for ; Sun, 02 Apr 2023 08:18:39 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10668"; a="321400359" X-IronPort-AV: E=Sophos;i="5.98,312,1673942400"; d="scan'208";a="321400359" X-Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2023 08:18:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10668"; a="679188170" X-IronPort-AV: E=Sophos;i="5.98,312,1673942400"; d="scan'208";a="679188170" X-Received: from evancy.sh.intel.com ([10.239.158.113]) by orsmga007.jf.intel.com with ESMTP; 02 Apr 2023 08:18:37 -0700 From: "Chai, Evan" To: devel@edk2.groups.io Cc: Daniel Schaefer , Sunil V L , Andrei Warkentin Subject: [edk2-devel] [PATCH 4/5] Silicon/RISC-V: remove redundant function code from RiscVCpuLib Date: Sun, 2 Apr 2023 23:15:41 +0800 Message-Id: <20230402151542.325929-5-evan.chai@intel.com> In-Reply-To: <20230402151542.325929-1-evan.chai@intel.com> References: <20230402151542.325929-1-evan.chai@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,evan.chai@intel.com X-Gm-Message-State: 0jAQFfB0srvaT5rFj3aUWvLTx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1680448719; bh=wDWrDn4lrME50wKzYJdEdsKFCqZiUt6d4/LpSYgJlXg=; h=Cc:Date:From:Reply-To:Subject:To; b=CHe5qJUMXV7Q1eYAIHPGXfwsQRrbh/O7VZB3bTEYy+6Vp1r5f8tTvYZx2knz40tjXjs FRkkounFioIAr3g/QgN21aBmjunB+0pHi/nBwvs8T0yIrH4ayty3SnYnw3nNPG22pft2w jkUwhlhdWSUv1OypaMreMoqw2bd/rHy7+bg= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1680448721072100001 Content-Type: text/plain; charset="utf-8" They had been implemented in MdePkg/Library/BaseLib Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h | 20 +----------= --------- Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S | 41 +----------= ------------------------------ 2 files changed, 2 insertions(+), 59 deletions(-) diff --git a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h b/Si= licon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h index efe85489..f1555843 100644 --- a/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h +++ b/Silicon/RISC-V/ProcessorPkg/Include/Library/RiscVCpuLib.h @@ -2,6 +2,7 @@ RISC-V CPU library definitions. =20 Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
+ Copyright (c) 2023, Intel Corporation. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -96,23 +97,4 @@ RiscVReadMachineImplementId ( VOID ); =20 -VOID - RiscVSetSupervisorAddressTranslationRegister (UINT64); - -VOID - RiscVSetSupervisorScratch (UINT64); - -UINT64 -RiscVGetSupervisorScratch ( - VOID - ); - -VOID - RiscVSetSupervisorStvec (UINT64); - -UINT64 -RiscVGetSupervisorStvec ( - VOID - ); - #endif diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S b/Silico= n/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S index e242c9b8..52ef0788 100644 --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/Cpu.S @@ -3,6 +3,7 @@ // RISC-V CPU functions. // // Copyright (c) 2016 - 2021, Hewlett Packard Enterprise Development LP. A= ll rights reserved.
+// Copyright (c) 2023, Intel Corporation. All rights reserved.
// // SPDX-License-Identifier: BSD-2-Clause-Patent // @@ -101,43 +102,3 @@ ASM_FUNC (RiscVReadMachineImplementId) csrr a0, RISCV_CSR_MACHINE_MIMPID ret =20 -// -// Set Supervisor mode scratch. -// @param a0 : Value set to Supervisor mode scratch -// -ASM_FUNC (RiscVSetSupervisorScratch) - csrrw a1, RISCV_CSR_SUPERVISOR_SSCRATCH, a0 - ret - -// -// Get Supervisor mode scratch. -// @retval a0 : Value in Supervisor mode scratch -// -ASM_FUNC (RiscVGetSupervisorScratch) - csrr a0, RISCV_CSR_SUPERVISOR_SSCRATCH - ret - -// -// Set Supervisor mode trap vector. -// @param a0 : Value set to Supervisor mode trap vector -// -ASM_FUNC (RiscVSetSupervisorStvec) - csrrw a1, RISCV_CSR_SUPERVISOR_STVEC, a0 - ret - -// -// Get Supervisor mode scratch. -// @retval a0 : Value in Supervisor mode trap vector -// -ASM_FUNC (RiscVGetSupervisorStvec) - csrr a0, RISCV_CSR_SUPERVISOR_STVEC - ret - -// -// Set Supervisor Address Translation and -// Protection Register. -// -ASM_FUNC (RiscVSetSupervisorAddressTranslationRegister) - csrw RISCV_CSR_SUPERVISOR_SATP, a0 - ret - --=20 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102359): https://edk2.groups.io/g/devel/message/102359 Mute This Topic: https://groups.io/mt/98015415/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Tue May 14 21:21:16 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+102360+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102360+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1680448724; cv=none; d=zohomail.com; s=zohoarc; b=IeA2EryNTI9gKkpkQxsS1+VcZDOPmUjLIRayTqRTHPLhFkXenM59ihDccQKjWjOA81bJgP/hivMXcZFJGaGZlKjZCs+rE1zYQO73ohZwsHKXe0jVkOpTCvJ7Z57ZaOPk0aR7KLa2eWgqf4Bu3OOtxurxKsOmouSBt5eOm0Q7cTs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1680448724; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=ZO0nrPBQgXYu5zgS/dErm4Ar9SFH4hWXlaDCu9tzxQ4=; b=QW+1QxNjJWKJQssbPRbQT4mOIC2/i8/eKNOlAf5wru45BCOEdWSaJmEMeS0bnote9dPFZ+5WlUIw+QhcNqTQ72qCWsgfcqD2J/KR023u4gb8AUdn3Ex9x+8NeYN9pcQ+eAMUpt4c/EH8yddhuG3S5x5ILYwokGU9ThvBvAPqW3M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102360+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1680448724027199.79463726884512; Sun, 2 Apr 2023 08:18:44 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 8Db8YY1788612xhvizsn9Dnd; Sun, 02 Apr 2023 08:18:43 -0700 X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web11.46847.1680448715581016067 for ; Sun, 02 Apr 2023 08:18:43 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10668"; a="321400377" X-IronPort-AV: E=Sophos;i="5.98,312,1673942400"; d="scan'208";a="321400377" X-Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2023 08:18:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10668"; a="679188176" X-IronPort-AV: E=Sophos;i="5.98,312,1673942400"; d="scan'208";a="679188176" X-Received: from evancy.sh.intel.com ([10.239.158.113]) by orsmga007.jf.intel.com with ESMTP; 02 Apr 2023 08:18:41 -0700 From: "Chai, Evan" To: devel@edk2.groups.io Cc: Daniel Schaefer , Sunil V L , Andrei Warkentin Subject: [edk2-devel] [PATCH 5/5] Platform/ Siliocn/: Fix building failure caused by wrong lib. Date: Sun, 2 Apr 2023 23:15:42 +0800 Message-Id: <20230402151542.325929-6-evan.chai@intel.com> In-Reply-To: <20230402151542.325929-1-evan.chai@intel.com> References: <20230402151542.325929-1-evan.chai@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,evan.chai@intel.com X-Gm-Message-State: LlZ60qGnfBUe81wvyWO7O4fqx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1680448723; bh=m5xpCH0Rt+TZRjJR0KKva6CwugoldlLDhPewK1/YZM8=; h=Cc:Date:From:Reply-To:Subject:To; b=kCzXDGSX0t4vUK3tRzUbaZnrm9c9E20K+HZG4FkqORk9AoqSCgYMkbhXhfsmRltTVNi bzM+Z9Va4QERqnP7RJHOjMyiEaEQfOy6+PiNXPpYz/JW/q8ZR62Y3z3JJMp0KI6aPLix8 WOTQ1mfWx/dlThVyVhsTDri4G+eXPB3ZUmU= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1680448725099100002 Content-Type: text/plain; charset="utf-8" RiscVSbiLib was implemented in MdePkg/Library/BaseRiscVSbiLib. Cc: Daniel Schaefer Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Evan Chai --- Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c = | 4 +++- Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf = | 4 +++- Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf = | 3 ++- Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc = | 4 ++-- Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc = | 4 ++-- Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServ= icesRuntimeDxe.inf | 2 ++ Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf = | 3 ++- 7 files changed, 16 insertions(+), 8 deletions(-) diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystem= Lib.c b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c index 524b0a63..30ec8a8b 100644 --- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c +++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c @@ -2,13 +2,15 @@ Reset System Library functions for RISC-V =20 Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.=
+ Copyright (c) 2023, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ =20 #include #include -#include +#include =20 /** This function causes a system-wide reset (cold reset), in which diff --git a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystem= Lib.inf b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib= .inf index 8987adb9..605d9efd 100644 --- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf +++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf @@ -2,6 +2,8 @@ # Library instance for ResetSystem library class for RISC-V using SBI eca= lls # # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+# Copyright (c) 2023, Intel Corporation. All rights reserved.
+# # SPDX-License-Identifier: BSD-2-Clause-Patent # =20 @@ -29,4 +31,4 @@ =20 [LibraryClasses] DebugLib - RiscVEdk2SbiLib + RiscVSbiLib diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf b/Platfo= rm/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf index 1e8d53f4..8eef9fbb 100644 --- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf +++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf @@ -2,6 +2,7 @@ # RISC-V SEC module. # # Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+# Copyright (c) 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -52,7 +53,7 @@ RiscVCpuLib RiscVOpensbiLib RiscVOpensbiPlatformLib - RiscVEdk2SbiLib + RiscVSbiLib =20 [FixedPcd] gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc b/P= latform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc index 95bf5ac4..4dc24386 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc @@ -148,10 +148,10 @@ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf !endif RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.= inf - RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/Risc= VEdk2SbiLib.inf + RiscVSbiLib|MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformT= imerLib/RiscVPlatformTimerLib.inf MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachine= ModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf - CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptio= nLib/CpuExceptionHandlerDxeLib.inf + CpuExceptionHandlerLib|UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandler= Lib/BaseRiscV64CpuExceptionHandlerLib.inf =20 # Flattened Device Tree (FDT) access library FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U5= 40.dsc b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.d= sc index 099c4e22..9dff112d 100644 --- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc @@ -149,11 +149,11 @@ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf !endif RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.= inf - RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/Risc= VEdk2SbiLib.inf + RiscVSbiLib|MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformT= imerLib/RiscVPlatformTimerLib.inf #MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachin= eModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachine= ModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf - CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptio= nLib/CpuExceptionHandlerDxeLib.inf + CpuExceptionHandlerLib|UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandler= Lib/BaseRiscV64CpuExceptionHandlerLib.inf =20 =20 # Flattened Device Tree (FDT) access library diff --git a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntim= eDxe/FvbServicesRuntimeDxe.inf b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/= RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf index 1158fe62..773b149b 100644 --- a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/Fv= bServicesRuntimeDxe.inf +++ b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/Fv= bServicesRuntimeDxe.inf @@ -6,6 +6,7 @@ # Protocol for a RAM flash device. # # Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+# Copyright (c) 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -37,6 +38,7 @@ MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec + Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec =20 [LibraryClasses] BaseLib diff --git a/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib= .inf b/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf index 072024dc..13c25506 100644 --- a/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf +++ b/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf @@ -2,6 +2,7 @@ # Library instance to create core information HOB # # Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
+# Copyright (c) 2023, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -38,7 +39,7 @@ MemoryAllocationLib PrintLib FirmwareContextProcessorSpecificLib - RiscVEdk2SbiLib + RiscVSbiLib =20 [FixedPcd] gUefiRiscVPkgTokenSpaceGuid.PcdProcessorSpecificDataGuidHobGuid --=20 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102360): https://edk2.groups.io/g/devel/message/102360 Mute This Topic: https://groups.io/mt/98015416/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-