From nobody Fri May 17 18:13:23 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+102059+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102059+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1680027162; cv=none; d=zohomail.com; s=zohoarc; b=eRx3U3A48XPXDGmNaVOpEjb5PzM4ixpk2OMBaNygk3nCnOFjgv7KXkPhbP3uH/2KgCjRUHDLotso9SFkAJYYBC0see4Gmjt2Srx6lAG1NUU3pG7kqz/sqMQZFKVUDaRAOMfvwiUIrK4vjOKuCwRCKiY5wv7gjagsf5vtzrZNnDc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1680027162; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=CoaJt/w9HbCGGkPNQgFt/mvY/UhyTbv0TWsstGEqZTw=; b=fvC1HUFr7i6BrbxVgfp6bMnPU19cF43t8BQEASpp2H/YGAZGLHnOZHFZksl9aOQbLN0fWXMxVS63MnhlBZIoKqqkYTbIShavpIY9bI6BCATWiY89dqgTgGThn095GMkYsfOxaX7Svh9+r1Ne/nD4hmyfWh40fTvIAiJLGJmCAlU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+102059+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1680027162905150.16015257739127; Tue, 28 Mar 2023 11:12:42 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 9B0lYY1788612x8bPLls4Exb; Tue, 28 Mar 2023 11:12:42 -0700 X-Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web10.3805.1680027161781198535 for ; Tue, 28 Mar 2023 11:12:41 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10663"; a="368419199" X-IronPort-AV: E=Sophos;i="5.98,297,1673942400"; d="scan'208";a="368419199" X-Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Mar 2023 11:12:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10663"; a="634158661" X-IronPort-AV: E=Sophos;i="5.98,297,1673942400"; d="scan'208";a="634158661" X-Received: from cchiu4-mobl.gar.corp.intel.com ([10.209.110.210]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Mar 2023 11:12:40 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Star Zeng , Ray Ni Subject: [edk2-devel] [PATCH] IntelFsp2Pkg: LoadMicrocodeDefault() causing unnecessary delay. Date: Tue, 28 Mar 2023 11:12:28 -0700 Message-Id: <20230328181228.998-1-chasel.chiu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,chasel.chiu@intel.com X-Gm-Message-State: w7XRZf6HZeMnrDCHmIVFzMvsx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1680027162; bh=C7ZDu4tc4QleJUpbYPOCp0chOXUDpNY1zy+S78UuDvQ=; h=Cc:Date:From:Reply-To:Subject:To; b=mS9M1sbooSTW/qd2ioe7RSMxOBgOqwskR12zygc1T4DbzZTIk1bMXqqiFszrLZ7Axy9 HL05Mo/MjDs7Bu1IT9px9vtaiHFpCNnogSGAKnWZxLwkQkq+fC2sP+kntPNPyWKkm+Rz7 BnketjBUdEqW2Ykq3rUaRIbIAo4kHlAjmK0= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1680027163946100002 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4391 FSP should support the scenario that CPU microcode already loaded before calling LoadMicrocodeDefault(), in this case it should return directly without spending more time. Also the LoadMicrocodeDefault() should only attempt to load one version of the microcode for current CPU and return. Cc: Nate DeSimone Cc: Star Zeng Cc: Ray Ni Signed-off-by: Chasel Chiu --- IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 17 +++++++++++++++-- IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm | 15 +++++++++++++-- 2 files changed, 28 insertions(+), 4 deletions(-) diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm b/IntelFsp2Pkg/= FspSecCore/Ia32/FspApiEntryT.nasm index 2cff8b3643..606bf0b08b 100644 --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm @@ -245,6 +245,19 @@ ASM_PFX(LoadMicrocodeDefault): cmp esp, 0 jz ParamError =20 + ; + ; If microcode already loaded before this function, exit this function = with SUCCESS. + ; + mov eax, 1 + cpuid + mov ecx, MSR_IA32_BIOS_SIGN_ID + rdmsr ; Get current microcode signature + xor eax, eax + test edx, edx + jnz Exit2 + + + ; skip loading Microcode if the MicrocodeCodeSize is zero ; and report error if size is less than 2k ; first check UPD header revision @@ -450,7 +463,7 @@ LoadCheck: =20 ; Verify this microcode update is not already loaded cmp dword [esi + MicrocodeHdr.MicrocodeHdrRevision], edx - je Continue + je Done ; if already one version microcode loaded, go to done =20 LoadMicrocode: ; EAX contains the linear address of the start of the Update Data @@ -464,7 +477,7 @@ LoadMicrocode: wrmsr mov eax, 1 cpuid - + jmp Done ; if already one version microcode loaded, go to done Continue: jmp NextMicrocode =20 diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm b/IntelFsp2Pkg/F= spSecCore/X64/FspApiEntryT.nasm index b32fa32a89..d9407b6fdb 100644 --- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm +++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm @@ -141,6 +141,17 @@ ASM_PFX(LoadMicrocodeDefault): jz ParamError mov rsp, rcx =20 + ; + ; If microcode already loaded before this function, exit this function = with SUCCESS. + ; + mov eax, 1 + cpuid + mov ecx, MSR_IA32_BIOS_SIGN_ID + rdmsr ; Get current microcode signature + xor rax, rax + test edx, edx + jnz Exit2 + ; skip loading Microcode if the MicrocodeCodeSize is zero ; and report error if size is less than 2k ; first check UPD header revision @@ -291,7 +302,7 @@ LoadCheck: =20 ; Verify this microcode update is not already loaded cmp dword [esi + MicrocodeHdr.MicrocodeHdrRevision], edx - je Continue + je Done ; if already one version microcode loaded, go to done =20 LoadMicrocode: ; EAX contains the linear address of the start of the Update Data @@ -305,7 +316,7 @@ LoadMicrocode: wrmsr mov eax, 1 cpuid - + jmp Done ; if already one version microcode loaded, go to done Continue: jmp NextMicrocode =20 --=20 2.35.0.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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