From nobody Sun May 19 05:00:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+99021+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99021+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1674654996; cv=none; d=zohomail.com; s=zohoarc; b=dsylQAc9Gcn1y0DXSwRybR0wTbOkQlrfKpGLr95+OfyUwMVDCIB9vdklqreW/mtbPcWeVkPQ96pnDXsOZNVXSzH02xivA1Ijv09D3s1+3aVe8HhoQ4aADKKz/Ns8ghjoi327A/N9Bw2zSzOQRJ2F/aeseV+eibWACKZRNQ7yZYE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1674654996; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=BKMNmqAijpQi15iUrGGVVNsjQeAG4kfCIAvbRGgAQW8=; b=jmzUaN+bUsLyUKZ0C/oTAV8ILetNIF5fZVN8qm8d7WjnNzYJKDgXf6Wcd+8b/X/mpXx0hJ0cWuXZCuYk9bsLLOMGOFuQOloQ9xOlC/C/ovilHZayO5Hc7ti7xnUp5FhlE2g4cy0tJFgrc0nHYvdNK0hYQdvp+rqzhT4DcPC7tro= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99021+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1674654996323986.253691181088; Wed, 25 Jan 2023 05:56:36 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id ofP9YY1788612x4x2q8WRPcw; Wed, 25 Jan 2023 05:56:36 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web11.45459.1674654995059731095 for ; Wed, 25 Jan 2023 05:56:35 -0800 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-367-zohxGCClPfu8GHDRhPrf5w-1; Wed, 25 Jan 2023 08:56:31 -0500 X-MC-Unique: zohxGCClPfu8GHDRhPrf5w-1 X-Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 26504101A52E; Wed, 25 Jan 2023 13:56:30 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.186]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BC2DB40C200C; Wed, 25 Jan 2023 13:56:29 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 3BC3718009C0; Wed, 25 Jan 2023 14:56:28 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Min Xu , Erdem Aktas , Ard Biesheuvel , Pawel Polawski , Julien Grall , Oliver Steffen , Tom Lendacky , Gerd Hoffmann , Jordan Justen , Jiewen Yao , Anthony Perard , Michael Roth , James Bottomley Subject: [edk2-devel] [PATCH 1/3] OvmfPkg/PlatformInitLib: update address space layout comment Date: Wed, 25 Jan 2023 14:56:26 +0100 Message-Id: <20230125135628.1896096-2-kraxel@redhat.com> In-Reply-To: <20230125135628.1896096-1-kraxel@redhat.com> References: <20230125135628.1896096-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com X-Gm-Message-State: HrQsX3hy2HdAyMQYMo59VTwex1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1674654996; bh=c+ZAMIfyc4UJCtRoyYT/kK4h9BgRwNhbDPdL5Cz7lSo=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=VkXdU16cHk0iMENJnY2SIyJajX2syFQq7Fs850UGPMxwnL3psH+x/eH/nWOL/iaZY8C vRemejQYI3asG7sycqmQ9gVmRYutccWhFDRktdE6ZeooO/Zds+/x7/OUIexNWpF6vdcRV hasASI4S0d4AiSindkKiq7+B9D1HoPkPpvc= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1674654997634100002 Content-Type: text/plain; charset="utf-8"; x-default="true" Move the commment up so it is placed just before the address space calculations start. Also add q35 memory layout. Signed-off-by: Gerd Hoffmann --- OvmfPkg/Library/PlatformInitLib/Platform.c | 36 ++++++++++++---------- 1 file changed, 19 insertions(+), 17 deletions(-) diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/P= latformInitLib/Platform.c index 9fee6e481038..678e8e329023 100644 --- a/OvmfPkg/Library/PlatformInitLib/Platform.c +++ b/OvmfPkg/Library/PlatformInitLib/Platform.c @@ -152,26 +152,12 @@ PlatformMemMapInitialization ( return; } =20 - PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); - PciExBarBase =3D 0; - if (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) { - // - // The MMCONFIG area is expected to fall between the top of low RAM and - // the base of the 32-bit PCI host aperture. - // - PciExBarBase =3D PcdGet64 (PcdPciExpressBaseAddress); - ASSERT (PlatformInfoHob->LowMemory <=3D PciExBarBase); - ASSERT (PciExBarBase <=3D MAX_UINT32 - SIZE_256MB); - PciBase =3D (UINT32)(PciExBarBase + SIZE_256MB); - } else { - ASSERT (PlatformInfoHob->LowMemory <=3D PlatformInfoHob->Uc32Base); - PciBase =3D PlatformInfoHob->Uc32Base; - } - // // address purpose size // ------------ -------- ------------------------- - // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g) + // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g) (pc) + // 0xB0000000 MMCONFIG 256 MB (q35) + // 0xC0000000 PCI MMIO 960 MB (q35) // 0xFC000000 gap 44 MB // 0xFEC00000 IO-APIC 4 KB // 0xFEC01000 gap 1020 KB @@ -181,6 +167,22 @@ PlatformMemMapInitialization ( // 0xFED20000 gap 896 KB // 0xFEE00000 LAPIC 1 MB // + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); + PciExBarBase =3D 0; + if (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) { + // + // The MMCONFIG area is expected to fall between the top of low RAM and + // the base of the 32-bit PCI host aperture. + // + PciExBarBase =3D PcdGet64 (PcdPciExpressBaseAddress); + ASSERT (PlatformInfoHob->LowMemory <=3D PciExBarBase); + ASSERT (PciExBarBase <=3D MAX_UINT32 - SIZE_256MB); + PciBase =3D (UINT32)(PciExBarBase + SIZE_256MB); + } else { + ASSERT (PlatformInfoHob->LowMemory <=3D PlatformInfoHob->Uc32Base); + PciBase =3D PlatformInfoHob->Uc32Base; + } + PciSize =3D 0xFC000000 - PciBase; PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize); =20 --=20 2.39.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#99021): https://edk2.groups.io/g/devel/message/99021 Mute This Topic: https://groups.io/mt/96520279/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 05:00:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+99024+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99024+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1674654999; cv=none; d=zohomail.com; s=zohoarc; b=LEFbxVN5Q1SKkWcjoL2mxbx1UjpNXLOnLvrd+paIuKymnCAiKeUOEwAbpkyhw03Votx6woQU9BtvUKJF2i+6jXO3QiFeVPywuU1cpM+OUDC6oEr91Zf8wj2vP+hX4O26vbCsNVdIcW33AoqiOhIXPTs5kTJH3DwVqQ9VGMtBVP8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1674654999; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=cDfnXOZf9y6vTmX6I/O8XP4qHue7Cv8sN2asRETchLI=; b=a+S3JWVHQsa3KEGH9WEU9j+A6jkAtO0wF+ysHh56DbrZ9pcPCJfEiVQVBAtcnDNw97ybWdec32w7YZOzFgDlj3vXmI0XP8CpN3Y30O+BA3BD2Qk9SWPaVQxfaJHIbvImMbgcmZgsZ7e/KCOx9LqI9Lh60NrRfi1yvarl390425M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99024+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1674654999455496.6595478485648; Wed, 25 Jan 2023 05:56:39 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id KC3FYY1788612xIl1h3nEfrL; Wed, 25 Jan 2023 05:56:39 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web11.45464.1674654998255779314 for ; Wed, 25 Jan 2023 05:56:38 -0800 X-Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-158-V7tRC2GEMYeb5vsk1wk4wA-1; Wed, 25 Jan 2023 08:56:32 -0500 X-MC-Unique: V7tRC2GEMYeb5vsk1wk4wA-1 X-Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 061C81C00403; Wed, 25 Jan 2023 13:56:32 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.186]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6B11E1121339; Wed, 25 Jan 2023 13:56:31 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 4163E18009CC; Wed, 25 Jan 2023 14:56:28 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Min Xu , Erdem Aktas , Ard Biesheuvel , Pawel Polawski , Julien Grall , Oliver Steffen , Tom Lendacky , Gerd Hoffmann , Jordan Justen , Jiewen Yao , Anthony Perard , Michael Roth , James Bottomley Subject: [edk2-devel] [PATCH 2/3] OvmfPkg/PlatformInitLib: move mmconfig to 0xe0000000 Date: Wed, 25 Jan 2023 14:56:27 +0100 Message-Id: <20230125135628.1896096-3-kraxel@redhat.com> In-Reply-To: <20230125135628.1896096-1-kraxel@redhat.com> References: <20230125135628.1896096-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.3 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com X-Gm-Message-State: xYLtWvJy3ge0IH4VXCTJMjy9x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1674654999; bh=u2oWZZPEi2xUejzEvHyFGe4jmcoHnSVRofrhihhvhPQ=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=Z6es+iegJW4u84ho13PiYrAsRhhK8NJju7PrbNXh9s7HFZy7EAi/XKqO4IXVgQ5cR68 v4J1stf2vcsTdAuebo1n44QQB+QI9qbUDEs8grzOn+Mbsv4ozNgtM3UCky1UDSbHG7ILg 0s9UlIqjTiEjdzKq/fQ6jEcVZttbqajwEm0= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1674654999884100003 Content-Type: text/plain; charset="utf-8"; x-default="true" Also swap the ordering of 32bit PCI MMIO window on q35, i.e. use the room between end of low memory and the start of the mmconfig bar. With a typical configuration on modern qemu with gigabyte-aligned memory the MMIO window start at 0x8000000, sized 1532 MB. In case there is memory present above 0x80000000 the window will start at 0xc0000000 instead, with 512 MB size. This depends on qemu commit 4a4418369d6d ("q35: fix mmconfig and PCI0._CRS"), so it raises the bar for the lowest supported version to qemu 4.1 (released Aug 2019). Signed-off-by: Gerd Hoffmann --- OvmfPkg/AmdSev/AmdSevX64.dsc | 2 +- OvmfPkg/IntelTdx/IntelTdxX64.dsc | 2 +- OvmfPkg/OvmfPkgIa32.dsc | 2 +- OvmfPkg/OvmfPkgIa32X64.dsc | 2 +- OvmfPkg/OvmfPkgX64.dsc | 2 +- OvmfPkg/OvmfXen.dsc | 2 +- OvmfPkg/Library/PlatformInitLib/Platform.c | 10 +++++----- 7 files changed, 11 insertions(+), 11 deletions(-) diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc index 36100f5fdc11..0e1574959cd1 100644 --- a/OvmfPkg/AmdSev/AmdSevX64.dsc +++ b/OvmfPkg/AmdSev/AmdSevX64.dsc @@ -443,7 +443,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX6= 4.dsc index 0f1e970fbbb3..3534716f907f 100644 --- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc +++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc @@ -445,7 +445,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 # # The NumberOfPages values below are ad-hoc. They are updated sporadical= ly at diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc index f232de13a7b6..d2a66e4f6717 100644 --- a/OvmfPkg/OvmfPkgIa32.dsc +++ b/OvmfPkg/OvmfPkgIa32.dsc @@ -557,7 +557,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc index a9d422bd9169..4a76cd7a5d44 100644 --- a/OvmfPkg/OvmfPkgIa32X64.dsc +++ b/OvmfPkg/OvmfPkgIa32X64.dsc @@ -562,7 +562,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc index 3f970a79a08a..d89cf58f15a9 100644 --- a/OvmfPkg/OvmfPkgX64.dsc +++ b/OvmfPkg/OvmfPkgX64.dsc @@ -582,7 +582,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc index c328987e8432..18144d9a6d94 100644 --- a/OvmfPkg/OvmfXen.dsc +++ b/OvmfPkg/OvmfXen.dsc @@ -434,7 +434,7 @@ [PcdsFixedAtBuild] # # On Q35 machine types that QEMU intends to support in the long term, QE= MU # never lets the RAM below 4 GB exceed 2816 MB. - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 =20 !if $(SOURCE_DEBUG_ENABLE) =3D=3D TRUE gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2 diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/P= latformInitLib/Platform.c index 678e8e329023..5cf8af825a2f 100644 --- a/OvmfPkg/Library/PlatformInitLib/Platform.c +++ b/OvmfPkg/Library/PlatformInitLib/Platform.c @@ -156,8 +156,8 @@ PlatformMemMapInitialization ( // address purpose size // ------------ -------- ------------------------- // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g) (pc) - // 0xB0000000 MMCONFIG 256 MB (q35) - // 0xC0000000 PCI MMIO 960 MB (q35) + // max(top, 2g) PCI MMIO 0xE0000000 - max(top, 2g) (q35) + // 0xE0000000 MMCONFIG 256 MB (q35) // 0xFC000000 gap 44 MB // 0xFEC00000 IO-APIC 4 KB // 0xFEC01000 gap 1020 KB @@ -168,6 +168,7 @@ PlatformMemMapInitialization ( // 0xFEE00000 LAPIC 1 MB // PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); + PciBase =3D PlatformInfoHob->Uc32Base; PciExBarBase =3D 0; if (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) { // @@ -177,13 +178,12 @@ PlatformMemMapInitialization ( PciExBarBase =3D PcdGet64 (PcdPciExpressBaseAddress); ASSERT (PlatformInfoHob->LowMemory <=3D PciExBarBase); ASSERT (PciExBarBase <=3D MAX_UINT32 - SIZE_256MB); - PciBase =3D (UINT32)(PciExBarBase + SIZE_256MB); + PciSize =3D (UINT32)(PciExBarBase - PciBase); } else { ASSERT (PlatformInfoHob->LowMemory <=3D PlatformInfoHob->Uc32Base); - PciBase =3D PlatformInfoHob->Uc32Base; + PciSize =3D 0xFC000000 - PciBase; } =20 - PciSize =3D 0xFC000000 - PciBase; PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize); =20 PlatformInfoHob->PcdPciMmio32Base =3D PciBase; --=20 2.39.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#99024): https://edk2.groups.io/g/devel/message/99024 Mute This Topic: https://groups.io/mt/96520282/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sun May 19 05:00:13 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+99023+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99023+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1674654997; cv=none; d=zohomail.com; s=zohoarc; b=eI6Pajz2uHPGC4CiFlclwZtl68yNU3E635ktElLeq7cxHt0Wsd0sidFdeEBRDwaaOjpOU4kkgEY18kon6MSLHT8d/EJFx48ZuXq29IEFOJaINUJx+Bu4pfQjScdo3/tQ50CJFeBsbHSULfSIVrC3DrIboRYrgVTS+SJycXelwm0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1674654997; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=Y434yhgE95ZyP2YaO0kDEkAWf2+jtWjcGp2ylqu5V74=; b=RJpPD6k/BNW48kwp9GsUGFAC2laftvb4l1cVCPubTIHfwJEnZxCPku4Ae+IIpBqNSmqjVFkNp2FjtTeVRtbcJ9LWSz0f1pPERzsh3jEn/dl7ME4TfnIiimx9KmnFvHHxJ7TsI6LyLnRELfOCev+j1XmJ11bN8BcAwOxhbjpIhnQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+99023+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1674654997613284.1136566730837; Wed, 25 Jan 2023 05:56:37 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id RwaLYY1788612xMfMVloalMd; Wed, 25 Jan 2023 05:56:37 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web10.45349.1674654996319482684 for ; Wed, 25 Jan 2023 05:56:36 -0800 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-481-84fz1qm1MpaHJthsRq5gfw-1; Wed, 25 Jan 2023 08:56:32 -0500 X-MC-Unique: 84fz1qm1MpaHJthsRq5gfw-1 X-Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id C50CE1991C42; Wed, 25 Jan 2023 13:56:31 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.186]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 67DC01121333; Wed, 25 Jan 2023 13:56:31 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 4594818009D9; Wed, 25 Jan 2023 14:56:28 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Min Xu , Erdem Aktas , Ard Biesheuvel , Pawel Polawski , Julien Grall , Oliver Steffen , Tom Lendacky , Gerd Hoffmann , Jordan Justen , Jiewen Yao , Anthony Perard , Michael Roth , James Bottomley Subject: [edk2-devel] [PATCH 3/3] OvmfPkg/PlatformInitLib: simplify mtrr setup Date: Wed, 25 Jan 2023 14:56:28 +0100 Message-Id: <20230125135628.1896096-4-kraxel@redhat.com> In-Reply-To: <20230125135628.1896096-1-kraxel@redhat.com> References: <20230125135628.1896096-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.3 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com X-Gm-Message-State: FiAWjGn9oHXYsPHsBk8XRk7nx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1674654997; bh=0+N/vKPsVFhysQU6zZZkzZbeL8uOV4k4nW8OTmOyl9w=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=ECJNNuoiBX4Fu0mUDAynIIg4QIzSEER+CYWoZylAkbpqQxgiQW+uTKCxO3QPIXrqMTP k68kolMBPuojU6calTzirr0xDc9t0BmV0ir8UyJr7s4p95+ZLeF9femiG2O5cbns3EyRu Ay3GW2f3XMRnz2msUNUnyEDWdmOWwc/WO/w= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1674654999860100001 Content-Type: text/plain; charset="utf-8"; x-default="true" With the new mmconfig location at 0xe0000000 above the 32-bit PCI MMIO window we don't have to special-case the mmconfig xbar any more. We'll just add a mtrr uncachable entry starting at MMIO window base and ending at 4GB. Update comments to match reality. Signed-off-by: Gerd Hoffmann --- OvmfPkg/Library/PlatformInitLib/MemDetect.c | 36 +++++++++------------ 1 file changed, 15 insertions(+), 21 deletions(-) diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/= PlatformInitLib/MemDetect.c index 5aeeeff89f57..fd5ae42243ba 100644 --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c @@ -61,33 +61,20 @@ PlatformQemuUc32BaseInitialization ( return; } =20 + ASSERT ( + PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID || + PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_82441_DEVICE_ID + ); + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); =20 if (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) { ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <=3D MAX_UINT32); ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >=3D PlatformInfoHob->LowM= emory); - - if (PlatformInfoHob->LowMemory <=3D BASE_2GB) { - // Newer qemu with gigabyte aligned memory, - // 32-bit pci mmio window is 2G -> 4G then. - PlatformInfoHob->Uc32Base =3D BASE_2GB; - } else { - // - // On q35, the 32-bit area that we'll mark as UC, through variable M= TRRs, - // starts at PcdPciExpressBaseAddress. The platform DSC is responsib= le for - // setting PcdPciExpressBaseAddress such that describing the - // [PcdPciExpressBaseAddress, 4GB) range require a very small number= of - // variable MTRRs (preferably 1 or 2). - // - PlatformInfoHob->Uc32Base =3D (UINT32)PcdGet64 (PcdPciExpressBaseAdd= ress); - } - - return; } =20 - ASSERT (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_82441_DEVICE_ID); // - // On i440fx, start with the [LowerMemorySize, 4GB) range. Make sure one + // Start with the [LowerMemorySize, 4GB) range. Make sure one // variable MTRR suffices by truncating the size to a whole power of two, // while keeping the end affixed to 4GB. This will round the base up. // @@ -1027,6 +1014,13 @@ PlatformQemuInitializeRam ( // practically any alignment, and we may not have enough variable MTRRs = to // cover it exactly. // + // Because of that PlatformQemuUc32BaseInitialization() will round + // up PlatformInfoHob->LowMemory to make sure a single mtrr register + // is enough. The the result will be stored in + // PlatformInfoHob->Uc32Base. On a typical qemu configuration with + // gigabyte-alignment being used LowMemory will be 2 or 3 GB and no + // rounding is needed, so LowMemory and Uc32Base will be identical. + // if (IsMtrrSupported () && (PlatformInfoHob->HostBridgeDevId !=3D CLOUDHV= _DEVICE_ID)) { MtrrGetAllMtrrs (&MtrrSettings); =20 @@ -1056,8 +1050,8 @@ PlatformQemuInitializeRam ( ASSERT_EFI_ERROR (Status); =20 // - // Set the memory range from the start of the 32-bit MMIO area (32-bit= PCI - // MMIO aperture on i440fx, PCIEXBAR on q35) to 4GB as uncacheable. + // Set the memory range from the start of the 32-bit PCI MMIO + // aperture to 4GB as uncacheable. // Status =3D MtrrSetMemoryAttribute ( PlatformInfoHob->Uc32Base, --=20 2.39.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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