From nobody Wed May 15 03:53:52 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+98239+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+98239+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1673338892; cv=none; d=zohomail.com; s=zohoarc; b=clCzZ6/wGheM1N9J+4ojmzFPRnagLyM/Q/96xTBdGEXZ5BTpPjPQGraeWsaIqglXFCOq0lQP/4ana79afNqRB1qttOJ8OHM6zJDMOIDipqu7ZUjY4iB7N2uSnEcQu+cI4tL7Q+MqKSOwkDojnxwU3GbOSkh/rvjcOwO4DZty8Ng= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1673338892; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=VLznQ+xI814rH2SPeqURKAtlXjauNio2afqZd/vv2kg=; b=UfMLofRTEdz9m4jwJEupJRzWPYB0tvTsPBXDTOYWnlpv0fdvdUTYhS5tGuKKo17n4QNQtbdz4D4IQcDFIUA9343GhZAtmvCQcZZkQRTAXmhnxj4ydw7CL5uBpEjKfOW8xLpAvtuAHV745blPFfUX88NaFj1CRppICpwkOP4m1zI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+98239+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1673338892033831.5696577371647; Tue, 10 Jan 2023 00:21:32 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id QtMWYY1788612xWNhyBUG3J2; Tue, 10 Jan 2023 00:21:31 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web11.99231.1673338890822655406 for ; Tue, 10 Jan 2023 00:21:31 -0800 X-Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-595-uMhHXeGmOZmvYKyAiw36BQ-1; Tue, 10 Jan 2023 03:21:26 -0500 X-MC-Unique: uMhHXeGmOZmvYKyAiw36BQ-1 X-Received: from smtp.corp.redhat.com (int-mx10.intmail.prod.int.rdu2.redhat.com [10.11.54.10]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 9F0943C0F42D; Tue, 10 Jan 2023 08:21:25 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.238]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 41177492B00; Tue, 10 Jan 2023 08:21:25 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id DEAF918003BF; Tue, 10 Jan 2023 09:21:23 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Pawel Polawski , Jiewen Yao , Oliver Steffen , Jordan Justen , =?UTF-8?q?L=C3=A1szl=C3=B3=20=C3=89rsek?= , Ard Biesheuvel , Gerd Hoffmann Subject: [edk2-devel] [PATCH v2 1/4] OvmfPkg/PlatformInitLib: Add PlatformScanE820 and GetFirstNonAddressCB Date: Tue, 10 Jan 2023 09:21:20 +0100 Message-Id: <20230110082123.159521-2-kraxel@redhat.com> In-Reply-To: <20230110082123.159521-1-kraxel@redhat.com> References: <20230110082123.159521-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.10 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com X-Gm-Message-State: jUsx3Wwatv7eabCrIo8MpnmQx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1673338891; bh=JaAAmXB2aTW9PODZVVF+ZILO1qa3IyOBLLS3Q4hRAoE=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=X1IJxkYHM9IofPMj4Zjt10zOdDHwUjz7Hh7I4ifadPAKgewEWh3AjVuGgQnGe+Mwe5z EOcTTLqJCXVjLlunINoNSoMgBfh3DOF8IhsZPHGZ9ygslUPAc9SVvvYxqyc7BPrb8LEpV IFmYl+oSxwT/yWKvtwFYF0bo1q3oApWBkf4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1673338894082100011 Content-Type: text/plain; charset="utf-8"; x-default="true" First step replacing the PlatformScanOrAdd64BitE820Ram() function. Add a PlatformScanE820() function which loops over the e280 entries from FwCfg and calls a callback for each of them. Add a GetFirstNonAddressCB() function which will store the first free address (right after the last RAM block) in PlatformInfoHob->FirstNonAddress. This replaces calls to PlatformScanOrAdd64BitE820Ram() with non-NULL MaxAddress. Also drop local FirstNonAddress variables and use PlatformInfoHob->FirstNonAddress instead everywhere. Signed-off-by: Gerd Hoffmann Reviewed-by: Laszlo Ersek --- OvmfPkg/Library/PlatformInitLib/MemDetect.c | 114 ++++++++++++++++---- 1 file changed, 91 insertions(+), 23 deletions(-) diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/= PlatformInitLib/MemDetect.c index 0c4956852689..a2a4dc043f2e 100644 --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c @@ -251,6 +251,83 @@ PlatformScanOrAdd64BitE820Ram ( return EFI_SUCCESS; } =20 +typedef VOID (*E820_SCAN_CALLBACK) ( + EFI_E820_ENTRY64 *E820Entry, + EFI_HOB_PLATFORM_INFO *PlatformInfoHob + ); + +/** + Store first address not used by e820 RAM entries in + PlatformInfoHob->FirstNonAddress +**/ +VOID +PlatformGetFirstNonAddressCB ( + IN EFI_E820_ENTRY64 *E820Entry, + IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob + ) +{ + UINT64 Candidate; + + if (E820Entry->Type !=3D EfiAcpiAddressRangeMemory) { + return; + } + + Candidate =3D E820Entry->BaseAddr + E820Entry->Length; + if (PlatformInfoHob->FirstNonAddress < Candidate) { + DEBUG ((DEBUG_INFO, "%a: FirstNonAddress=3D0x%Lx\n", __FUNCTION__, Can= didate)); + PlatformInfoHob->FirstNonAddress =3D Candidate; + } +} + +/** + Iterate over the RAM entries in QEMU's fw_cfg E820 RAM map, call the + passed callback for each entry. + + @param[in] Callback The callback function to be called. + + @param[in out] PlatformInfoHob PlatformInfo struct which is passed + through to the callback. + + @retval EFI_SUCCESS The fw_cfg E820 RAM map was found and p= rocessed. + + @retval EFI_PROTOCOL_ERROR The RAM map was found, but its size was= n't a + whole multiple of sizeof(EFI_E820_ENTRY= 64). No + RAM entry was processed. + + @return Error codes from QemuFwCfgFindFile(). N= o RAM + entry was processed. +**/ +STATIC +EFI_STATUS +PlatformScanE820 ( + IN E820_SCAN_CALLBACK Callback, + IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob + ) +{ + EFI_STATUS Status; + FIRMWARE_CONFIG_ITEM FwCfgItem; + UINTN FwCfgSize; + EFI_E820_ENTRY64 E820Entry; + UINTN Processed; + + Status =3D QemuFwCfgFindFile ("etc/e820", &FwCfgItem, &FwCfgSize); + if (EFI_ERROR (Status)) { + return Status; + } + + if (FwCfgSize % sizeof E820Entry !=3D 0) { + return EFI_PROTOCOL_ERROR; + } + + QemuFwCfgSelectItem (FwCfgItem); + for (Processed =3D 0; Processed < FwCfgSize; Processed +=3D sizeof E820E= ntry) { + QemuFwCfgReadBytes (sizeof E820Entry, &E820Entry); + Callback (&E820Entry, PlatformInfoHob); + } + + return EFI_SUCCESS; +} + /** Returns PVH memmap =20 @@ -384,23 +461,17 @@ PlatformGetSystemMemorySizeAbove4gb ( Return the highest address that DXE could possibly use, plus one. **/ STATIC -UINT64 +VOID PlatformGetFirstNonAddress ( IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { - UINT64 FirstNonAddress; UINT32 FwCfgPciMmio64Mb; EFI_STATUS Status; FIRMWARE_CONFIG_ITEM FwCfgItem; UINTN FwCfgSize; UINT64 HotPlugMemoryEnd; =20 - // - // set FirstNonAddress to suppress incorrect compiler/analyzer warnings - // - FirstNonAddress =3D 0; - // // If QEMU presents an E820 map, then get the highest exclusive >=3D4GB = RAM // address from it. This can express an address >=3D 4GB+1TB. @@ -408,9 +479,9 @@ PlatformGetFirstNonAddress ( // Otherwise, get the flat size of the memory above 4GB from the CMOS (w= hich // can only express a size smaller than 1TB), and add it to 4GB. // - Status =3D PlatformScanOrAdd64BitE820Ram (FALSE, NULL, &FirstNonAddress); + Status =3D PlatformScanE820 (PlatformGetFirstNonAddressCB, PlatformInfoH= ob); if (EFI_ERROR (Status)) { - FirstNonAddress =3D BASE_4GB + PlatformGetSystemMemorySizeAbove4gb (); + PlatformInfoHob->FirstNonAddress =3D BASE_4GB + PlatformGetSystemMemor= ySizeAbove4gb (); } =20 // @@ -420,7 +491,7 @@ PlatformGetFirstNonAddress ( // #ifdef MDE_CPU_IA32 if (!FeaturePcdGet (PcdDxeIplSwitchToLongMode)) { - return FirstNonAddress; + return; } =20 #endif @@ -473,7 +544,7 @@ PlatformGetFirstNonAddress ( // determines the highest address plus one. The memory hotplug area (s= ee // below) plays no role for the firmware in this case. // - return FirstNonAddress; + return; } =20 // @@ -497,15 +568,15 @@ PlatformGetFirstNonAddress ( HotPlugMemoryEnd )); =20 - ASSERT (HotPlugMemoryEnd >=3D FirstNonAddress); - FirstNonAddress =3D HotPlugMemoryEnd; + ASSERT (HotPlugMemoryEnd >=3D PlatformInfoHob->FirstNonAddress); + PlatformInfoHob->FirstNonAddress =3D HotPlugMemoryEnd; } =20 // // SeaBIOS aligns both boundaries of the 64-bit PCI host aperture to 1GB= , so // that the host can map it with 1GB hugepages. Follow suit. // - PlatformInfoHob->PcdPciMmio64Base =3D ALIGN_VALUE (FirstNonAddress, (UIN= T64)SIZE_1GB); + PlatformInfoHob->PcdPciMmio64Base =3D ALIGN_VALUE (PlatformInfoHob->Firs= tNonAddress, (UINT64)SIZE_1GB); PlatformInfoHob->PcdPciMmio64Size =3D ALIGN_VALUE (PlatformInfoHob->PcdP= ciMmio64Size, (UINT64)SIZE_1GB); =20 // @@ -519,8 +590,8 @@ PlatformGetFirstNonAddress ( // // The useful address space ends with the 64-bit PCI host aperture. // - FirstNonAddress =3D PlatformInfoHob->PcdPciMmio64Base + PlatformInfoHob-= >PcdPciMmio64Size; - return FirstNonAddress; + PlatformInfoHob->FirstNonAddress =3D PlatformInfoHob->PcdPciMmio64Base += PlatformInfoHob->PcdPciMmio64Size; + return; } =20 /* @@ -781,7 +852,6 @@ PlatformAddressWidthInitialization ( IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { - UINT64 FirstNonAddress; UINT8 PhysMemAddressWidth; EFI_STATUS Status; =20 @@ -794,7 +864,7 @@ PlatformAddressWidthInitialization ( // First scan host-provided hardware information to assess if the address // space is already known. If so, guest must use those values. // - Status =3D PlatformScanHostProvided64BitPciMmioEnd (&FirstNonAddress); + Status =3D PlatformScanHostProvided64BitPciMmioEnd (&PlatformInfoHob->Fi= rstNonAddress); =20 if (EFI_ERROR (Status)) { // @@ -806,13 +876,12 @@ PlatformAddressWidthInitialization ( // The DXL IPL keys off of the physical address bits advertized in the= CPU // HOB. To conserve memory, we calculate the minimum address width her= e. // - FirstNonAddress =3D PlatformGetFirstNonAddress (PlatformInfoHob); + PlatformGetFirstNonAddress (PlatformInfoHob); } =20 PlatformAddressWidthFromCpuid (PlatformInfoHob, TRUE); if (PlatformInfoHob->PhysMemAddressWidth !=3D 0) { // physical address width is known - PlatformInfoHob->FirstNonAddress =3D FirstNonAddress; PlatformDynamicMmioWindow (PlatformInfoHob); return; } @@ -823,13 +892,13 @@ PlatformAddressWidthInitialization ( // -> try be conservstibe to stay below the guaranteed minimum of // 36 phys bits (aka 64 GB). // - PhysMemAddressWidth =3D (UINT8)HighBitSet64 (FirstNonAddress); + PhysMemAddressWidth =3D (UINT8)HighBitSet64 (PlatformInfoHob->FirstNonAd= dress); =20 // // If FirstNonAddress is not an integral power of two, then we need an // additional bit. // - if ((FirstNonAddress & (FirstNonAddress - 1)) !=3D 0) { + if ((PlatformInfoHob->FirstNonAddress & (PlatformInfoHob->FirstNonAddres= s - 1)) !=3D 0) { ++PhysMemAddressWidth; } =20 @@ -857,7 +926,6 @@ PlatformAddressWidthInitialization ( ASSERT (PhysMemAddressWidth <=3D 48); #endif =20 - PlatformInfoHob->FirstNonAddress =3D FirstNonAddress; PlatformInfoHob->PhysMemAddressWidth =3D PhysMemAddressWidth; } =20 --=20 2.39.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#98239): https://edk2.groups.io/g/devel/message/98239 Mute This Topic: https://groups.io/mt/96173190/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 15 03:53:52 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+98240+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+98240+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1673338892; cv=none; d=zohomail.com; s=zohoarc; b=jyVSbPhBQTb4sK+T2Suu6dGJyoBNwHXxKgwaZijAXTvOMD06Vezochngt++46kkviaA0Lj5ZWTp7FdDY4wTVC7wXSZhn+CtvL6Q0kLhwR1arhbZ+3llkAEDgc1th+J9lB4buu2arNcqlju2cmciuAfF7V9pCGEFx1d7iiB8MMBQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1673338892; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=8z/OJf2qPQAbyUvL6+QB5Dmcd4qb4khqQPI6bM/Ah78=; b=JagYRT1ZrkP/Qsk6p8ezr8wdbEXe4Dh0ZB9UHiEUjlVPDxZEFpVjipBD2Xd9w5IC3z5LWvzOM0ggDudldqgtevMYvklPd4ZhQwwqY+H17LSiXtt9JwCe0PpneLylYH2pNlUPiM9rjBxEGQJKvXjr8nS3nOGNvciS/7NdhuIW1VI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+98240+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 167333889220759.48599381309873; Tue, 10 Jan 2023 00:21:32 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id tOglYY1788612x2khaemLijV; Tue, 10 Jan 2023 00:21:31 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web10.98860.1673338891370149389 for ; Tue, 10 Jan 2023 00:21:31 -0800 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-635-CvCWsQY_PyGo0cLD32j23w-1; Tue, 10 Jan 2023 03:21:27 -0500 X-MC-Unique: CvCWsQY_PyGo0cLD32j23w-1 X-Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 2837985CCE2; Tue, 10 Jan 2023 08:21:27 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.238]) by smtp.corp.redhat.com (Postfix) with ESMTPS id AEBE9492C14; Tue, 10 Jan 2023 08:21:26 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id E45181800619; Tue, 10 Jan 2023 09:21:23 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Pawel Polawski , Jiewen Yao , Oliver Steffen , Jordan Justen , =?UTF-8?q?L=C3=A1szl=C3=B3=20=C3=89rsek?= , Ard Biesheuvel , Gerd Hoffmann Subject: [edk2-devel] [PATCH v2 2/4] OvmfPkg/PlatformInitLib: Add PlatformGetLowMemoryCB Date: Tue, 10 Jan 2023 09:21:21 +0100 Message-Id: <20230110082123.159521-3-kraxel@redhat.com> In-Reply-To: <20230110082123.159521-1-kraxel@redhat.com> References: <20230110082123.159521-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.9 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com X-Gm-Message-State: ooOJpXr3dotwjsbWK5bO5j6tx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1673338891; bh=ICMiaOeQYLfaDJCHWm9h7BtVK8qrHf57OW1B0+NjqPE=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=s1JBVM73vjzzMIzagtzckYClLvfKps/Q72O+UckMUgy5OOhwNgdb86mTW/OBYML3F2q fAIInG6MhwJgGr68BGQeaYdjihh2MUFlBpBclY0VrRAivgvlcAKIqzBpnVFxDt6L+hvq/ xPITS4/v6KeiS4WXPB/ckwaU8/oj2QE+cg4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1673338894080100009 Content-Type: text/plain; charset="utf-8"; x-default="true" Add PlatformGetLowMemoryCB() callback function for use with PlatformScanE820(). It stores the low memory size in PlatformInfoHob->LowMemory. This replaces calls to PlatformScanOrAdd64BitE820Ram() with non-NULL LowMemory. Also change PlatformGetSystemMemorySizeBelow4gb() to likewise set PlatformInfoHob->LowMemory instead of returning the value. Update all Callers to the new convention. Signed-off-by: Gerd Hoffmann --- OvmfPkg/Include/Library/PlatformInitLib.h | 3 +- OvmfPkg/Library/PeilessStartupLib/Hob.c | 3 +- .../PeilessStartupLib/PeilessStartup.c | 7 +- OvmfPkg/Library/PlatformInitLib/MemDetect.c | 69 +++++++++++++------ OvmfPkg/Library/PlatformInitLib/Platform.c | 7 +- OvmfPkg/PlatformPei/MemDetect.c | 3 +- 6 files changed, 59 insertions(+), 33 deletions(-) diff --git a/OvmfPkg/Include/Library/PlatformInitLib.h b/OvmfPkg/Include/Li= brary/PlatformInitLib.h index bf6f90a5761c..051b31191194 100644 --- a/OvmfPkg/Include/Library/PlatformInitLib.h +++ b/OvmfPkg/Include/Library/PlatformInitLib.h @@ -26,6 +26,7 @@ typedef struct { BOOLEAN Q35SmramAtDefaultSmbase; UINT16 Q35TsegMbytes; =20 + UINT32 LowMemory; UINT64 FirstNonAddress; UINT8 PhysMemAddressWidth; UINT32 Uc32Base; @@ -144,7 +145,7 @@ PlatformQemuUc32BaseInitialization ( IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob ); =20 -UINT32 +VOID EFIAPI PlatformGetSystemMemorySizeBelow4gb ( IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob diff --git a/OvmfPkg/Library/PeilessStartupLib/Hob.c b/OvmfPkg/Library/Peil= essStartupLib/Hob.c index 630ce445ebec..784a8ba194de 100644 --- a/OvmfPkg/Library/PeilessStartupLib/Hob.c +++ b/OvmfPkg/Library/PeilessStartupLib/Hob.c @@ -41,8 +41,9 @@ ConstructSecHobList ( EFI_HOB_PLATFORM_INFO PlatformInfoHob; =20 ZeroMem (&PlatformInfoHob, sizeof (PlatformInfoHob)); + PlatformGetSystemMemorySizeBelow4gb (&PlatformInfoHob); PlatformInfoHob.HostBridgeDevId =3D PciRead16 (OVMF_HOSTBRIDGE_DID); - LowMemorySize =3D PlatformGetSystemMemorySizeBelow4gb = (&PlatformInfoHob); + LowMemorySize =3D PlatformInfoHob.LowMemory; ASSERT (LowMemorySize !=3D 0); LowMemoryStart =3D FixedPcdGet32 (PcdOvmfDxeMemFvBase) + FixedPcdGet32 (= PcdOvmfDxeMemFvSize); LowMemorySize -=3D LowMemoryStart; diff --git a/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c b/OvmfPkg/L= ibrary/PeilessStartupLib/PeilessStartup.c index 380e71597206..928120d183ba 100644 --- a/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c +++ b/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c @@ -41,8 +41,7 @@ InitializePlatform ( EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { - UINT32 LowerMemorySize; - VOID *VariableStore; + VOID *VariableStore; =20 DEBUG ((DEBUG_INFO, "InitializePlatform in Pei-less boot\n")); PlatformDebugDumpCmos (); @@ -70,14 +69,14 @@ InitializePlatform ( PlatformInfoHob->PcdCpuBootLogicalProcessorNumber )); =20 - LowerMemorySize =3D PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob= ); + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); PlatformQemuUc32BaseInitialization (PlatformInfoHob); DEBUG (( DEBUG_INFO, "Uc32Base =3D 0x%x, Uc32Size =3D 0x%x, LowerMemorySize =3D 0x%x\n", PlatformInfoHob->Uc32Base, PlatformInfoHob->Uc32Size, - LowerMemorySize + PlatformInfoHob->LowMemory )); =20 VariableStore =3D PlatformReserveEmuVar= iableNvStore (); diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/= PlatformInitLib/MemDetect.c index a2a4dc043f2e..63329c4e796a 100644 --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c @@ -51,18 +51,16 @@ PlatformQemuUc32BaseInitialization ( IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { - UINT32 LowerMemorySize; - if (PlatformInfoHob->HostBridgeDevId =3D=3D 0xffff /* microvm */) { return; } =20 if (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) { - LowerMemorySize =3D PlatformGetSystemMemorySizeBelow4gb (PlatformInfoH= ob); + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <=3D MAX_UINT32); - ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >=3D LowerMemorySize); + ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >=3D PlatformInfoHob->LowM= emory); =20 - if (LowerMemorySize <=3D BASE_2GB) { + if (PlatformInfoHob->LowMemory <=3D BASE_2GB) { // Newer qemu with gigabyte aligned memory, // 32-bit pci mmio window is 2G -> 4G then. PlatformInfoHob->Uc32Base =3D BASE_2GB; @@ -92,8 +90,8 @@ PlatformQemuUc32BaseInitialization ( // variable MTRR suffices by truncating the size to a whole power of two, // while keeping the end affixed to 4GB. This will round the base up. // - LowerMemorySize =3D PlatformGetSystemMemorySizeBelow4gb (Platf= ormInfoHob); - PlatformInfoHob->Uc32Size =3D GetPowerOfTwo32 ((UINT32)(SIZE_4GB - Lower= MemorySize)); + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); + PlatformInfoHob->Uc32Size =3D GetPowerOfTwo32 ((UINT32)(SIZE_4GB - Platf= ormInfoHob->LowMemory)); PlatformInfoHob->Uc32Base =3D (UINT32)(SIZE_4GB - PlatformInfoHob->Uc32S= ize); // // Assuming that LowerMemorySize is at least 1 byte, Uc32Size is at most= 2GB. @@ -101,13 +99,13 @@ PlatformQemuUc32BaseInitialization ( // ASSERT (PlatformInfoHob->Uc32Base >=3D BASE_2GB); =20 - if (PlatformInfoHob->Uc32Base !=3D LowerMemorySize) { + if (PlatformInfoHob->Uc32Base !=3D PlatformInfoHob->LowMemory) { DEBUG (( DEBUG_VERBOSE, "%a: rounded UC32 base from 0x%x up to 0x%x, for " "an UC32 size of 0x%x\n", __FUNCTION__, - LowerMemorySize, + PlatformInfoHob->LowMemory, PlatformInfoHob->Uc32Base, PlatformInfoHob->Uc32Size )); @@ -279,6 +277,33 @@ PlatformGetFirstNonAddressCB ( } } =20 +/** + Store the low (below 4G) memory size in + PlatformInfoHob->LowMemory +**/ +VOID +PlatformGetLowMemoryCB ( + IN EFI_E820_ENTRY64 *E820Entry, + IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob + ) +{ + UINT64 Candidate; + + if (E820Entry->Type !=3D EfiAcpiAddressRangeMemory) { + return; + } + + Candidate =3D E820Entry->BaseAddr + E820Entry->Length; + if (Candidate >=3D BASE_4GB) { + return; + } + + if (PlatformInfoHob->LowMemory < Candidate) { + DEBUG ((DEBUG_INFO, "%a: LowMemory=3D0x%Lx\n", __FUNCTION__, Candidate= )); + PlatformInfoHob->LowMemory =3D Candidate; + } +} + /** Iterate over the RAM entries in QEMU's fw_cfg E820 RAM map, call the passed callback for each entry. @@ -395,14 +420,13 @@ GetHighestSystemMemoryAddressFromPvhMemmap ( return HighestAddress; } =20 -UINT32 +VOID EFIAPI PlatformGetSystemMemorySizeBelow4gb ( IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { EFI_STATUS Status; - UINT64 LowerMemorySize =3D 0; UINT8 Cmos0x34; UINT8 Cmos0x35; =20 @@ -410,12 +434,13 @@ PlatformGetSystemMemorySizeBelow4gb ( (CcProbe () !=3D CcGuestTypeIntelTdx)) { // Get the information from PVH memmap - return (UINT32)GetHighestSystemMemoryAddressFromPvhMemmap (TRUE); + PlatformInfoHob->LowMemory =3D GetHighestSystemMemoryAddressFromPvhMem= map (TRUE); + return; } =20 - Status =3D PlatformScanOrAdd64BitE820Ram (FALSE, &LowerMemorySize, NULL); - if ((Status =3D=3D EFI_SUCCESS) && (LowerMemorySize > 0)) { - return (UINT32)LowerMemorySize; + Status =3D PlatformScanE820 (PlatformGetLowMemoryCB, PlatformInfoHob); + if ((Status =3D=3D EFI_SUCCESS) && (PlatformInfoHob->LowMemory > 0)) { + return; } =20 // @@ -430,7 +455,7 @@ PlatformGetSystemMemorySizeBelow4gb ( Cmos0x34 =3D (UINT8)PlatformCmosRead8 (0x34); Cmos0x35 =3D (UINT8)PlatformCmosRead8 (0x35); =20 - return (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB); + PlatformInfoHob->LowMemory =3D ((((UINTN)Cmos0x35 << 8) + Cmos0x34) << 1= 6) + SIZE_16MB; } =20 STATIC @@ -965,7 +990,6 @@ PlatformQemuInitializeRam ( IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { - UINT64 LowerMemorySize; UINT64 UpperMemorySize; MTRR_SETTINGS MtrrSettings; EFI_STATUS Status; @@ -975,7 +999,7 @@ PlatformQemuInitializeRam ( // // Determine total memory size available // - LowerMemorySize =3D PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob= ); + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); =20 if (PlatformInfoHob->BootMode =3D=3D BOOT_ON_S3_RESUME) { // @@ -1009,14 +1033,14 @@ PlatformQemuInitializeRam ( UINT32 TsegSize; =20 TsegSize =3D PlatformInfoHob->Q35TsegMbytes * SIZE_1MB; - PlatformAddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize); + PlatformAddMemoryRangeHob (BASE_1MB, PlatformInfoHob->LowMemory - Ts= egSize); PlatformAddReservedMemoryBaseSizeHob ( - LowerMemorySize - TsegSize, + PlatformInfoHob->LowMemory - TsegSize, TsegSize, TRUE ); } else { - PlatformAddMemoryRangeHob (BASE_1MB, LowerMemorySize); + PlatformAddMemoryRangeHob (BASE_1MB, PlatformInfoHob->LowMemory); } =20 // @@ -1194,9 +1218,10 @@ PlatformQemuInitializeRamForS3 ( // Make sure the TSEG area that we reported as a reserved memory res= ource // cannot be used for reserved memory allocations. // + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); TsegSize =3D PlatformInfoHob->Q35TsegMbytes * SIZE_1MB; BuildMemoryAllocationHob ( - PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob) - TsegSize, + PlatformInfoHob->LowMemory - TsegSize, TsegSize, EfiReservedMemoryType ); diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/P= latformInitLib/Platform.c index 3e13c5d4b34f..9ab0342fd8c0 100644 --- a/OvmfPkg/Library/PlatformInitLib/Platform.c +++ b/OvmfPkg/Library/PlatformInitLib/Platform.c @@ -128,7 +128,6 @@ PlatformMemMapInitialization ( { UINT64 PciIoBase; UINT64 PciIoSize; - UINT32 TopOfLowRam; UINT64 PciExBarBase; UINT32 PciBase; UINT32 PciSize; @@ -150,7 +149,7 @@ PlatformMemMapInitialization ( return; } =20 - TopOfLowRam =3D PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); PciExBarBase =3D 0; if (PlatformInfoHob->HostBridgeDevId =3D=3D INTEL_Q35_MCH_DEVICE_ID) { // @@ -158,11 +157,11 @@ PlatformMemMapInitialization ( // the base of the 32-bit PCI host aperture. // PciExBarBase =3D PcdGet64 (PcdPciExpressBaseAddress); - ASSERT (TopOfLowRam <=3D PciExBarBase); + ASSERT (PlatformInfoHob->LowMemory <=3D PciExBarBase); ASSERT (PciExBarBase <=3D MAX_UINT32 - SIZE_256MB); PciBase =3D (UINT32)(PciExBarBase + SIZE_256MB); } else { - ASSERT (TopOfLowRam <=3D PlatformInfoHob->Uc32Base); + ASSERT (PlatformInfoHob->LowMemory <=3D PlatformInfoHob->Uc32Base); PciBase =3D PlatformInfoHob->Uc32Base; } =20 diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetec= t.c index 3d8375320dcb..41d186986ba8 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -271,7 +271,8 @@ PublishPeiMemory ( UINT32 S3AcpiReservedMemoryBase; UINT32 S3AcpiReservedMemorySize; =20 - LowerMemorySize =3D PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob= ); + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); + LowerMemorySize =3D PlatformInfoHob->LowMemory; if (PlatformInfoHob->SmmSmramRequire) { // // TSEG is chipped from the end of low RAM --=20 2.39.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#98240): https://edk2.groups.io/g/devel/message/98240 Mute This Topic: https://groups.io/mt/96173191/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 15 03:53:52 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+98241+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+98241+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1673338892; cv=none; d=zohomail.com; s=zohoarc; b=SUkGc64IprIsuo9intVNuqIHtkp1XyI4XWD+VIwpNOWAB6u8HjHWwI66Kv+QNTfjNCQUygnsn+3lCDMknO0lc4JNM4MwRsURp/qrIE4ZfY+/8+k5ApBDq7QUnZ90aIzDJh6xbtU0CB1EgPiQHaSuO+1IkDqHM0XyhlrfXuCDMY4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1673338892; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=QXyehhxYNDWsFlgHnKzIud/YL+KOxrsOG4WbX7tikAE=; b=goqlaEAhJgVkN5myUXXcaO6vImcDucmVILPiR84x4QUaBQO/LBwIQO9Z9Bt07v93ssn6/QEBBK6rfHsW24fuqycrFSqFSbLWXIi/cwycIznwNW36bWsyEL9+1fDftEWVoaAWmRz93ttcEqDhe28Fi7UgVOgC9LCtaz+8W3osrEc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+98241+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1673338892593889.4224925954197; Tue, 10 Jan 2023 00:21:32 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id PZVLYY1788612x2CZv8xTZtj; Tue, 10 Jan 2023 00:21:32 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web10.98861.1673338891419804110 for ; Tue, 10 Jan 2023 00:21:31 -0800 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-635-DWlEZ9nONNOp68S2VYRi7g-1; Tue, 10 Jan 2023 03:21:27 -0500 X-MC-Unique: DWlEZ9nONNOp68S2VYRi7g-1 X-Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 3682480234E; Tue, 10 Jan 2023 08:21:27 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.238]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C9A6440C2064; Tue, 10 Jan 2023 08:21:26 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id E80271800624; Tue, 10 Jan 2023 09:21:23 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Pawel Polawski , Jiewen Yao , Oliver Steffen , Jordan Justen , =?UTF-8?q?L=C3=A1szl=C3=B3=20=C3=89rsek?= , Ard Biesheuvel , Gerd Hoffmann Subject: [edk2-devel] [PATCH v2 3/4] OvmfPkg/PlatformInitLib: Add PlatformAddHobCB Date: Tue, 10 Jan 2023 09:21:22 +0100 Message-Id: <20230110082123.159521-4-kraxel@redhat.com> In-Reply-To: <20230110082123.159521-1-kraxel@redhat.com> References: <20230110082123.159521-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com X-Gm-Message-State: HNAWvw4Zg30Zec4l2JJzu9qFx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1673338892; bh=UmzOGcl8oKOqq9+Ge9Dk5IPXr12lnlFg9Gxp7Gwt6T4=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=aoKcnxMA4Y785iVUnizXxOHMU2vVsRmpb33ZoltqEzCZeLO1OlSKPupBUSr259Zen5L teg4RWHSWRNA9lAkvgwEV/ftuHWKt5FqA5AjNqxmgKFatfmd1NNQIajRDd4GCgzCij6sm taV6T7B0lA2UFW0xffBBxgBK6beZ9mX8OT4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1673338894050100007 Content-Type: text/plain; charset="utf-8"; x-default="true" Add PlatformAddHobCB() callback function for use with PlatformScanE820(). It adds HOBs for high memory and reservations (low memory is handled elsewhere because there are some special cases to consider). This replaces calls to PlatformScanOrAdd64BitE820Ram() with AddHighHobs =3D TRUE. Also remove PlatformScanOrAdd64BitE820Ram() which is not used any more. Signed-off-by: Gerd Hoffmann --- OvmfPkg/Library/PlatformInitLib/MemDetect.c | 174 ++++---------------- 1 file changed, 36 insertions(+), 138 deletions(-) diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/= PlatformInitLib/MemDetect.c index 63329c4e796a..83a219581a1b 100644 --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c @@ -112,143 +112,6 @@ PlatformQemuUc32BaseInitialization ( } } =20 -/** - Iterate over the RAM entries in QEMU's fw_cfg E820 RAM map that start ou= tside - of the 32-bit address range. - - Find the highest exclusive >=3D4GB RAM address, or produce memory resour= ce - descriptor HOBs for RAM entries that start at or above 4GB. - - @param[out] MaxAddress If MaxAddress is NULL, then PlatformScanOrAdd64B= itE820Ram() - produces memory resource descriptor HOBs for RAM - entries that start at or above 4GB. - - Otherwise, MaxAddress holds the highest exclusive - >=3D4GB RAM address on output. If QEMU's fw_cfg = E820 - RAM map contains no RAM entry that starts outsid= e of - the 32-bit address range, then MaxAddress is exa= ctly - 4GB on output. - - @retval EFI_SUCCESS The fw_cfg E820 RAM map was found and proces= sed. - - @retval EFI_PROTOCOL_ERROR The RAM map was found, but its size wasn't a - whole multiple of sizeof(EFI_E820_ENTRY64). = No - RAM entry was processed. - - @return Error codes from QemuFwCfgFindFile(). No RAM - entry was processed. -**/ -STATIC -EFI_STATUS -PlatformScanOrAdd64BitE820Ram ( - IN BOOLEAN AddHighHob, - OUT UINT64 *LowMemory OPTIONAL, - OUT UINT64 *MaxAddress OPTIONAL - ) -{ - EFI_STATUS Status; - FIRMWARE_CONFIG_ITEM FwCfgItem; - UINTN FwCfgSize; - EFI_E820_ENTRY64 E820Entry; - UINTN Processed; - - Status =3D QemuFwCfgFindFile ("etc/e820", &FwCfgItem, &FwCfgSize); - if (EFI_ERROR (Status)) { - return Status; - } - - if (FwCfgSize % sizeof E820Entry !=3D 0) { - return EFI_PROTOCOL_ERROR; - } - - if (LowMemory !=3D NULL) { - *LowMemory =3D 0; - } - - if (MaxAddress !=3D NULL) { - *MaxAddress =3D BASE_4GB; - } - - QemuFwCfgSelectItem (FwCfgItem); - for (Processed =3D 0; Processed < FwCfgSize; Processed +=3D sizeof E820E= ntry) { - QemuFwCfgReadBytes (sizeof E820Entry, &E820Entry); - DEBUG (( - DEBUG_VERBOSE, - "%a: Base=3D0x%Lx Length=3D0x%Lx Type=3D%u\n", - __FUNCTION__, - E820Entry.BaseAddr, - E820Entry.Length, - E820Entry.Type - )); - if (E820Entry.Type =3D=3D EfiAcpiAddressRangeMemory) { - if (AddHighHob && (E820Entry.BaseAddr >=3D BASE_4GB)) { - UINT64 Base; - UINT64 End; - - // - // Round up the start address, and round down the end address. - // - Base =3D ALIGN_VALUE (E820Entry.BaseAddr, (UINT64)EFI_PAGE_SIZE); - End =3D (E820Entry.BaseAddr + E820Entry.Length) & - ~(UINT64)EFI_PAGE_MASK; - if (Base < End) { - PlatformAddMemoryRangeHob (Base, End); - DEBUG (( - DEBUG_VERBOSE, - "%a: PlatformAddMemoryRangeHob [0x%Lx, 0x%Lx)\n", - __FUNCTION__, - Base, - End - )); - } - } - - if (MaxAddress || LowMemory) { - UINT64 Candidate; - - Candidate =3D E820Entry.BaseAddr + E820Entry.Length; - if (MaxAddress && (Candidate > *MaxAddress)) { - *MaxAddress =3D Candidate; - DEBUG (( - DEBUG_VERBOSE, - "%a: MaxAddress=3D0x%Lx\n", - __FUNCTION__, - *MaxAddress - )); - } - - if (LowMemory && (Candidate > *LowMemory) && (Candidate < BASE_4GB= )) { - *LowMemory =3D Candidate; - DEBUG (( - DEBUG_VERBOSE, - "%a: LowMemory=3D0x%Lx\n", - __FUNCTION__, - *LowMemory - )); - } - } - } else if (E820Entry.Type =3D=3D EfiAcpiAddressRangeReserved) { - if (AddHighHob) { - DEBUG (( - DEBUG_INFO, - "%a: Reserved: Base=3D0x%Lx Length=3D0x%Lx\n", - __FUNCTION__, - E820Entry.BaseAddr, - E820Entry.Length - )); - BuildResourceDescriptorHob ( - EFI_RESOURCE_MEMORY_RESERVED, - 0, - E820Entry.BaseAddr, - E820Entry.Length - ); - } - } - } - - return EFI_SUCCESS; -} - typedef VOID (*E820_SCAN_CALLBACK) ( EFI_E820_ENTRY64 *E820Entry, EFI_HOB_PLATFORM_INFO *PlatformInfoHob @@ -304,6 +167,41 @@ PlatformGetLowMemoryCB ( } } =20 +/** + Create HOBs for reservations and RAM (except low memory). +**/ +VOID +PlatformAddHobCB ( + IN EFI_E820_ENTRY64 *E820Entry, + IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob + ) +{ + UINT64 Base =3D E820Entry->BaseAddr; + UINT64 End =3D E820Entry->BaseAddr + E820Entry->Length; + + switch (E820Entry->Type) { + case EfiAcpiAddressRangeMemory: + // + // Round up the start address, and round down the end address. + // + Base =3D ALIGN_VALUE (Base, (UINT64)EFI_PAGE_SIZE); + End =3D End & ~(UINT64)EFI_PAGE_MASK; + if ((Base >=3D BASE_4GB) && (Base < End)) { + DEBUG ((DEBUG_INFO, "%a: HighMemory [0x%Lx, 0x%Lx]\n", __FUNCTION_= _, Base, End)); + PlatformAddMemoryRangeHob (Base, End); + } + + break; + case EfiAcpiAddressRangeReserved: + BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_RESERVED, 0, Base, E= nd); + DEBUG ((DEBUG_INFO, "%a: Reserved [0x%Lx, 0x%Lx]\n", __FUNCTION__, B= ase, End)); + break; + default: + DEBUG ((DEBUG_WARN, "%a: Type %d [0x%Lx, 0x%Lx] (NOT HANDLED)\n", __= FUNCTION__, E820Entry->Type, Base, End)); + break; + } +} + /** Iterate over the RAM entries in QEMU's fw_cfg E820 RAM map, call the passed callback for each entry. @@ -1048,7 +946,7 @@ PlatformQemuInitializeRam ( // entries. Otherwise, create a single memory HOB with the flat >=3D4GB // memory size read from the CMOS. // - Status =3D PlatformScanOrAdd64BitE820Ram (TRUE, NULL, NULL); + Status =3D PlatformScanE820 (PlatformAddHobCB, PlatformInfoHob); if (EFI_ERROR (Status)) { UpperMemorySize =3D PlatformGetSystemMemorySizeAbove4gb (); if (UpperMemorySize !=3D 0) { --=20 2.39.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#98241): https://edk2.groups.io/g/devel/message/98241 Mute This Topic: https://groups.io/mt/96173192/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 15 03:53:52 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+98242+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+98242+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1673338896; cv=none; d=zohomail.com; s=zohoarc; b=mZsAfivIsmft2g7O7xhyhlxNihJ73XXFXGWDLKbbriWbXRJzPknO6XnvMe9Z0d5826FebK1MTsKvVjkovnSeOgB7gEc0aJeutLI89pjqCTdlzSFGTp8jyPp4MYOx4cMyyTva274phHn8Uig68hZ7x+bcgV3ibtKiZUPe+PId8Mo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1673338896; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=DZCqLS80SGbUEX7Ya4SbOss9c/Q3uzh2SQbWLKXOXxs=; b=fp8oaC2w0E8VVvEia30Krl3Nagt0hGXyk8i8OfY12Qsra0VHYTfDa6V9Qj6dOS4OFgxsjpZacI+gHWfL+XJMKEsgSbpHA7chokiJiDjorl7hXfaCFcDfSzsc8NRtWGas//gKc8S9g58XX8k1LfswqmKWTbSMnTyO81WhP/PwuyQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+98242+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1673338896273647.7762319158206; Tue, 10 Jan 2023 00:21:36 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id ODrEYY1788612xtlsOEKcwMb; Tue, 10 Jan 2023 00:21:35 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web10.98863.1673338894998830568 for ; Tue, 10 Jan 2023 00:21:35 -0800 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-262-fgADI2OzOhKflo4USdKkrQ-1; Tue, 10 Jan 2023 03:21:28 -0500 X-MC-Unique: fgADI2OzOhKflo4USdKkrQ-1 X-Received: from smtp.corp.redhat.com (int-mx09.intmail.prod.int.rdu2.redhat.com [10.11.54.9]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 8819E181E3EE; Tue, 10 Jan 2023 08:21:28 +0000 (UTC) X-Received: from sirius.home.kraxel.org (unknown [10.39.192.238]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5394E492C14; Tue, 10 Jan 2023 08:21:28 +0000 (UTC) X-Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id EB8431800626; Tue, 10 Jan 2023 09:21:23 +0100 (CET) From: "Gerd Hoffmann" To: devel@edk2.groups.io Cc: Pawel Polawski , Jiewen Yao , Oliver Steffen , Jordan Justen , =?UTF-8?q?L=C3=A1szl=C3=B3=20=C3=89rsek?= , Ard Biesheuvel , Gerd Hoffmann Subject: [edk2-devel] [PATCH v2 4/4] OvmfPkg/PlatformInitLib: Add PlatformReservationConflictCB Date: Tue, 10 Jan 2023 09:21:23 +0100 Message-Id: <20230110082123.159521-5-kraxel@redhat.com> In-Reply-To: <20230110082123.159521-1-kraxel@redhat.com> References: <20230110082123.159521-1-kraxel@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.9 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kraxel@redhat.com X-Gm-Message-State: wtn5dAsdNEnbpMnXFA4bDcQGx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1673338895; bh=Ao1GFNGl8pLJaupLCDtw0iAS2IN49+7eInXJRefMGQc=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=qlO8FMCf8/e5tcRopgxz22YYOisBfx9G8MIraJ97Jo/vqWjgTlu2S/YztkQOnaUvKJF zXk3sgA7/TAoh1oFyNBiUMJP5F16mOMvbd+ybQhVJzy3N85yQVWt1w1YDzzePS/bsvUnx DpJlb0gygQVB41q/ik/bEwH09YnJLX9HJNQ= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1673338898071100002 Content-Type: text/plain; charset="utf-8"; x-default="true" Add PlatformReservationConflictCB() callback function for use with PlatformScanE820(). It checks whenever the 64bit PCI MMIO window overlaps with a reservation from qemu. If so move down the MMIO window to resolve the conflict. This happens on (virtal) AMD machines with 1TB address space, because the AMD IOMMU uses an address window just below 1GB. Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4251 Signed-off-by: Gerd Hoffmann --- OvmfPkg/Library/PlatformInitLib/MemDetect.c | 41 +++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/= PlatformInitLib/MemDetect.c index 83a219581a1b..f12d48cad755 100644 --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c @@ -202,6 +202,46 @@ PlatformAddHobCB ( } } =20 +/** + Check whenever the 64bit PCI MMIO window overlaps with a reservation + from qemu. If so move down the MMIO window to resolve the conflict. + + This happens on (virtal) AMD machines with 1TB address space, + because the AMD IOMMU uses an address window just below 1GB. +**/ +VOID +PlatformReservationConflictCB ( + IN EFI_E820_ENTRY64 *E820Entry, + IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob + ) +{ + UINT64 IntersectionBase =3D MAX ( + E820Entry->BaseAddr, + PlatformInfoHob->PcdPciMmio64Base + ); + UINT64 IntersectionEnd =3D MIN ( + E820Entry->BaseAddr + E820Entry->Length, + PlatformInfoHob->PcdPciMmio64Base + + PlatformInfoHob->PcdPciMmio64Size + ); + UINT64 NewBase; + + if (IntersectionBase >=3D IntersectionEnd) { + return; // no overlap + } + + NewBase =3D (PlatformInfoHob->PcdPciMmio64Base - + PlatformInfoHob->PcdPciMmio64Size); + DEBUG (( + DEBUG_INFO, + "%a: move mmio: 0x%Lx =3D> %Lx\n", + __FUNCTION__, + PlatformInfoHob->PcdPciMmio64Base, + NewBase + )); + PlatformInfoHob->PcdPciMmio64Base =3D NewBase; +} + /** Iterate over the RAM entries in QEMU's fw_cfg E820 RAM map, call the passed callback for each entry. @@ -638,6 +678,7 @@ PlatformDynamicMmioWindow ( DEBUG ((DEBUG_INFO, "%a: MMIO Space 0x%Lx (%Ld GB)\n", __func__, Mmi= oSpace, RShiftU64 (MmioSpace, 30))); PlatformInfoHob->PcdPciMmio64Size =3D MmioSpace; PlatformInfoHob->PcdPciMmio64Base =3D AddrSpace - MmioSpace; + PlatformScanE820 (PlatformReservationConflictCB, PlatformInfoHob); } else { DEBUG ((DEBUG_INFO, "%a: using classic mmio window\n", __func__)); } --=20 2.39.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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