From nobody Sun May 19 07:16:12 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+97858+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+97858+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1672725412; cv=none; d=zohomail.com; s=zohoarc; b=UkzbbecGzKh4KgPaxCCpP3qugUSwLOjoZWJKi4DvuuZfNLbkTGVKXh61uYw+JN+gGbpZgurChG7lmt7sd0g5/95SBWQb7WXmo31gYzXN/aDUfvyulPLJAyqo22FZi0McFZ2yCUt1O/Ko/OCu1jQn+VH9mjVB0KyqSzha832BzVw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1672725412; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=xbXxBSU65J2FspEiN4Aus7vrtXBuf5OEonxQreuhZUU=; b=M61yfsTPIhyt2O4XWSu8L9ykRUGNYQJnGI15bEDIKH86juxq9pGORyWFgTUj6tx9jPsWL4IZZk4KadIBt7HnbIArn5aK75dNy6mkRRrqwjMY2MYIy34WxwIPMUx39YjtVDQbgii13F/bB3J7xPqcUWANCh+4ZjXLsIlMkCRu1C0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+97858+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 167272541241879.08603372916184; Mon, 2 Jan 2023 21:56:52 -0800 (PST) Return-Path: X-Received: by 127.0.0.2 with SMTP id 7aVpYY1788612xPxshHhf5vl; Mon, 02 Jan 2023 21:56:52 -0800 X-Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mx.groups.io with SMTP id smtpd.web10.57912.1672725411544685909 for ; Mon, 02 Jan 2023 21:56:51 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10578"; a="319295622" X-IronPort-AV: E=Sophos;i="5.96,296,1665471600"; d="scan'208";a="319295622" X-Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2023 21:56:51 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10578"; a="648097054" X-IronPort-AV: E=Sophos;i="5.96,296,1665471600"; d="scan'208";a="648097054" X-Received: from duntan-mobl.ccr.corp.intel.com ([10.239.157.24]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jan 2023 21:56:49 -0800 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar Subject: [edk2-devel] [Patch V4] UefiCpuPkg/PiSmmCpuDxeSmm:Fix PF issue caused by smm page table code Date: Tue, 3 Jan 2023 13:56:17 +0800 Message-Id: <20230103055617.2103-1-dun.tan@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,dun.tan@intel.com X-Gm-Message-State: vThS0LO3ulUoS2NzreCYcC3fx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1672725412; bh=+QCpNYlAOvyZM1+hVKXG325DwLP2wkJCTm+Q/m61gVo=; h=Cc:Date:From:Reply-To:Subject:To; b=rAZY8mMMfRCENgDV3qWIMPflT0ggMjsx8We3IwGZleyh24Hpeu1ZNvUo2neal8VpHEA WM22Yw66sSM23jmiTMvsladqC+54xxeX2rdvIktnLI0ETOuLsy5LPL7ESSkGTZBPTU2i8 99Z+vK3/Q3QnDwj7uU4B2DBzIMM483AAawQ= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1672725413805100001 Content-Type: text/plain; charset="utf-8" When setting new page table pool to RO, only disable/enable WP when Cr0.WP has been set to 1 to fix potential PF caused by b822be1a20 (UefiCpuPkg/PiSmmCpuDxeSmm: Introduce page table pool mechanism). With previous code, if someone want to modify the page table and Cr0.WP has been cleared before modify page table, Cr0.WP may be set to 1 again since new pool may be generated during this process Then PF fault may happens. Signed-off-by: Dun Tan Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Reviewed-by: Ray Ni --- UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 40 ++++++++++++++++++= ++++++++++------------ 1 file changed, 28 insertions(+), 12 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c b/UefiCpuPk= g/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c index 4bb23f6920..bab7f1887b 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c @@ -67,8 +67,10 @@ InitializePageTablePool ( IN UINTN PoolPages ) { - VOID *Buffer; - BOOLEAN CetEnabled; + VOID *Buffer; + BOOLEAN CetEnabled; + BOOLEAN WpEnabled; + IA32_CR0 Cr0; =20 // // Always reserve at least PAGE_TABLE_POOL_UNIT_PAGES, including one pag= e for @@ -106,21 +108,35 @@ InitializePageTablePool ( // if (mIsReadOnlyPageTable) { CetEnabled =3D ((AsmReadCr4 () & CR4_CET_ENABLE) !=3D 0) ? TRUE : FALS= E; - if (CetEnabled) { + Cr0.UintN =3D AsmReadCr0 (); + WpEnabled =3D (Cr0.Bits.WP !=3D 0) ? TRUE : FALSE; + if (WpEnabled) { + if (CetEnabled) { + // + // CET must be disabled if WP is disabled. Disable CET before clea= ring CR0.WP. + // + DisableCet (); + } + // - // CET must be disabled if WP is disabled. + // Only disable/enable WP when Cr0.Bits.WP has been set to 1. // - DisableCet (); + Cr0.Bits.WP =3D 0; + AsmWriteCr0 (Cr0.UintN); } =20 - AsmWriteCr0 (AsmReadCr0 () & ~CR0_WP); SmmSetMemoryAttributes ((EFI_PHYSICAL_ADDRESS)(UINTN)Buffer, EFI_PAGES= _TO_SIZE (PoolPages), EFI_MEMORY_RO); - AsmWriteCr0 (AsmReadCr0 () | CR0_WP); - if (CetEnabled) { - // - // re-enable CET. - // - EnableCet (); + if (WpEnabled) { + Cr0.UintN =3D AsmReadCr0 (); + Cr0.Bits.WP =3D 1; + AsmWriteCr0 (Cr0.UintN); + + if (CetEnabled) { + // + // re-enable CET. + // + EnableCet (); + } } } =20 --=20 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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