From nobody Sun May 19 17:57:53 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+92782+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+92782+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1661396125; cv=none; d=zohomail.com; s=zohoarc; b=UFs1DjeJUmvEZZHzfQha3Xn7jo6eRtafVC+/H9cOHBdPlwLZk2YJa+df5hHSuR2WjvQnK4g9bO3H28vi6/lzuPWgxdcTGvjmIjtYH/PLUJbPdD4og9RoA5q+p5hMCduGoX0+lwXN9amHV/MtoexJ4UX3WeaKOfYT8sC9JoVOsUE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1661396125; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=ljgRPXv8yvpbvcUFUu3xW2SCBdUJ6M+LMKaZSgPx+VU=; b=cKsedL5EOL3BqjQ3vTYDVBeF/wPdVBldYcLz2EowjP28rO45HT6Z+Ch4YzpxJgICqd3mf0W2MRBPiLO7t4asvOolUJwEDhQdXV7kh+u0HpCOKA3NA1qnlYwL+9fYESdPdqfYMBultuw3T583zFCoaILKZKmPs+s3IjMjgNovxqk= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+92782+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1661396125320326.6627237080054; Wed, 24 Aug 2022 19:55:25 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id mLeNYY1788612xltdPANbvEd; Wed, 24 Aug 2022 19:55:25 -0700 X-Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web11.19719.1661396118095781814 for ; Wed, 24 Aug 2022 19:55:24 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10449"; a="355855726" X-IronPort-AV: E=Sophos;i="5.93,262,1654585200"; d="scan'208";a="355855726" X-Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Aug 2022 19:55:24 -0700 X-IronPort-AV: E=Sophos;i="5.93,262,1654585200"; d="scan'208";a="670782653" X-Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Aug 2022 19:55:22 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Eric Dong , Ray Ni , Rahul Kumar Subject: [edk2-devel] [PATCH] UefiCpuPkg/MpInitLib: Simplify logic in SwitchBsp Date: Thu, 25 Aug 2022 10:55:05 +0800 Message-Id: <20220825025506.2323-3-zhiguang.liu@intel.com> In-Reply-To: <20220825025506.2323-1-zhiguang.liu@intel.com> References: <20220825025506.2323-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,zhiguang.liu@intel.com X-Gm-Message-State: g6MKJPNRoZTkVd43taptBV0mx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1661396125; bh=6VJgZ/cXEqgIPKBeMlECT1Tp5NvF+jVyWRJJRWqcAV8=; h=Cc:Date:From:Reply-To:Subject:To; b=a34Hvdf+A6i7XfBHNKEBOHA8ZPpjUjbyOVErFybKqCj4rGIE5Oa+YRTOEHLHcmatrRS E2XHeO2cIVa6W05oWzRg753ygBUef1xRuZcK+0s3wiJBRMCtQixNyC4NAKe0WzDPJG3A+ aGI0O7iktI6KtSJhODGn0gxi7z9oLdkKpZY= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1661396126047100005 Content-Type: text/plain; charset="utf-8" When switch bsp, old bsp and new bsp put CR0/CR4 into stack, and put IDT and GDT register into a structure. After they exchange their stack, they restore these registers. This logic is now implemented by assembly code. This patch aims to reuse (Save/Restore)VolatileRegisters function to replace such assembly code for better code readability. Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Signed-off-by: Zhiguang Liu --- .../Library/MpInitLib/Ia32/MpFuncs.nasm | 18 -------- UefiCpuPkg/Library/MpInitLib/MpLib.c | 35 ++++++++++++++- UefiCpuPkg/Library/MpInitLib/MpLib.h | 43 +++++++++---------- UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 21 --------- 4 files changed, 55 insertions(+), 62 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Li= brary/MpInitLib/Ia32/MpFuncs.nasm index 28301bb8f0..7a4d5b35db 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm @@ -286,13 +286,6 @@ ASM_PFX(AsmExchangeRole): =20 ;Store EFLAGS, GDTR and IDTR register to stack pushfd - mov eax, cr4 - push eax ; push cr4 firstly - mov eax, cr0 - push eax - - sgdt [esi + CPU_EXCHANGE_ROLE_INFO.Gdtr] - sidt [esi + CPU_EXCHANGE_ROLE_INFO.Idtr] =20 ; Store the its StackPointer mov [esi + CPU_EXCHANGE_ROLE_INFO.StackPointer],esp @@ -308,13 +301,6 @@ WaitForOtherStored: jmp WaitForOtherStored =20 OtherStored: - ; Since another CPU already stored its state, load them - ; load GDTR value - lgdt [edi + CPU_EXCHANGE_ROLE_INFO.Gdtr] - - ; load IDTR value - lidt [edi + CPU_EXCHANGE_ROLE_INFO.Idtr] - ; load its future StackPointer mov esp, [edi + CPU_EXCHANGE_ROLE_INFO.StackPointer] =20 @@ -331,10 +317,6 @@ WaitForOtherLoaded: =20 OtherLoaded: ; since the other CPU already get the data it want, leave this procedu= re - pop eax - mov cr0, eax - pop eax - mov cr4, eax popfd =20 popad diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index 8d1f24370a..041a32e659 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -1,7 +1,7 @@ /** @file CPU MP Initialize Library common functions. =20 - Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.
Copyright (c) 2020, AMD Inc. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent @@ -15,6 +15,29 @@ =20 EFI_GUID mCpuInitMpLibHobGuid =3D CPU_INIT_MP_LIB_HOB_GUID; =20 +/** + Save the volatile registers required to be restored following INIT IPI. + + @param[out] VolatileRegisters Returns buffer saved the volatile resi= sters +**/ +VOID +SaveVolatileRegisters ( + OUT CPU_VOLATILE_REGISTERS *VolatileRegisters + ); + +/** + Restore the volatile registers following INIT IPI. + + @param[in] VolatileRegisters Pointer to volatile resisters + @param[in] IsRestoreDr TRUE: Restore DRx if supported + FALSE: Do not restore DRx +**/ +VOID +RestoreVolatileRegisters ( + IN CPU_VOLATILE_REGISTERS *VolatileRegisters, + IN BOOLEAN IsRestoreDr + ); + /** The function will check if BSP Execute Disable is enabled. =20 @@ -83,7 +106,12 @@ FutureBSPProc ( CPU_MP_DATA *DataInHob; =20 DataInHob =3D (CPU_MP_DATA *)Buffer; + // + // Save and restore volatile registers when switch BSP + // + SaveVolatileRegisters (&DataInHob->APInfo.VolatileRegisters); AsmExchangeRole (&DataInHob->APInfo, &DataInHob->BSPInfo); + RestoreVolatileRegisters (&DataInHob->APInfo.VolatileRegisters, FALSE); } =20 /** @@ -2233,7 +2261,12 @@ SwitchBSPWorker ( // WakeUpAP (CpuMpData, FALSE, ProcessorNumber, FutureBSPProc, CpuMpData, T= RUE); =20 + // + // Save and restore volatile registers when switch BSP + // + SaveVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegisters); AsmExchangeRole (&CpuMpData->BSPInfo, &CpuMpData->APInfo); + RestoreVolatileRegisters (&CpuMpData->BSPInfo.VolatileRegisters, FALSE); =20 // // Set the BSP bit of MSR_IA32_APIC_BASE on new BSP diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index 974fb76019..47b722cb2f 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -68,14 +68,31 @@ typedef struct { UINTN Size; } MICROCODE_PATCH_INFO; =20 +// +// CPU volatile registers around INIT-SIPI-SIPI +// +typedef struct { + UINTN Cr0; + UINTN Cr3; + UINTN Cr4; + UINTN Dr0; + UINTN Dr1; + UINTN Dr2; + UINTN Dr3; + UINTN Dr6; + UINTN Dr7; + IA32_DESCRIPTOR Gdtr; + IA32_DESCRIPTOR Idtr; + UINT16 Tr; +} CPU_VOLATILE_REGISTERS; + // // CPU exchange information for switch BSP // typedef struct { - UINT8 State; // offset 0 - UINTN StackPointer; // offset 4 / 8 - IA32_DESCRIPTOR Gdtr; // offset 8 / 16 - IA32_DESCRIPTOR Idtr; // offset 14 / 26 + UINT8 State; // offset 0 + UINTN StackPointer; // offset 4 / 8 + CPU_VOLATILE_REGISTERS VolatileRegisters; // offset 8 / 16 } CPU_EXCHANGE_ROLE_INFO; =20 // @@ -112,24 +129,6 @@ typedef enum { CpuStateDisabled } CPU_STATE; =20 -// -// CPU volatile registers around INIT-SIPI-SIPI -// -typedef struct { - UINTN Cr0; - UINTN Cr3; - UINTN Cr4; - UINTN Dr0; - UINTN Dr1; - UINTN Dr2; - UINTN Dr3; - UINTN Dr6; - UINTN Dr7; - IA32_DESCRIPTOR Gdtr; - IA32_DESCRIPTOR Idtr; - UINT16 Tr; -} CPU_VOLATILE_REGISTERS; - // // AP related data // diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Lib= rary/MpInitLib/X64/MpFuncs.nasm index cd95b03da8..b7f8d48504 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -482,22 +482,13 @@ ASM_PFX(AsmExchangeRole): push r14 push r15 =20 - mov rax, cr0 - push rax - - mov rax, cr4 - push rax - ; rsi contains MyInfo pointer mov rsi, rcx =20 ; rdi contains OthersInfo pointer mov rdi, rdx =20 - ;Store EFLAGS, GDTR and IDTR regiter to stack pushfq - sgdt [rsi + CPU_EXCHANGE_ROLE_INFO.Gdtr] - sidt [rsi + CPU_EXCHANGE_ROLE_INFO.Idtr] =20 ; Store the its StackPointer mov [rsi + CPU_EXCHANGE_ROLE_INFO.StackPointer], rsp @@ -513,12 +504,6 @@ WaitForOtherStored: jmp WaitForOtherStored =20 OtherStored: - ; Since another CPU already stored its state, load them - ; load GDTR value - lgdt [rdi + CPU_EXCHANGE_ROLE_INFO.Gdtr] - - ; load IDTR value - lidt [rdi + CPU_EXCHANGE_ROLE_INFO.Idtr] =20 ; load its future StackPointer mov rsp, [rdi + CPU_EXCHANGE_ROLE_INFO.StackPointer] @@ -538,12 +523,6 @@ OtherLoaded: ; since the other CPU already get the data it want, leave this procedu= re popfq =20 - pop rax - mov cr4, rax - - pop rax - mov cr0, rax - pop r15 pop r14 pop r13 --=20 2.31.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#92782): https://edk2.groups.io/g/devel/message/92782 Mute This Topic: https://groups.io/mt/93241592/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-