From nobody Sat May 18 17:16:08 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+89916+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89916+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1653056165; cv=none; d=zohomail.com; s=zohoarc; b=jB72sOAyFNuUL90Ztq/Utx8rpWLjEgLHMukohdmS5+mGQ/R2H6PI7ea0WR7Y3Xu5FHl25cFoDgaqjpZlwHIcOWePiJuCLHE/iRy48rOcWUnOCAdT6ph1uyJiWaOeZlEdzcy/5pYUdoLe0uXLh7Hi++8o9IBsSiTWp2U+1OPMieQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653056165; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=UjLn6/Seu5HNExWr/bYxCJuwjzIcv3GQqHGiTtf+90s=; b=WI4JaqaMm0TrLRJmyN8lFaDK1KmS3Ernpcm6HDwKBNbYZMMW7jo9l1Cs2pc5m8z+cAZz5FQngtFXF32FN5bBdYim51eQP9NYcS4u8Jp8DbHjrSEWWwHb4pMEtcgAsvqS9oOKAa62ikEkTwkKZ6ZnN+Q9srnBsdyDv1Fu1T9D76M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89916+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1653056165706835.5129099642526; Fri, 20 May 2022 07:16:05 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 1m23YY1788612xexxjrp3CoO; Fri, 20 May 2022 07:16:05 -0700 X-Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web11.9207.1653056161299558400 for ; Fri, 20 May 2022 07:16:01 -0700 X-IronPort-AV: E=McAfee;i="6400,9594,10353"; a="333243096" X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="333243096" X-Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:15:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="743512500" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.183.102]) by orsmga005.jf.intel.com with ESMTP; 20 May 2022 07:15:56 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong Subject: [edk2-devel] [PATCH 1/5] CpuException: Avoid allocating code pages for DXE instance Date: Fri, 20 May 2022 22:15:45 +0800 Message-Id: <20220520141549.108-2-ray.ni@intel.com> In-Reply-To: <20220520141549.108-1-ray.ni@intel.com> References: <20220520141549.108-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: 76L3qd3gkP6tfVCkMr7FoB8Ax1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1653056165; bh=AyOsQT8xb6wXWPcTqG5zseTKwRp0PunMbr9JL5KM7FU=; h=Cc:Date:From:Reply-To:Subject:To; b=iC1kb006biYt9i1bi8WQvyhFEE6X7j5yPA60eEc8uqKyk04dxvhFHssOsc3012rJnA5 8Ajn1ccMRTfpHIU1V5ucBjh+gZcksU48/HO4AheypJj0D6WYbVMPaQOJJPzoij4dqruGf Dj6CjusXq2tFbqNTylEW3vrnz3upKl1VOFg= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1653056166894100019 Content-Type: text/plain; charset="utf-8" Today the DXE instance allocates code page and then copies the IDT vectors to the allocated code page. Then it fixes up the vector number in the IDT vector. But if we update the NASM file to generate 256 IDT vectors, there is no need to do the copy and fix-up. A side effect is up to 4096 bytes (HOOKAFTER_STUB_SIZE * 256) is used for 256 IDT vectors. While 32 IDT vectors only require 512 bytes. But considering the code logic simplification, 3.5K space is not a big deal. SEC instance still generates 32 IDT vectors so no impact to SEC. If 3.5K is too much a waste in PEI phase, we can enhance the code further to generate 32 vectors for PEI. Signed-off-by: Ray Ni Cc: Eric Dong Acked-by: Eric Dong Reviewed-by: Jian J Wang --- .../CpuExceptionHandlerLib/DxeException.c | 22 ------------------- .../Ia32/ExceptionHandlerAsm.nasm | 4 ++-- .../X64/ExceptionHandlerAsm.nasm | 2 ++ .../X64/Xcode5ExceptionHandlerAsm.nasm | 9 ++++---- 4 files changed, 9 insertions(+), 28 deletions(-) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/Uef= iCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c index 61f11e98f8..5083c4b8e8 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c @@ -95,9 +95,6 @@ InitializeCpuInterruptHandlers ( IA32_DESCRIPTOR IdtDescriptor; UINTN IdtEntryCount; EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap; - UINTN Index; - UINTN InterruptEntry; - UINT8 *InterruptEntryCode; RESERVED_VECTORS_DATA *ReservedVectors; EFI_CPU_INTERRUPT_HANDLER *ExternalInterruptHandler; =20 @@ -138,25 +135,6 @@ InitializeCpuInterruptHandlers ( AsmGetTemplateAddressMap (&TemplateMap); ASSERT (TemplateMap.ExceptionStubHeaderSize <=3D HOOKAFTER_STUB_SIZE); =20 - Status =3D gBS->AllocatePool ( - EfiBootServicesCode, - TemplateMap.ExceptionStubHeaderSize * CPU_INTERRUPT_NUM, - (VOID **)&InterruptEntryCode - ); - ASSERT (!EFI_ERROR (Status) && InterruptEntryCode !=3D NULL); - - InterruptEntry =3D (UINTN)InterruptEntryCode; - for (Index =3D 0; Index < CPU_INTERRUPT_NUM; Index++) { - CopyMem ( - (VOID *)InterruptEntry, - (VOID *)TemplateMap.ExceptionStart, - TemplateMap.ExceptionStubHeaderSize - ); - AsmVectorNumFixup ((VOID *)InterruptEntry, (UINT8)Index, (VOID *)Templ= ateMap.ExceptionStart); - InterruptEntry +=3D TemplateMap.ExceptionStubHeaderSize; - } - - TemplateMap.ExceptionStart =3D (UINTN)InterruptEntry= Code; mExceptionHandlerData.IdtEntryCount =3D CPU_INTERRUPT_NUM; mExceptionHandlerData.ReservedVectors =3D ReservedVectors; mExceptionHandlerData.ExternalInterruptHandler =3D ExternalInterruptHand= ler; diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandle= rAsm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandler= Asm.nasm index 3fe9aed1e8..8ed2b8f455 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.na= sm +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.na= sm @@ -33,7 +33,7 @@ ALIGN 8 ; AsmIdtVectorBegin: %assign Vector 0 -%rep 32 +%rep 256 push byte %[Vector]; push eax mov eax, ASM_PFX(CommonInterruptEntry) @@ -439,7 +439,7 @@ ASM_PFX(AsmGetTemplateAddressMap): =20 mov ebx, dword [ebp + 0x8] mov dword [ebx], AsmIdtVectorBegin - mov dword [ebx + 0x4], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32 + mov dword [ebx + 0x4], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 256 mov dword [ebx + 0x8], HookAfterStubBegin =20 popad diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandler= Asm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAs= m.nasm index 9a806d1f86..aaf8d622e6 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm @@ -31,6 +31,8 @@ SECTION .text =20 ALIGN 8 =20 +; Generate 32 IDT vectors. +; 32 IDT vectors are enough because interrupts (32+) are not enabled in SE= C and PEI phase. AsmIdtVectorBegin: %assign Vector 0 %rep 32 diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionH= andlerAsm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5Except= ionHandlerAsm.nasm index 9c72fa5815..7c0e3d3b0b 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHandlerA= sm.nasm +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHandlerA= sm.nasm @@ -53,9 +53,10 @@ SECTION .text =20 ALIGN 8 =20 +; Generate 256 IDT vectors. AsmIdtVectorBegin: %assign Vector 0 -%rep 32 +%rep 256 push byte %[Vector] push rax mov rax, strict qword 0 ; mov rax, ASM_PFX(CommonInterruptE= ntry) @@ -453,16 +454,16 @@ global ASM_PFX(AsmGetTemplateAddressMap) ASM_PFX(AsmGetTemplateAddressMap): lea rax, [AsmIdtVectorBegin] mov qword [rcx], rax - mov qword [rcx + 0x8], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32 + mov qword [rcx + 0x8], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 256 lea rax, [HookAfterStubHeaderBegin] mov qword [rcx + 0x10], rax =20 ; Fix up CommonInterruptEntry address lea rax, [ASM_PFX(CommonInterruptEntry)] lea rcx, [AsmIdtVectorBegin] -%rep 32 +%rep 256 mov qword [rcx + (JmpAbsoluteAddress - 8 - HookAfterStubHeaderBegin= )], rax - add rcx, (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32 + add rcx, (AsmIdtVectorEnd - AsmIdtVectorBegin) / 256 %endrep ; Fix up HookAfterStubHeaderEnd lea rax, [HookAfterStubHeaderEnd] --=20 2.35.1.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89916): https://edk2.groups.io/g/devel/message/89916 Mute This Topic: https://groups.io/mt/91231767/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 17:16:08 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+89917+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89917+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1653056163; cv=none; d=zohomail.com; s=zohoarc; b=JexGU6WyOvo0HKvnBvBE/Ic1i3UxiQQ+Jy26KC+89+MVi0uW9u0n/zTxmFB3jHOAMpJnrPEkYkMz6/GTxXCmFRO9aNst7+1YgMvxojEfY97M2xObTYNjLS3rZswG3jJROuuzuoRufoDK5r66xvTlQPY2/L78CXgo3AThsfILiw8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653056163; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=MLVWrhqLd9G80RWWjizBhXryqVNe4U0jKruHv5Ex2Qo=; b=cDuqb3Ul4HiQZc2/Lsw5FMlVJ+SOmyqWqwiOi8lCcDuW81qRX5l+AiSXX0EzNFR/jNabwlQmS1Wvfua5fGYfNdZKibBQrShzBNaM8zQUEBBt10cUOIp48xcZJO909VZKYiIRKTyD6Dgoi2PPgKS6eHW8sUv6zTrX35s6c7b8tfQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89917+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1653056163689129.53975155510102; Fri, 20 May 2022 07:16:03 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id EtEiYY1788612xmqCbROrSOH; Fri, 20 May 2022 07:16:02 -0700 X-Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web08.9308.1653056161941887235 for ; Fri, 20 May 2022 07:16:02 -0700 X-IronPort-AV: E=McAfee;i="6400,9594,10353"; a="333243124" X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="333243124" X-Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:15:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="743512505" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.183.102]) by orsmga005.jf.intel.com with ESMTP; 20 May 2022 07:15:58 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong Subject: [edk2-devel] [PATCH 2/5] CpuException: Init global variables in-place Date: Fri, 20 May 2022 22:15:46 +0800 Message-Id: <20220520141549.108-3-ray.ni@intel.com> In-Reply-To: <20220520141549.108-1-ray.ni@intel.com> References: <20220520141549.108-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: lBOAyaPJn4UhUna8PVAYODucx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1653056162; bh=aDuSCmmG1TueTTH874mNJ9Tv7eqfUheUHkIHR6cdG1w=; h=Cc:Date:From:Reply-To:Subject:To; b=LCdX+HZrvS5Vv6zy7hHQ+FH3YmcRUUuDowZKSDYfY1TXigi36AWymF4add7nS/1k+dn 8NB7awWNlIlNTyXo79mCGOBtH3sqbd/nTEjUdqJZJYij0HekNimxBSIDbzhQxFSCXleTa 0SlJwdnRhCXgUYCuuG4pMnLVRN8tgARpXf8= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1653056164880100005 Content-Type: text/plain; charset="utf-8" Additionally removed two useless global variables: "SPIN_LOCK mDisplayMessageSpinLock" from SMM instance. "UINTN mEnabledInterruptNum" from DXE instance. Signed-off-by: Ray Ni Cc: Eric Dong Acked-by: Eric Dong Reviewed-by: Jian J Wang --- .../Library/CpuExceptionHandlerLib/DxeException.c | 11 ++++++----- .../Library/CpuExceptionHandlerLib/SmmException.c | 14 ++++++-------- 2 files changed, 12 insertions(+), 13 deletions(-) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/Uef= iCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c index 5083c4b8e8..da5b96d6c6 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c @@ -16,9 +16,12 @@ CONST UINTN mDoFarReturnFlag =3D 0; =20 RESERVED_VECTORS_DATA mReservedVectorsData[CPU_EXCEPTION_NUM]; EFI_CPU_INTERRUPT_HANDLER mExternalInterruptHandlerTable[CPU_EXCEPTION_NU= M]; -UINTN mEnabledInterruptNum =3D 0; - -EXCEPTION_HANDLER_DATA mExceptionHandlerData; +EXCEPTION_HANDLER_DATA mExceptionHandlerData =3D { + 0, // To be fixed + 0, // To be fixed + mReservedVectorsData, + mExternalInterruptHandlerTable +}; =20 UINT8 mNewStack[CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE]; @@ -62,8 +65,6 @@ InitializeCpuExceptionHandlers ( IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL ) { - mExceptionHandlerData.ReservedVectors =3D mReservedVectorsData; - mExceptionHandlerData.ExternalInterruptHandler =3D mExternalInterruptHan= dlerTable; InitializeSpinLock (&mExceptionHandlerData.DisplayMessageSpinLock); return InitializeCpuExceptionHandlersWorker (VectorInfo, &mExceptionHand= lerData); } diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c b/Uef= iCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c index 77ee74579f..9f0af4120a 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c @@ -11,14 +11,14 @@ =20 CONST UINTN mDoFarReturnFlag =3D 1; =20 -// -// Spin lock for CPU information display -// -SPIN_LOCK mDisplayMessageSpinLock; - RESERVED_VECTORS_DATA mReservedVectorsData[CPU_EXCEPTION_NUM]; EFI_CPU_INTERRUPT_HANDLER mExternalInterruptHandlerTable[CPU_EXCEPTION_NU= M]; -EXCEPTION_HANDLER_DATA mExceptionHandlerData; +EXCEPTION_HANDLER_DATA mExceptionHandlerData =3D { + 0, // To be fixed + 0, // To be fixed + mReservedVectorsData, + mExternalInterruptHandlerTable +}; =20 /** Common exception handler. @@ -58,8 +58,6 @@ InitializeCpuExceptionHandlers ( IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL ) { - mExceptionHandlerData.ReservedVectors =3D mReservedVectorsData; - mExceptionHandlerData.ExternalInterruptHandler =3D mExternalInterruptHan= dlerTable; InitializeSpinLock (&mExceptionHandlerData.DisplayMessageSpinLock); return InitializeCpuExceptionHandlersWorker (VectorInfo, &mExceptionHand= lerData); } --=20 2.35.1.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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Fri, 20 May 2022 07:16:02 -0700 X-IronPort-AV: E=McAfee;i="6400,9594,10353"; a="333243136" X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="333243136" X-Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:16:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="743512512" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.183.102]) by orsmga005.jf.intel.com with ESMTP; 20 May 2022 07:15:59 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong Subject: [edk2-devel] [PATCH 3/5] CpuException: Avoid allocating page but using global variables Date: Fri, 20 May 2022 22:15:47 +0800 Message-Id: <20220520141549.108-4-ray.ni@intel.com> In-Reply-To: <20220520141549.108-1-ray.ni@intel.com> References: <20220520141549.108-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: yUIWK8G0JmsDeYWauLaWQWJyx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1653056163; bh=UM9MHlOh/gp3/Ktvagw4G/Eu1c948iPVAFQH52omh7o=; h=Cc:Date:From:Reply-To:Subject:To; b=YhWadDslBiDIPNYUF4rjnDVPvgnUJKcVKQ+7s+nA7oHKu25vNC8HRvb0SQjbcEZ5zpJ Yv+mejV+f1RHHD0OMxJpTqUOOMxgLfe1loisgcK3xN4+DkeahJw5Hf4UZJ1ldkrZfLc7Q kXwxeVLTB4tQYV1OwDOSPS8epiCP4hASjI4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1653056164867100004 Content-Type: text/plain; charset="utf-8" Signed-off-by: Ray Ni Cc: Eric Dong Acked-by: Eric Dong Reviewed-by: Jian J Wang --- .../CpuExceptionHandlerLib/DxeException.c | 24 ++++--------------- 1 file changed, 5 insertions(+), 19 deletions(-) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/Uef= iCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c index da5b96d6c6..f139131a7c 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c @@ -14,8 +14,8 @@ =20 CONST UINTN mDoFarReturnFlag =3D 0; =20 -RESERVED_VECTORS_DATA mReservedVectorsData[CPU_EXCEPTION_NUM]; -EFI_CPU_INTERRUPT_HANDLER mExternalInterruptHandlerTable[CPU_EXCEPTION_NU= M]; +RESERVED_VECTORS_DATA mReservedVectorsData[CPU_INTERRUPT_NUM]; +EFI_CPU_INTERRUPT_HANDLER mExternalInterruptHandlerTable[CPU_INTERRUPT_NU= M]; EXCEPTION_HANDLER_DATA mExceptionHandlerData =3D { 0, // To be fixed 0, // To be fixed @@ -96,27 +96,15 @@ InitializeCpuInterruptHandlers ( IA32_DESCRIPTOR IdtDescriptor; UINTN IdtEntryCount; EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap; - RESERVED_VECTORS_DATA *ReservedVectors; - EFI_CPU_INTERRUPT_HANDLER *ExternalInterruptHandler; - - Status =3D gBS->AllocatePool ( - EfiBootServicesCode, - sizeof (RESERVED_VECTORS_DATA) * CPU_INTERRUPT_NUM, - (VOID **)&ReservedVectors - ); - ASSERT (!EFI_ERROR (Status) && ReservedVectors !=3D NULL); - SetMem ((VOID *)ReservedVectors, sizeof (RESERVED_VECTORS_DATA) * CPU_IN= TERRUPT_NUM, 0xff); + + SetMem ((VOID *)mReservedVectorsData, sizeof (RESERVED_VECTORS_DATA) * C= PU_INTERRUPT_NUM, 0xff); if (VectorInfo !=3D NULL) { - Status =3D ReadAndVerifyVectorInfo (VectorInfo, ReservedVectors, CPU_I= NTERRUPT_NUM); + Status =3D ReadAndVerifyVectorInfo (VectorInfo, mReservedVectorsData, = CPU_INTERRUPT_NUM); if (EFI_ERROR (Status)) { - FreePool (ReservedVectors); return EFI_INVALID_PARAMETER; } } =20 - ExternalInterruptHandler =3D AllocateZeroPool (sizeof (EFI_CPU_INTERRUPT= _HANDLER) * CPU_INTERRUPT_NUM); - ASSERT (ExternalInterruptHandler !=3D NULL); - // // Read IDT descriptor and calculate IDT size // @@ -137,8 +125,6 @@ InitializeCpuInterruptHandlers ( ASSERT (TemplateMap.ExceptionStubHeaderSize <=3D HOOKAFTER_STUB_SIZE); =20 mExceptionHandlerData.IdtEntryCount =3D CPU_INTERRUPT_NUM; - mExceptionHandlerData.ReservedVectors =3D ReservedVectors; - mExceptionHandlerData.ExternalInterruptHandler =3D ExternalInterruptHand= ler; InitializeSpinLock (&mExceptionHandlerData.DisplayMessageSpinLock); =20 UpdateIdtTable (IdtTable, &TemplateMap, &mExceptionHandlerData); --=20 2.35.1.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89918): https://edk2.groups.io/g/devel/message/89918 Mute This Topic: https://groups.io/mt/91231769/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 17:16:08 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+89919+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89919+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1653056163; cv=none; d=zohomail.com; s=zohoarc; b=d5gVBfsMXZObuWe1Zb/ix6xnfFpxmDOKdEcaU4ao6sBfvai/4SxjESJNtL5LoiXdk66N3DiygV9RbQ2oityHfqZh2TajRhfGTcVdJYm+eUobjHN1+J9xdpCEthxzFwoDaMqmsrZaTdAwRgi2Doe18eX2c1MXbFjUoilzunAOeR8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653056163; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=8oNo/1JT2xCtklRHtQ6fgwi6jBJC3qkKtTXisiabFJY=; b=dORiT7fKVaQvHxO8c/RmT1rLEwi+9Xa6wdLWxm4kZfIWWEs/HkNYU8GzoyuXbRsxXIRLFOBfCPTQtWLGMfkua51YEINlVw4ZqLHG5IngRGxyyZDXlHr3zHM4vIf3GtR1tOhpvCxPGyMnODIx64G4boMV/LoxCTsAwi6ZePk79GU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89919+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1653056163965492.04985289019635; Fri, 20 May 2022 07:16:03 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id NpucYY1788612xzwflux45LD; Fri, 20 May 2022 07:16:03 -0700 X-Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web08.9308.1653056161941887235 for ; Fri, 20 May 2022 07:16:02 -0700 X-IronPort-AV: E=McAfee;i="6400,9594,10353"; a="333243144" X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="333243144" X-Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:16:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="743512522" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.183.102]) by orsmga005.jf.intel.com with ESMTP; 20 May 2022 07:16:00 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong Subject: [edk2-devel] [PATCH 4/5] CpuException: Remove InitializeCpuInterruptHandlers Date: Fri, 20 May 2022 22:15:48 +0800 Message-Id: <20220520141549.108-5-ray.ni@intel.com> In-Reply-To: <20220520141549.108-1-ray.ni@intel.com> References: <20220520141549.108-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: 0ZHsWJj5hFecjjydVgstNrBNx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1653056163; bh=uVjDrXN9I3VA/2vFkeN+bZee5Q1PUfoMmbnpMmGt6yI=; h=Cc:Date:From:Reply-To:Subject:To; b=v1Xbtu9NmMsxXMdlOk77w06kQBT893Y57cmWttEy1myGTrkCfL7e8NE65AwwKPaThC3 4PQ0uDhaJ0NMdiqZHhsYaZfylkf05b/UW42sz1l42HvG7Rri9Fa30o1IwRUy9USjVsP6I rvsekSVc+WW5whMB5UKkEYAZUKP6HcmzZxE= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1653056164945100008 Content-Type: text/plain; charset="utf-8" InitializeCpuExceptionHandlers() expects caller allocates IDT while InitializeCpuInterruptHandlers() allocates 256 IDT entries itself. InitializeCpuExceptionHandlers() fills max 32 IDT entries allocated by caller. If caller allocates 10 entries, the API just fills 10 IDT entries. The inconsistency between the two APIs makes code hard to unerstand and hard to share. Because there is only one caller (CpuDxe) for InitializeCpuInterruptHandler(), this patch updates CpuDxe driver to allocates 256 IDT entries then call InitializeCpuExceptionHandlers(). With this change, InitializeCpuInterruptHandlers() is removed completely. And InitializeCpuExceptionHandlers() fills max 32 entries for PEI and SMM instance, max 256 entries for DXE instance. Such behavior matches to the original one. Signed-off-by: Ray Ni Cc: Eric Dong Acked-by: Eric Dong eric.dong@intel.com Reviewed-by: Jian J Wang --- .../Include/Library/CpuExceptionHandlerLib.h | 28 +------ .../CpuExceptionHandlerLibNull.c | 31 +------ UefiCpuPkg/CpuDxe/CpuDxe.c | 33 ++++++-- .../CpuExceptionHandlerLib/DxeException.c | 80 ++----------------- .../CpuExceptionHandlerLib/PeiCpuException.c | 61 +------------- .../PeiDxeSmmCpuException.c | 19 ++--- .../SecPeiCpuException.c | 31 +------ .../CpuExceptionHandlerLib/SmmException.c | 35 ++------ 8 files changed, 56 insertions(+), 262 deletions(-) diff --git a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h b/MdeMod= ulePkg/Include/Library/CpuExceptionHandlerLib.h index 22a4408f9f..d4649bebe1 100644 --- a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h +++ b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h @@ -2,7 +2,7 @@ CPU Exception library provides the default CPU interrupt/exception handl= er. It also provides capability to register user interrupt/exception handler. =20 - Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -132,28 +132,6 @@ InitializeCpuExceptionHandlersEx ( IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL ); =20 -/** - Initializes all CPU interrupt/exceptions entries and provides the defaul= t interrupt/exception handlers. - - Caller should try to get an array of interrupt and/or exception vectors = that are in use and need to - persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification. - If caller cannot get reserved vector list or it does not exists, set Vec= torInfo to NULL. - If VectorInfo is not NULL, the exception vectors will be initialized per= vector attribute accordingly. - - @param[in] VectorInfo Pointer to reserved vector list. - - @retval EFI_SUCCESS All CPU interrupt/exception entries have b= een successfully initialized - with default interrupt/exception handlers. - @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if= VectorInfo is not NULL. - @retval EFI_UNSUPPORTED This function is not supported. - -**/ -EFI_STATUS -EFIAPI -InitializeCpuInterruptHandlers ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL - ); - /** Registers a function to be called from the processor interrupt handler. =20 @@ -161,8 +139,8 @@ InitializeCpuInterruptHandlers ( interrupt or exception type specified by InterruptType. If InterruptHand= ler is NULL, then the handler for the processor interrupt or exception type specified by Inter= ruptType is uninstalled. The installed handler is called once for each processor interrupt or exc= eption. - NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() or - InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED retu= rned. + NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() is invoked, + otherwise EFI_UNSUPPORTED returned. =20 @param[in] InterruptType Defines which interrupt or exception to ho= ok. @param[in] InterruptHandler A pointer to a function of type EFI_CPU_IN= TERRUPT_HANDLER that is called diff --git a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHa= ndlerLibNull.c b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExcepti= onHandlerLibNull.c index 35ab5a8db5..54f38788fe 100644 --- a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLi= bNull.c +++ b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLi= bNull.c @@ -1,7 +1,7 @@ /** @file CPU Exception Handler library implementition with empty functions. =20 - Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -33,31 +33,6 @@ InitializeCpuExceptionHandlers ( return EFI_SUCCESS; } =20 -/** - Initializes all CPU interrupt/exceptions entries and provides the defaul= t interrupt/exception handlers. - - Caller should try to get an array of interrupt and/or exception vectors = that are in use and need to - persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification. - If caller cannot get reserved vector list or it does not exists, set Vec= torInfo to NULL. - If VectorInfo is not NULL, the exception vectors will be initialized per= vector attribute accordingly. - - @param[in] VectorInfo Pointer to reserved vector list. - - @retval EFI_SUCCESS All CPU interrupt/exception entries have b= een successfully initialized - with default interrupt/exception handlers. - @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if= VectorInfo is not NULL. - @retval EFI_UNSUPPORTED This function is not supported. - -**/ -EFI_STATUS -EFIAPI -InitializeCpuInterruptHandlers ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL - ) -{ - return EFI_SUCCESS; -} - /** Registers a function to be called from the processor interrupt handler. =20 @@ -65,8 +40,8 @@ InitializeCpuInterruptHandlers ( interrupt or exception type specified by InterruptType. If InterruptHand= ler is NULL, then the handler for the processor interrupt or exception type specified by Inter= ruptType is uninstalled. The installed handler is called once for each processor interrupt or exc= eption. - NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() or - InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED retu= rned. + NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() is invoked, + otherwise EFI_UNSUPPORTED returned. =20 @param[in] InterruptType Defines which interrupt or exception to ho= ok. @param[in] InterruptHandler A pointer to a function of type EFI_CPU_IN= TERRUPT_HANDLER that is called diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c index 00f3cb0957..a6a91507f6 100644 --- a/UefiCpuPkg/CpuDxe/CpuDxe.c +++ b/UefiCpuPkg/CpuDxe/CpuDxe.c @@ -1,7 +1,7 @@ /** @file CPU DXE Module to produce CPU ARCH Protocol. =20 - Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2008 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -10,6 +10,8 @@ #include "CpuMp.h" #include "CpuPageTable.h" =20 +#define CPU_INTERRUPT_NUM 256 + // // Global Variables // @@ -924,9 +926,12 @@ InitInterruptDescriptorTable ( VOID ) { - EFI_STATUS Status; - EFI_VECTOR_HANDOFF_INFO *VectorInfoList; - EFI_VECTOR_HANDOFF_INFO *VectorInfo; + EFI_STATUS Status; + EFI_VECTOR_HANDOFF_INFO *VectorInfoList; + EFI_VECTOR_HANDOFF_INFO *VectorInfo; + IA32_IDT_GATE_DESCRIPTOR *IdtTable; + IA32_DESCRIPTOR IdtDescriptor; + UINTN IdtEntryCount; =20 VectorInfo =3D NULL; Status =3D EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGu= id, (VOID **)&VectorInfoList); @@ -934,7 +939,25 @@ InitInterruptDescriptorTable ( VectorInfo =3D VectorInfoList; } =20 - Status =3D InitializeCpuInterruptHandlers (VectorInfo); + AsmReadIdtr (&IdtDescriptor); + IdtEntryCount =3D (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESC= RIPTOR); + if (IdtEntryCount < CPU_INTERRUPT_NUM) { + // + // Increase Interrupt Descriptor Table and Copy the old IDT table in + // + IdtTable =3D AllocateZeroPool (sizeof (IA32_IDT_GATE_DESCRIPTOR) * CPU= _INTERRUPT_NUM); + ASSERT (IdtTable !=3D NULL); + CopyMem (IdtTable, (VOID *)IdtDescriptor.Base, sizeof (IA32_IDT_GATE_D= ESCRIPTOR) * IdtEntryCount); + + // + // Load Interrupt Descriptor Table + // + IdtDescriptor.Base =3D (UINTN)IdtTable; + IdtDescriptor.Limit =3D (UINT16)(sizeof (IA32_IDT_GATE_DESCRIPTOR) * C= PU_INTERRUPT_NUM - 1); + AsmWriteIdtr (&IdtDescriptor); + } + + Status =3D InitializeCpuExceptionHandlers (VectorInfo); ASSERT_EFI_ERROR (Status); } =20 diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/Uef= iCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c index f139131a7c..c7c1fe31d2 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c @@ -1,7 +1,7 @@ /** @file CPU exception handler library implemenation for DXE modules. =20 - Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2013 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -17,8 +17,8 @@ CONST UINTN mDoFarReturnFlag =3D 0; RESERVED_VECTORS_DATA mReservedVectorsData[CPU_INTERRUPT_NUM]; EFI_CPU_INTERRUPT_HANDLER mExternalInterruptHandlerTable[CPU_INTERRUPT_NU= M]; EXCEPTION_HANDLER_DATA mExceptionHandlerData =3D { - 0, // To be fixed - 0, // To be fixed + CPU_INTERRUPT_NUM, + 0, // To be fixed mReservedVectorsData, mExternalInterruptHandlerTable }; @@ -69,76 +69,6 @@ InitializeCpuExceptionHandlers ( return InitializeCpuExceptionHandlersWorker (VectorInfo, &mExceptionHand= lerData); } =20 -/** - Initializes all CPU interrupt/exceptions entries and provides the defaul= t interrupt/exception handlers. - - Caller should try to get an array of interrupt and/or exception vectors = that are in use and need to - persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification. - If caller cannot get reserved vector list or it does not exists, set Vec= torInfo to NULL. - If VectorInfo is not NULL, the exception vectors will be initialized per= vector attribute accordingly. - - @param[in] VectorInfo Pointer to reserved vector list. - - @retval EFI_SUCCESS All CPU interrupt/exception entries have b= een successfully initialized - with default interrupt/exception handlers. - @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if= VectorInfo is not NULL. - @retval EFI_UNSUPPORTED This function is not supported. - -**/ -EFI_STATUS -EFIAPI -InitializeCpuInterruptHandlers ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL - ) -{ - EFI_STATUS Status; - IA32_IDT_GATE_DESCRIPTOR *IdtTable; - IA32_DESCRIPTOR IdtDescriptor; - UINTN IdtEntryCount; - EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap; - - SetMem ((VOID *)mReservedVectorsData, sizeof (RESERVED_VECTORS_DATA) * C= PU_INTERRUPT_NUM, 0xff); - if (VectorInfo !=3D NULL) { - Status =3D ReadAndVerifyVectorInfo (VectorInfo, mReservedVectorsData, = CPU_INTERRUPT_NUM); - if (EFI_ERROR (Status)) { - return EFI_INVALID_PARAMETER; - } - } - - // - // Read IDT descriptor and calculate IDT size - // - AsmReadIdtr (&IdtDescriptor); - IdtEntryCount =3D (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESC= RIPTOR); - if (IdtEntryCount > CPU_INTERRUPT_NUM) { - IdtEntryCount =3D CPU_INTERRUPT_NUM; - } - - // - // Create Interrupt Descriptor Table and Copy the old IDT table in - // - IdtTable =3D AllocateZeroPool (sizeof (IA32_IDT_GATE_DESCRIPTOR) * CPU_I= NTERRUPT_NUM); - ASSERT (IdtTable !=3D NULL); - CopyMem (IdtTable, (VOID *)IdtDescriptor.Base, sizeof (IA32_IDT_GATE_DES= CRIPTOR) * IdtEntryCount); - - AsmGetTemplateAddressMap (&TemplateMap); - ASSERT (TemplateMap.ExceptionStubHeaderSize <=3D HOOKAFTER_STUB_SIZE); - - mExceptionHandlerData.IdtEntryCount =3D CPU_INTERRUPT_NUM; - InitializeSpinLock (&mExceptionHandlerData.DisplayMessageSpinLock); - - UpdateIdtTable (IdtTable, &TemplateMap, &mExceptionHandlerData); - - // - // Load Interrupt Descriptor Table - // - IdtDescriptor.Base =3D (UINTN)IdtTable; - IdtDescriptor.Limit =3D (UINT16)(sizeof (IA32_IDT_GATE_DESCRIPTOR) * CPU= _INTERRUPT_NUM - 1); - AsmWriteIdtr ((IA32_DESCRIPTOR *)&IdtDescriptor); - - return EFI_SUCCESS; -} - /** Registers a function to be called from the processor interrupt handler. =20 @@ -146,8 +76,8 @@ InitializeCpuInterruptHandlers ( interrupt or exception type specified by InterruptType. If InterruptHand= ler is NULL, then the handler for the processor interrupt or exception type specified by Inter= ruptType is uninstalled. The installed handler is called once for each processor interrupt or exc= eption. - NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() or - InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED retu= rned. + NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() is invoked, + otherwise EFI_UNSUPPORTED returned. =20 @param[in] InterruptType Defines which interrupt or exception to ho= ok. @param[in] InterruptHandler A pointer to a function of type EFI_CPU_IN= TERRUPT_HANDLER that is called diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c b/= UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c index 687fc4177f..1ae611c75e 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c @@ -1,7 +1,7 @@ /** @file CPU exception handler library implementation for PEIM module. =20 -Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -133,6 +133,7 @@ InitializeCpuExceptionHandlers ( =20 ExceptionHandlerData =3D AllocatePool (sizeof (EXCEPTION_HANDLER_DATA)); ASSERT (ExceptionHandlerData !=3D NULL); + ExceptionHandlerData->IdtEntryCount =3D CPU_EXCEPTION_NUM; ExceptionHandlerData->ReservedVectors =3D ReservedVectors; ExceptionHandlerData->ExternalInterruptHandler =3D NULL; InitializeSpinLock (&ExceptionHandlerData->DisplayMessageSpinLock); @@ -148,64 +149,6 @@ InitializeCpuExceptionHandlers ( return EFI_SUCCESS; } =20 -/** - Initializes all CPU interrupt/exceptions entries and provides the defaul= t interrupt/exception handlers. - - Caller should try to get an array of interrupt and/or exception vectors = that are in use and need to - persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification. - If caller cannot get reserved vector list or it does not exists, set Vec= torInfo to NULL. - If VectorInfo is not NULL, the exception vectors will be initialized per= vector attribute accordingly. - - @param[in] VectorInfo Pointer to reserved vector list. - - @retval EFI_SUCCESS All CPU interrupt/exception entries have b= een successfully initialized - with default interrupt/exception handlers. - @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if= VectorInfo is not NULL. - @retval EFI_UNSUPPORTED This function is not supported. - -**/ -EFI_STATUS -EFIAPI -InitializeCpuInterruptHandlers ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL - ) -{ - return EFI_UNSUPPORTED; -} - -/** - Registers a function to be called from the processor interrupt handler. - - This function registers and enables the handler specified by InterruptHa= ndler for a processor - interrupt or exception type specified by InterruptType. If InterruptHand= ler is NULL, then the - handler for the processor interrupt or exception type specified by Inter= ruptType is uninstalled. - The installed handler is called once for each processor interrupt or exc= eption. - NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() or - InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED retu= rned. - - @param[in] InterruptType Defines which interrupt or exception to ho= ok. - @param[in] InterruptHandler A pointer to a function of type EFI_CPU_IN= TERRUPT_HANDLER that is called - when a processor interrupt occurs. If this= parameter is NULL, then the handler - will be uninstalled. - - @retval EFI_SUCCESS The handler for the processor interrupt wa= s successfully installed or uninstalled. - @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handle= r for InterruptType was - previously installed. - @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler fo= r InterruptType was not - previously installed. - @retval EFI_UNSUPPORTED The interrupt specified by InterruptType i= s not supported, - or this function is not supported. -**/ -EFI_STATUS -EFIAPI -RegisterCpuInterruptHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler - ) -{ - return EFI_UNSUPPORTED; -} - /** Initializes all CPU exceptions entries with optional extra initializatio= ns. =20 diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuExceptio= n.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c index f47a80dcab..a7d0897ef1 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c @@ -1,7 +1,7 @@ /** @file CPU Exception Library provides PEI/DXE/SMM CPU common exception handler. =20 -Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -261,31 +261,26 @@ InitializeCpuExceptionHandlersWorker ( RESERVED_VECTORS_DATA *ReservedVectors; =20 ReservedVectors =3D ExceptionHandlerData->ReservedVectors; - SetMem ((VOID *)ReservedVectors, sizeof (RESERVED_VECTORS_DATA) * CPU_EX= CEPTION_NUM, 0xff); + SetMem ((VOID *)ReservedVectors, sizeof (RESERVED_VECTORS_DATA) * Except= ionHandlerData->IdtEntryCount, 0xff); if (VectorInfo !=3D NULL) { - Status =3D ReadAndVerifyVectorInfo (VectorInfo, ReservedVectors, CPU_E= XCEPTION_NUM); + Status =3D ReadAndVerifyVectorInfo (VectorInfo, ReservedVectors, Excep= tionHandlerData->IdtEntryCount); if (EFI_ERROR (Status)) { return EFI_INVALID_PARAMETER; } } =20 // - // Read IDT descriptor and calculate IDT size + // Setup the exception handlers according to IDT size, but no more than + // ExceptionHandlerData->IdtEntryCount (32 in PEI and SMM, 256 in DXE)= handlers. // AsmReadIdtr (&IdtDescriptor); - IdtEntryCount =3D (IdtDescriptor.Limit + 1) / sizeof (IA32_IDT_GATE_DESC= RIPTOR); - if (IdtEntryCount > CPU_EXCEPTION_NUM) { - // - // CPU exception library only setup CPU_EXCEPTION_NUM exception handle= r at most - // - IdtEntryCount =3D CPU_EXCEPTION_NUM; - } + IdtEntryCount =3D (IdtDescriptor.Limit + 1) / size= of (IA32_IDT_GATE_DESCRIPTOR); + ExceptionHandlerData->IdtEntryCount =3D MIN (IdtEntryCount, ExceptionHan= dlerData->IdtEntryCount); =20 IdtTable =3D (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base; AsmGetTemplateAddressMap (&TemplateMap); ASSERT (TemplateMap.ExceptionStubHeaderSize <=3D HOOKAFTER_STUB_SIZE); =20 - ExceptionHandlerData->IdtEntryCount =3D IdtEntryCount; UpdateIdtTable (IdtTable, &TemplateMap, ExceptionHandlerData); =20 return EFI_SUCCESS; diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c= b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c index 6e5216380d..e894ead612 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c @@ -1,7 +1,7 @@ /** @file CPU exception handler library implemenation for SEC/PEIM modules. =20 -Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -166,31 +166,6 @@ InitializeCpuExceptionHandlers ( return EFI_SUCCESS; } =20 -/** - Initializes all CPU interrupt/exceptions entries and provides the defaul= t interrupt/exception handlers. - - Caller should try to get an array of interrupt and/or exception vectors = that are in use and need to - persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification. - If caller cannot get reserved vector list or it does not exists, set Vec= torInfo to NULL. - If VectorInfo is not NULL, the exception vectors will be initialized per= vector attribute accordingly. - - @param[in] VectorInfo Pointer to reserved vector list. - - @retval EFI_SUCCESS All CPU interrupt/exception entries have b= een successfully initialized - with default interrupt/exception handlers. - @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if= VectorInfo is not NULL. - @retval EFI_UNSUPPORTED This function is not supported. - -**/ -EFI_STATUS -EFIAPI -InitializeCpuInterruptHandlers ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL - ) -{ - return EFI_UNSUPPORTED; -} - /** Registers a function to be called from the processor interrupt handler. =20 @@ -198,8 +173,8 @@ InitializeCpuInterruptHandlers ( interrupt or exception type specified by InterruptType. If InterruptHand= ler is NULL, then the handler for the processor interrupt or exception type specified by Inter= ruptType is uninstalled. The installed handler is called once for each processor interrupt or exc= eption. - NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() or - InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED retu= rned. + NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() is invoked, + otherwise EFI_UNSUPPORTED returned. =20 @param[in] InterruptType Defines which interrupt or exception to ho= ok. @param[in] InterruptHandler A pointer to a function of type EFI_CPU_IN= TERRUPT_HANDLER that is called diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c b/Uef= iCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c index 9f0af4120a..ec643556c7 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c @@ -1,7 +1,7 @@ /** @file CPU exception handler library implementation for SMM modules. =20 - Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2013 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -14,8 +14,8 @@ CONST UINTN mDoFarReturnFlag =3D 1; RESERVED_VECTORS_DATA mReservedVectorsData[CPU_EXCEPTION_NUM]; EFI_CPU_INTERRUPT_HANDLER mExternalInterruptHandlerTable[CPU_EXCEPTION_NU= M]; EXCEPTION_HANDLER_DATA mExceptionHandlerData =3D { - 0, // To be fixed - 0, // To be fixed + CPU_EXCEPTION_NUM, + 0, // To be fixed mReservedVectorsData, mExternalInterruptHandlerTable }; @@ -62,31 +62,6 @@ InitializeCpuExceptionHandlers ( return InitializeCpuExceptionHandlersWorker (VectorInfo, &mExceptionHand= lerData); } =20 -/** - Initializes all CPU interrupt/exceptions entries and provides the defaul= t interrupt/exception handlers. - - Caller should try to get an array of interrupt and/or exception vectors = that are in use and need to - persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification. - If caller cannot get reserved vector list or it does not exists, set Vec= torInfo to NULL. - If VectorInfo is not NULL, the exception vectors will be initialized per= vector attribute accordingly. - - @param[in] VectorInfo Pointer to reserved vector list. - - @retval EFI_SUCCESS All CPU interrupt/exception entries have b= een successfully initialized - with default interrupt/exception handlers. - @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if= VectorInfo is not NULL. - @retval EFI_UNSUPPORTED This function is not supported. - -**/ -EFI_STATUS -EFIAPI -InitializeCpuInterruptHandlers ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL - ) -{ - return EFI_UNSUPPORTED; -} - /** Registers a function to be called from the processor interrupt handler. =20 @@ -94,8 +69,8 @@ InitializeCpuInterruptHandlers ( interrupt or exception type specified by InterruptType. If InterruptHand= ler is NULL, then the handler for the processor interrupt or exception type specified by Inter= ruptType is uninstalled. The installed handler is called once for each processor interrupt or exc= eption. - NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() or - InitializeCpuInterruptHandlers() invoked, otherwise EFI_UNSUPPORTED retu= rned. + NOTE: This function should be invoked after InitializeCpuExceptionHandle= rs() is invoked, + otherwise EFI_UNSUPPORTED returned. =20 @param[in] InterruptType Defines which interrupt or exception to ho= ok. @param[in] InterruptHandler A pointer to a function of type EFI_CPU_IN= TERRUPT_HANDLER that is called --=20 2.35.1.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#89919): https://edk2.groups.io/g/devel/message/89919 Mute This Topic: https://groups.io/mt/91231770/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 17:16:08 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+89920+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89920+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1653056165; cv=none; d=zohomail.com; s=zohoarc; b=f8ZHA4H9kOqHaMQPEy05G5O0G5zPxm3iM2+/NsCX4pz+26WAoaCfLO5f3z0h2lD+TfFtNU2FbVCPY6KsvSksJuF4o69suDcLTx/exEzSMcyYZLr5lJhvlynoUL8cXIadHgaBhQGg0a8cNoaRGBLKh9CYdGW8pOsNteNhXLM41mE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1653056165; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=NZw6VH85lQDsAeT6p+fSG1cA73w30oMFnhp10hlyU08=; b=AD5OqdzMjUCGc7YIGGmlpKLdMmIY1sHjZ3M7JaQo99xL/Oylm4Ei7094GbJZFHsPWfl2AfBtnyGevJz+5hlYFqCOTYGUhDRj32/WTcomebAuxw4G88QWQVK8Wl+5zpzVisoTCtSPLjyj1DS4MSR4IUfpsAxTA4LuF42db89o7Ao= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+89920+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1653056165335562.771409878612; Fri, 20 May 2022 07:16:05 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id vCioYY1788612x4fE3fB1Z3X; Fri, 20 May 2022 07:16:05 -0700 X-Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web10.9319.1653056164042393610 for ; Fri, 20 May 2022 07:16:04 -0700 X-IronPort-AV: E=McAfee;i="6400,9594,10353"; a="333243163" X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="333243163" X-Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:16:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="743512531" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.183.102]) by orsmga005.jf.intel.com with ESMTP; 20 May 2022 07:16:02 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Jian J Wang Subject: [edk2-devel] [PATCH 5/5] CpuException: Add InitializeSeparateExceptionStacks Date: Fri, 20 May 2022 22:15:49 +0800 Message-Id: <20220520141549.108-6-ray.ni@intel.com> In-Reply-To: <20220520141549.108-1-ray.ni@intel.com> References: <20220520141549.108-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: 8hYyIVXh7qm1qxUTxCJ2hn9ax1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1653056165; bh=q42REJjqToOQzTBioObF+QiB5/WDDZYmjItR7/RhqXY=; h=Cc:Date:From:Reply-To:Subject:To; b=Pqzq+dC1mNCDiUX38gUwvNSIbt7XmpSbKEm2NQRBofDzRjttPN35JgZSQWx8CIKdqUp PEP1Ah1vjCdga+aRRyzVV1La+ca2+HIhvG14wR7LzctuqwV7Nuwbv44sVWpZT++7pTjZp zRVZKnqK5YqVuP8h5IEeqxQ/FlTXtKS1jzY= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1653056166921100020 Content-Type: text/plain; charset="utf-8" Today InitializeCpuExceptionHandlersEx is called from three modules: 1. DxeCore (links to DxeCpuExceptionHandlerLib) DxeCore expects it initializes the IDT entries as well as assigning separate stacks for #DF and #PF. 2. CpuMpPei (links to PeiCpuExceptionHandlerLib) and CpuDxe (links to DxeCpuExceptionHandlerLib) It's called for each thread for only assigning separate stacks for #DF and #PF. The IDT entries initialization is skipped because caller sets InitData->X64.InitDefaultHandlers to FALSE. Additionally, SecPeiCpuExceptionHandlerLib, SmmCpuExceptionHandlerLib also implement such API and the behavior of the API is simply to initialize IDT entries only. Because it mixes the IDT entries initialization and separate stacks assignment for certain exception handlers together, in order to know whether the function call only initializes IDT entries, or assigns stacks, we need to check: 1. value of InitData->X64.InitDefaultHandlers 2. library instance This patch cleans up the code to separate the stack assignment to a new API: InitializeSeparateExceptionStacks(). Only when caller calls the new API, the separate stacks are assigned. With this change, the SecPei and Smm instance can return unsupported which gives caller a very clear status. The old API InitializeCpuExceptionHandlersEx() is removed in this patch. Because no platform module is consuming the old API, the impact is none. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Jian J Wang Acked-by: Eric Dong Reviewed-by: Jian J Wang --- MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 2 +- .../Include/Library/CpuExceptionHandlerLib.h | 24 ++--- .../CpuExceptionHandlerLibNull.c | 26 ++---- UefiCpuPkg/CpuDxe/CpuMp.c | 6 +- UefiCpuPkg/CpuMpPei/CpuMpPei.c | 4 +- .../CpuExceptionHandlerLib/DxeException.c | 91 ++++++------------- .../CpuExceptionHandlerLib/PeiCpuException.c | 51 ++--------- .../SecPeiCpuException.c | 27 ++---- .../CpuExceptionHandlerLib/SmmException.c | 27 ++---- 9 files changed, 74 insertions(+), 184 deletions(-) diff --git a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c b/MdeModulePkg/Core/Dx= e/DxeMain/DxeMain.c index 2c27fc0695..83f49d7c00 100644 --- a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c +++ b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c @@ -253,7 +253,7 @@ DxeMain ( VectorInfoList =3D (EFI_VECTOR_HANDOFF_INFO *)(GET_GUID_HOB_DATA (Guid= Hob)); } =20 - Status =3D InitializeCpuExceptionHandlersEx (VectorInfoList, NULL); + Status =3D InitializeCpuExceptionHandlers (VectorInfoList); ASSERT_EFI_ERROR (Status); =20 // diff --git a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h b/MdeMod= ulePkg/Include/Library/CpuExceptionHandlerLib.h index d4649bebe1..9a495081f7 100644 --- a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h +++ b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h @@ -103,32 +103,20 @@ InitializeCpuExceptionHandlers ( ); =20 /** - Initializes all CPU exceptions entries with optional extra initializatio= ns. + Setup separate stacks for certain exception handlers. =20 - By default, this method should include all functionalities implemented by - InitializeCpuExceptionHandlers(), plus extra initialization works, if an= y. - This could be done by calling InitializeCpuExceptionHandlers() directly - in this method besides the extra works. + InitData is optional and processor arch dependent. =20 - InitData is optional and its use and content are processor arch dependen= t. - The typical usage of it is to convey resources which have to be reserved - elsewhere and are necessary for the extra initializations of exception. + @param[in] InitData Pointer to data optional for information about= how + to assign stacks for certain exception handler= s. =20 - @param[in] VectorInfo Pointer to reserved vector list. - @param[in] InitData Pointer to data optional for extra initializat= ions - of exception. - - @retval EFI_SUCCESS The exceptions have been successfully - initialized. - @retval EFI_INVALID_PARAMETER VectorInfo or InitData contains invalid - content. + @retval EFI_SUCCESS The stacks are assigned successfully. @retval EFI_UNSUPPORTED This function is not supported. =20 **/ EFI_STATUS EFIAPI -InitializeCpuExceptionHandlersEx ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, +InitializeSeparateExceptionStacks ( IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL ); =20 diff --git a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHa= ndlerLibNull.c b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExcepti= onHandlerLibNull.c index 54f38788fe..8aeedcb4d1 100644 --- a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLi= bNull.c +++ b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLi= bNull.c @@ -82,34 +82,22 @@ DumpCpuContext ( } =20 /** - Initializes all CPU exceptions entries with optional extra initializatio= ns. + Setup separate stacks for certain exception handlers. =20 - By default, this method should include all functionalities implemented by - InitializeCpuExceptionHandlers(), plus extra initialization works, if an= y. - This could be done by calling InitializeCpuExceptionHandlers() directly - in this method besides the extra works. + InitData is optional and processor arch dependent. =20 - InitData is optional and its use and content are processor arch dependen= t. - The typical usage of it is to convey resources which have to be reserved - elsewhere and are necessary for the extra initializations of exception. + @param[in] InitData Pointer to data optional for information about= how + to assign stacks for certain exception handler= s. =20 - @param[in] VectorInfo Pointer to reserved vector list. - @param[in] InitData Pointer to data optional for extra initializat= ions - of exception. - - @retval EFI_SUCCESS The exceptions have been successfully - initialized. - @retval EFI_INVALID_PARAMETER VectorInfo or InitData contains invalid - content. + @retval EFI_SUCCESS The stacks are assigned successfully. @retval EFI_UNSUPPORTED This function is not supported. =20 **/ EFI_STATUS EFIAPI -InitializeCpuExceptionHandlersEx ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, +InitializeSeparateExceptionStacks ( IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL ) { - return InitializeCpuExceptionHandlers (VectorInfo); + return EFI_UNSUPPORTED; } diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c index 1f218367b3..e385f585c7 100644 --- a/UefiCpuPkg/CpuDxe/CpuMp.c +++ b/UefiCpuPkg/CpuDxe/CpuMp.c @@ -1,7 +1,7 @@ /** @file CPU DXE Module to produce CPU MP Protocol. =20 - Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2008 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -617,7 +617,7 @@ GetGdtr ( /** Initializes CPU exceptions handlers for the sake of stack switch require= ment. =20 - This function is a wrapper of InitializeCpuExceptionHandlersEx. It's mai= nly + This function is a wrapper of InitializeSeparateExceptionStacks. It's ma= inly for the sake of AP's init because of EFI_AP_PROCEDURE API requirement. =20 @param[in,out] Buffer The pointer to private data buffer. @@ -641,7 +641,7 @@ InitializeExceptionStackSwitchHandlers ( AsmReadIdtr (&Idtr); EssData->Ia32.IdtTable =3D (VOID *)Idtr.Base; EssData->Ia32.IdtTableSize =3D Idtr.Limit + 1; - Status =3D InitializeCpuExceptionHandlersEx (NULL, E= ssData); + Status =3D InitializeSeparateExceptionStacks (EssDat= a); ASSERT_EFI_ERROR (Status); } =20 diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.c b/UefiCpuPkg/CpuMpPei/CpuMpPei.c index 1e68c91d95..d4786979fa 100644 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.c +++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.c @@ -432,7 +432,7 @@ GetGdtr ( /** Initializes CPU exceptions handlers for the sake of stack switch require= ment. =20 - This function is a wrapper of InitializeCpuExceptionHandlersEx. It's mai= nly + This function is a wrapper of InitializeSeparateExceptionStacks. It's ma= inly for the sake of AP's init because of EFI_AP_PROCEDURE API requirement. =20 @param[in,out] Buffer The pointer to private data buffer. @@ -456,7 +456,7 @@ InitializeExceptionStackSwitchHandlers ( AsmReadIdtr (&Idtr); EssData->Ia32.IdtTable =3D (VOID *)Idtr.Base; EssData->Ia32.IdtTableSize =3D Idtr.Limit + 1; - Status =3D InitializeCpuExceptionHandlersEx (NULL, E= ssData); + Status =3D InitializeSeparateExceptionStacks (EssDat= a); ASSERT_EFI_ERROR (Status); } =20 diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/Uef= iCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c index c7c1fe31d2..e62bb5e6c0 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c @@ -103,82 +103,49 @@ RegisterCpuInterruptHandler ( } =20 /** - Initializes CPU exceptions entries and setup stack switch for given exce= ptions. + Setup separate stacks for certain exception handlers. =20 - This method will call InitializeCpuExceptionHandlers() to setup default - exception handlers unless indicated not to do it explicitly. + InitData is optional and processor arch dependent. =20 - If InitData is passed with NULL, this method will use the resource reser= ved - by global variables to initialize it; Otherwise it will use data in Init= Data - to setup stack switch. This is for the different use cases in DxeCore and - Cpu MP exception initialization. + @param[in] InitData Pointer to data optional for information about= how + to assign stacks for certain exception handler= s. =20 - @param[in] VectorInfo Pointer to reserved vector list. - @param[in] InitData Pointer to data required to setup stack switch= for - given exceptions. - - @retval EFI_SUCCESS The exceptions have been successfully - initialized. - @retval EFI_INVALID_PARAMETER VectorInfo or InitData contains invalid - content. + @retval EFI_SUCCESS The stacks are assigned successfully. + @retval EFI_UNSUPPORTED This function is not supported. =20 **/ EFI_STATUS EFIAPI -InitializeCpuExceptionHandlersEx ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, +InitializeSeparateExceptionStacks ( IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL ) { - EFI_STATUS Status; CPU_EXCEPTION_INIT_DATA EssData; IA32_DESCRIPTOR Idtr; IA32_DESCRIPTOR Gdtr; =20 - // - // To avoid repeat initialization of default handlers, the caller should= pass - // an extended init data with InitDefaultHandlers set to FALSE. There's = no - // need to call this method to just initialize default handlers. Call no= n-ex - // version instead; or this method must be implemented as a simple wrapp= er of - // non-ex version of it, if this version has to be called. - // - if ((InitData =3D=3D NULL) || InitData->X64.InitDefaultHandlers) { - Status =3D InitializeCpuExceptionHandlers (VectorInfo); - } else { - Status =3D EFI_SUCCESS; - } - - if (!EFI_ERROR (Status)) { - // - // Initializing stack switch is only necessary for Stack Guard functio= nality. - // - if (PcdGetBool (PcdCpuStackGuard)) { - if (InitData =3D=3D NULL) { - SetMem (mNewGdt, sizeof (mNewGdt), 0); - - AsmReadIdtr (&Idtr); - AsmReadGdtr (&Gdtr); - - EssData.X64.Revision =3D CPU_EXCEPTION_INIT_DATA= _REV; - EssData.X64.KnownGoodStackTop =3D (UINTN)mNewStack + size= of (mNewStack); - EssData.X64.KnownGoodStackSize =3D CPU_KNOWN_GOOD_STACK_SI= ZE; - EssData.X64.StackSwitchExceptions =3D CPU_STACK_SWITCH_EXCEPT= ION_LIST; - EssData.X64.StackSwitchExceptionNumber =3D CPU_STACK_SWITCH_EXCEPT= ION_NUMBER; - EssData.X64.IdtTable =3D (VOID *)Idtr.Base; - EssData.X64.IdtTableSize =3D Idtr.Limit + 1; - EssData.X64.GdtTable =3D mNewGdt; - EssData.X64.GdtTableSize =3D sizeof (mNewGdt); - EssData.X64.ExceptionTssDesc =3D mNewGdt + Gdtr.Limit + = 1; - EssData.X64.ExceptionTssDescSize =3D CPU_TSS_DESC_SIZE; - EssData.X64.ExceptionTss =3D mNewGdt + Gdtr.Limit + = 1 + CPU_TSS_DESC_SIZE; - EssData.X64.ExceptionTssSize =3D CPU_TSS_SIZE; - - InitData =3D &EssData; - } - - Status =3D ArchSetupExceptionStack (InitData); - } + if (InitData =3D=3D NULL) { + SetMem (mNewGdt, sizeof (mNewGdt), 0); + + AsmReadIdtr (&Idtr); + AsmReadGdtr (&Gdtr); + + EssData.X64.Revision =3D CPU_EXCEPTION_INIT_DATA_REV; + EssData.X64.KnownGoodStackTop =3D (UINTN)mNewStack + sizeof (= mNewStack); + EssData.X64.KnownGoodStackSize =3D CPU_KNOWN_GOOD_STACK_SIZE; + EssData.X64.StackSwitchExceptions =3D CPU_STACK_SWITCH_EXCEPTION_= LIST; + EssData.X64.StackSwitchExceptionNumber =3D CPU_STACK_SWITCH_EXCEPTION_= NUMBER; + EssData.X64.IdtTable =3D (VOID *)Idtr.Base; + EssData.X64.IdtTableSize =3D Idtr.Limit + 1; + EssData.X64.GdtTable =3D mNewGdt; + EssData.X64.GdtTableSize =3D sizeof (mNewGdt); + EssData.X64.ExceptionTssDesc =3D mNewGdt + Gdtr.Limit + 1; + EssData.X64.ExceptionTssDescSize =3D CPU_TSS_DESC_SIZE; + EssData.X64.ExceptionTss =3D mNewGdt + Gdtr.Limit + 1 + = CPU_TSS_DESC_SIZE; + EssData.X64.ExceptionTssSize =3D CPU_TSS_SIZE; + + InitData =3D &EssData; } =20 - return Status; + return ArchSetupExceptionStack (InitData); } diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c b/= UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c index 1ae611c75e..494c2ab433 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c @@ -150,57 +150,26 @@ InitializeCpuExceptionHandlers ( } =20 /** - Initializes all CPU exceptions entries with optional extra initializatio= ns. + Setup separate stacks for certain exception handlers. =20 - By default, this method should include all functionalities implemented by - InitializeCpuExceptionHandlers(), plus extra initialization works, if an= y. - This could be done by calling InitializeCpuExceptionHandlers() directly - in this method besides the extra works. + InitData is optional and processor arch dependent. =20 - InitData is optional and its use and content are processor arch dependen= t. - The typical usage of it is to convey resources which have to be reserved - elsewhere and are necessary for the extra initializations of exception. + @param[in] InitData Pointer to data optional for information about= how + to assign stacks for certain exception handler= s. =20 - @param[in] VectorInfo Pointer to reserved vector list. - @param[in] InitData Pointer to data optional for extra initializat= ions - of exception. - - @retval EFI_SUCCESS The exceptions have been successfully - initialized. - @retval EFI_INVALID_PARAMETER VectorInfo or InitData contains invalid - content. + @retval EFI_SUCCESS The stacks are assigned successfully. + @retval EFI_UNSUPPORTED This function is not supported. =20 **/ EFI_STATUS EFIAPI -InitializeCpuExceptionHandlersEx ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, +InitializeSeparateExceptionStacks ( IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL ) { - EFI_STATUS Status; - - // - // To avoid repeat initialization of default handlers, the caller should= pass - // an extended init data with InitDefaultHandlers set to FALSE. There's = no - // need to call this method to just initialize default handlers. Call no= n-ex - // version instead; or this method must be implemented as a simple wrapp= er of - // non-ex version of it, if this version has to be called. - // - if ((InitData =3D=3D NULL) || InitData->Ia32.InitDefaultHandlers) { - Status =3D InitializeCpuExceptionHandlers (VectorInfo); - } else { - Status =3D EFI_SUCCESS; - } - - if (!EFI_ERROR (Status)) { - // - // Initializing stack switch is only necessary for Stack Guard functio= nality. - // - if (PcdGetBool (PcdCpuStackGuard) && (InitData !=3D NULL)) { - Status =3D ArchSetupExceptionStack (InitData); - } + if (InitData =3D=3D NULL) { + return EFI_UNSUPPORTED; } =20 - return Status; + return ArchSetupExceptionStack (InitData); } diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c= b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c index e894ead612..4313cc5582 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c @@ -200,33 +200,22 @@ RegisterCpuInterruptHandler ( } =20 /** - Initializes all CPU exceptions entries with optional extra initializatio= ns. + Setup separate stacks for certain exception handlers. =20 - By default, this method should include all functionalities implemented by - InitializeCpuExceptionHandlers(), plus extra initialization works, if an= y. - This could be done by calling InitializeCpuExceptionHandlers() directly - in this method besides the extra works. + InitData is optional and processor arch dependent. =20 - InitData is optional and its use and content are processor arch dependen= t. - The typical usage of it is to convey resources which have to be reserved - elsewhere and are necessary for the extra initializations of exception. + @param[in] InitData Pointer to data optional for information about= how + to assign stacks for certain exception handler= s. =20 - @param[in] VectorInfo Pointer to reserved vector list. - @param[in] InitData Pointer to data optional for extra initializat= ions - of exception. - - @retval EFI_SUCCESS The exceptions have been successfully - initialized. - @retval EFI_INVALID_PARAMETER VectorInfo or InitData contains invalid - content. + @retval EFI_SUCCESS The stacks are assigned successfully. + @retval EFI_UNSUPPORTED This function is not supported. =20 **/ EFI_STATUS EFIAPI -InitializeCpuExceptionHandlersEx ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, +InitializeSeparateExceptionStacks ( IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL ) { - return InitializeCpuExceptionHandlers (VectorInfo); + return EFI_UNSUPPORTED; } diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c b/Uef= iCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c index ec643556c7..1c97dab926 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c @@ -96,33 +96,22 @@ RegisterCpuInterruptHandler ( } =20 /** - Initializes all CPU exceptions entries with optional extra initializatio= ns. + Setup separate stacks for certain exception handlers. =20 - By default, this method should include all functionalities implemented by - InitializeCpuExceptionHandlers(), plus extra initialization works, if an= y. - This could be done by calling InitializeCpuExceptionHandlers() directly - in this method besides the extra works. + InitData is optional and processor arch dependent. =20 - InitData is optional and its use and content are processor arch dependen= t. - The typical usage of it is to convey resources which have to be reserved - elsewhere and are necessary for the extra initializations of exception. + @param[in] InitData Pointer to data optional for information about= how + to assign stacks for certain exception handler= s. =20 - @param[in] VectorInfo Pointer to reserved vector list. - @param[in] InitData Pointer to data optional for extra initializat= ions - of exception. - - @retval EFI_SUCCESS The exceptions have been successfully - initialized. - @retval EFI_INVALID_PARAMETER VectorInfo or InitData contains invalid - content. + @retval EFI_SUCCESS The stacks are assigned successfully. + @retval EFI_UNSUPPORTED This function is not supported. =20 **/ EFI_STATUS EFIAPI -InitializeCpuExceptionHandlersEx ( - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, +InitializeSeparateExceptionStacks ( IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL ) { - return InitializeCpuExceptionHandlers (VectorInfo); + return EFI_UNSUPPORTED; } --=20 2.35.1.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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