From nobody Wed May 15 09:28:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+88903+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+88903+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1649916229; cv=none; d=zohomail.com; s=zohoarc; b=mrLRsDd8iP+10OT4J9IZRNZb4R4cd2WQXAtRvE6ie0JboZ6SBOnl5HujU1zz5EtEnl5+uIZCsbzyQGTzL1x821YTULgVAy1aPs6m0k8SBFfKZd5fXF4/51at9QyC3S9OvpfT5SJJVLPh5chNxhqbGQDIsNn43RZhD8mm7CVFRVY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1649916229; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=MiGHjSqHxafJIUcSJjqi3WEIIpzBzQZ+XLDF9MlVLow=; b=CFdffrre6lLImQRwofBQBn0JS4l1Mk2plG68wVl5on77oU9CHsy01ShqKQj6lWOpxd8cSCxjsYBXvP5fqhPrp+BkhxoobhSIj2Z1Tr/zoD+0eYiSB7Bui54SIXo2h71ORF+A3hAfVWnU3AeKMcmOEdH40ifTlVu2ECjk9V/cb5E= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+88903+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1649916229571657.6604015492061; Wed, 13 Apr 2022 23:03:49 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id MXTOYY1788612x9CxgzLJDw4; Wed, 13 Apr 2022 23:03:48 -0700 X-Received: from zg8tmtyylji0my4xnjeumjiw.icoremail.net (zg8tmtyylji0my4xnjeumjiw.icoremail.net [162.243.161.220]) by mx.groups.io with SMTP id smtpd.web10.8527.1649916223664783783 for ; Wed, 13 Apr 2022 23:03:45 -0700 X-Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-2 (Coremail) with SMTP id AQAAfwBnx85cuVdizbCVAA--.3808S2; Thu, 14 Apr 2022 14:04:12 +0800 (CST) X-Received: from localhost.localdomain (unknown [2409:8950:e30:b22b:2796:3ef3:5bba:2229]) by mail (Coremail) with SMTP id AQAAfwD3qpswuVdisSEAAA--.705S3; Thu, 14 Apr 2022 14:03:38 +0800 (CST) From: "Ling Jia" To: devel@edk2.groups.io Cc: Leif Lindholm , Ling Jia Subject: [edk2-devel] [PATCH v7 1/4] Platform/Phytium: Solved problems during boot. Date: Thu, 14 Apr 2022 14:03:06 +0800 Message-Id: <20220414060309.30298-2-jialing@phytium.com.cn> In-Reply-To: <20220414060309.30298-1-jialing@phytium.com.cn> References: <20220414060309.30298-1-jialing@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAfwD3qpswuVdisSEAAA--.705S3 X-CM-SenderInfo: xmldzxdqj61x51wl3zoofrzhdfq/ X-Coremail-Antispam: 1Uk129KBjvdXoW7XFW7CF1UWrW7XFWkWF4fAFb_yoWkCFX_Ar nxGw1YvrykurnxKw45tw4rCrnYq392qrs8AFn2yFyfJa45Zw1aqrn7XrW0qan8Gr1UGF4S yr1vyFWSq3sayjkaLaAFLSUrUUUUUb8apTn2vfkv8UJUUUU8wcxFpf9Il3svdxBIdaVrnU Uv73VFW2AGmfu7jjvjm3AaLaJ3UjIYCTnIWjDUYxBIdaVFxhVjvjDU0xZFpf9x0zRUUUUU UUUU= Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jialing@phytium.com.cn X-Gm-Message-State: 1nAw8ngfOJS64iZ5bKx67bHRx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1649916228; bh=0vbNlGC0mT4sp5FNddxQbN1NZ3nXWF+3fUOD+F/FhvM=; h=Cc:Date:From:Reply-To:Subject:To; b=LsI5x2wTF6QzlYrqDxImV9noZyfLeOvuaK14kN7iO4wVya9uxEMRBKR7eBXuzpqLf56 6zPae2R1i0hqoprP3GfI5joESaI8/TsbZP9UX8HQekD6J8xukl7x1fnT3UgZhTGJqj9ZC ldAZBGT4sCHCsnToynJ0t1eW2VTZ8MwvT8U= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1649916231620100007 Content-Type: text/plain; charset="utf-8" Solved the problem of lack of dependent Library in PciHostBridgeDxe. Solved the problem of missing boot magager menu. Signed-off-by: Ling Jia Reviewed-by: leif Lindholm --- Platform/Phytium/DurianPkg/DurianPkg.fdf | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Platform/Phytium/DurianPkg/DurianPkg.fdf b/Platform/Phytium/Du= rianPkg/DurianPkg.fdf index 2d4427e5ea..efb855c5da 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.fdf +++ b/Platform/Phytium/DurianPkg/DurianPkg.fdf @@ -142,6 +142,7 @@ READ_LOCK_STATUS =3D TRUE # # PCI Support # + INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf =20 @@ -204,6 +205,11 @@ READ_LOCK_STATUS =3D TRUE INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf INF MdeModulePkg/Application/UiApp/UiApp.inf =20 + # + #Setup + # + INF MdeModulePkg/Application/BootManagerMenuApp/BootManagerMenuApp.inf + [FV.FVMAIN_COMPACT] FvAlignment =3D 16 ERASE_POLARITY =3D 1 --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88903): https://edk2.groups.io/g/devel/message/88903 Mute This Topic: https://groups.io/mt/90458875/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 15 09:28:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+88905+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+88905+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1649916229; cv=none; d=zohomail.com; s=zohoarc; b=OQPSrXr5J+LqxiZ4LYJai9XQHUQFDLGCn9gwfXGT94vSxskpP//XvuwUq1kHPHiY6/UZqglQ+CD4yg6TvUPL9CfrIDnYPLM3X+vypRG5wtob663d/1j3V4Z8MXSAo+i2/T0FmO2veeILc0bW2tSeyjW6Y5ZLlLNOtXEPjgoCqEw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1649916229; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=uq8LB2dNAGSvI1NtdC+DBGwommw8B0VKmXH263Ip4Lw=; b=Sus9vt/oHJztnBOrY5ou56YqEFNFV3hRkhSX/sjEw6Jxir8IJTvphBdjKyI9XozPPX2HKF795lVBVBz0YMSI4TDisedJm3fvHIvZzP+9j1KVJ2S+cAN4Yz7EjOpoF5hx5mQqiRMdUeqMxRs0YotXE+njqTtC2Lv+OmggyPHCbdg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+88905+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 164991622922343.95760175085286; Wed, 13 Apr 2022 23:03:49 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id MgIEYY1788612x2rWnr2Vk7i; Wed, 13 Apr 2022 23:03:48 -0700 X-Received: from azure-sdnproxy-3.icoremail.net (azure-sdnproxy-3.icoremail.net [20.228.234.168]) by mx.groups.io with SMTP id smtpd.web08.8593.1649916223664874255 for ; Wed, 13 Apr 2022 23:03:46 -0700 X-Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-2 (Coremail) with SMTP id AQAAfwB3aNBduVdi7rCVAA--.4118S2; Thu, 14 Apr 2022 14:04:13 +0800 (CST) X-Received: from localhost.localdomain (unknown [2409:8950:e30:b22b:2796:3ef3:5bba:2229]) by mail (Coremail) with SMTP id AQAAfwD3qpswuVdisSEAAA--.705S4; Thu, 14 Apr 2022 14:03:38 +0800 (CST) From: "Ling Jia" To: devel@edk2.groups.io Cc: Leif Lindholm , Ling Jia Subject: [edk2-devel] [PATCH v7 2/4] Silicon/Phytium: Added flash driver support to Phytium Silicon. Date: Thu, 14 Apr 2022 14:03:07 +0800 Message-Id: <20220414060309.30298-3-jialing@phytium.com.cn> In-Reply-To: <20220414060309.30298-1-jialing@phytium.com.cn> References: <20220414060309.30298-1-jialing@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAfwD3qpswuVdisSEAAA--.705S4 X-CM-SenderInfo: xmldzxdqj61x51wl3zoofrzhdfq/ X-Coremail-Antispam: 1Uk129KBjvAXoWfCFWDCw13tr1DXrWkJrW5Wrg_yoW8uF47Jo Wxuw4SkrZ7KrWIvayjgr97Kw4xXFnavan8tr40yrZxXan7Xw43WFZrt3WUWrsxt348K3Zx K3yxXas8JFW3J3ykn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXasCq-sGcSsGvf J3UbIjqfuFe4nvWSU8nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UU UUUUUUU== Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jialing@phytium.com.cn X-Gm-Message-State: AuwFXwckk0rMGsprKhSruOnux1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1649916228; bh=GRyJkduf3x11ddLN5mpcG2yiB0KtfCGg37VpVL2oVzQ=; h=Cc:Date:From:Reply-To:Subject:To; b=L2XqgIYeisvANv+5yZ+wg4VYkyhdJmOAsldFr074212/zT8rwYCSkuLNvUhrdliYze1 czkO2VabTKOE4bt5zYuyPpSPxFULI1G5DtsDhe7EXPPVKXf1K8pSdMZ1LFRuIekJBdS4h UEWfM/ssRKlT2aLXs11/5/zfYtsMeobCkMY= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1649916231674100011 Content-Type: text/plain; charset="utf-8" The SpiNorFlashDxe provided norflash initialization, read-write, erase and other interfaces. This is a set of special communication protocol for ft2004/4 chip QSPI controller. Signed-off-by: Ling Jia Reviewed-by: leif Lindholm --- Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec | = 1 + Platform/Phytium/DurianPkg/DurianPkg.dsc | = 13 + Platform/Phytium/DurianPkg/DurianPkg.fdf | = 24 +- Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf | = 49 +++ Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.h | = 95 +++++ Silicon/Phytium/PhytiumCommonPkg/Include/Protocol/SpiNorFlashProtocol.h | = 74 ++++ Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.c | = 412 ++++++++++++++++++++ 7 files changed, 658 insertions(+), 10 deletions(-) diff --git a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec b/Silico= n/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec index 8427f32211..4c6c5c5f11 100644 --- a/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec +++ b/Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec @@ -49,3 +49,4 @@ =20 [Protocols] gSpiMasterProtocolGuid =3D { 0xdf093560, 0xf955, 0x11ea, { 0x96, 0x42, 0= x43, 0x9d, 0x80, 0xdd, 0x0b, 0x7c}} + gSpiNorFlashProtocolGuid =3D { 0x00b4af42, 0xfbd0, 0x11ea, { 0x80, 0x3a,= 0x27, 0xea, 0x5e, 0x65, 0xe3, 0xf6}} diff --git a/Platform/Phytium/DurianPkg/DurianPkg.dsc b/Platform/Phytium/Du= rianPkg/DurianPkg.dsc index c1519070d6..cc0d418555 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.dsc +++ b/Platform/Phytium/DurianPkg/DurianPkg.dsc @@ -100,6 +100,14 @@ # Stack Size gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 =20 + # + # SPI Flash Control Register Base Address and Size + # + gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashBase|0x0 + gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashSize|0x1000000 + gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerBase|0x28014000 + gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerSize|0x1000 + gPhytiumPlatformTokenSpaceGuid.PcdRtcBaseAddress|0x2800D000 # # Designware PCI Root Complex # @@ -255,6 +263,11 @@ # Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf =20 + # + # NOR Flash driver + # + Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf + # # Usb Support # diff --git a/Platform/Phytium/DurianPkg/DurianPkg.fdf b/Platform/Phytium/Du= rianPkg/DurianPkg.fdf index efb855c5da..5c1471d8ed 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.fdf +++ b/Platform/Phytium/DurianPkg/DurianPkg.fdf @@ -83,6 +83,11 @@ READ_LOCK_STATUS =3D TRUE =20 APRIORI DXE { INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf + INF Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.= inf } =20 INF MdeModulePkg/Core/Dxe/DxeMain.inf @@ -91,29 +96,28 @@ READ_LOCK_STATUS =3D TRUE # # PI DXE Drivers producing Architectural Protocols (EFI Services) # + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf - INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf - INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf =20 INF Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf - - INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRu= ntimeDxe.inf - - INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf - INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf - INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf - INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf + INF Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf =20 # # Variable services # INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.i= nf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf =20 + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRu= ntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf =20 # # ACPI Support diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlash= Dxe.inf b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe= .inf new file mode 100755 index 0000000000..2173405809 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf @@ -0,0 +1,49 @@ +#/** @file +# Phytium NorFlash Drivers. +# +# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION =3D 0x0001001b + BASE_NAME =3D SpiNorFlashDxe + FILE_GUID =3D f37ef706-187c-48fd-9102-ddbf86f551be + MODULE_TYPE =3D DXE_RUNTIME_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D NorFlashPlatformEntryPoint + +[Sources.common] + SpiNorFlashDxe.c + SpiNorFlashDxe.h + +[Packages] + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec + +[LibraryClasses] + BaseLib + DebugLib + IoLib + UefiLib + UefiBootServicesTableLib + UefiRuntimeLib + UefiDriverEntryPoint + UefiRuntimeServicesTableLib + +[FixedPcd] + gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashBase + gPhytiumPlatformTokenSpaceGuid.PcdSpiFlashSize + gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerBase +[Guids] + gEfiEventVirtualAddressChangeGuid + +[Protocols] + gSpiMasterProtocolGuid + gSpiNorFlashProtocolGuid + + [Depex] + TRUE diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlash= Dxe.h b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.h new file mode 100755 index 0000000000..16981504ab --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.h @@ -0,0 +1,95 @@ +/** @file + Phytium NorFlash Drivers Header. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef SPI_NORFLASH_DXE_H_ +#define SPI_NORFLASH_DXE_H_ + +#include +#include + +// +// Norflash registers +// +#define REG_FLASH_CAP 0x000 +#define REG_RD_CFG 0x004 +#define REG_WR_CFG 0x008 +#define REG_FLUSH_REG 0x00C +#define REG_CMD_PORT 0x010 +#define REG_ADDR_PORT 0x014 +#define REG_HD_PORT 0x018 +#define REG_LD_PORT 0x01C +#define REG_CS_CFG 0x020 +#define REG_WIP_CFG 0x024 +#define REG_WP_REG 0x028 + +#define NORFLASH_SIGNATURE SIGNATURE_32 ('F', 'T', 'S', 'F') +#define SPI_FLASH_BASE FixedPcdGet64 (PcdSpiFlashBase) +#define SPI_FLASH_SIZE FixedPcdGet64 (PcdSpiFlashSize) + +extern EFI_GUID gSpiMasterProtocolGuid; +extern EFI_GUID gSpiNorFlashProtocolGuid; + +// +// Platform Nor Flash Functions +// +EFI_STATUS +EFIAPI +NorFlashPlatformEraseSingleBlock ( + IN UINTN BlockAddress + ); + +EFI_STATUS +EFIAPI +NorFlashPlatformErase ( + IN UINT64 Offset, + IN UINT64 Length + ); + +EFI_STATUS +EFIAPI +NorFlashPlatformRead ( + IN UINTN Address, + IN VOID *Buffer, + OUT UINT32 Length + ); + +EFI_STATUS +EFIAPI +NorFlashPlatformWrite ( + IN UINTN Address, + IN VOID *Buffer, + IN UINT32 Length + ); + +EFI_STATUS +EFIAPI +NorFlashPlatformGetDevices ( + OUT NOR_FLASH_DEVICE_DESCRIPTION *NorFlashDevices + ); + +EFI_STATUS +EFIAPI +NorFlashPlatformInitialization ( + VOID + ); + +EFI_STATUS +EFIAPI +NorFlashPlatformEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ); + +typedef struct { + EFI_NORFLASH_DRV_PROTOCOL FlashProtocol; + UINTN Signature; + EFI_HANDLE Handle; +} NorFlash_Device; + +#endif // SPI_NORFLASH_DXE_H_ diff --git a/Silicon/Phytium/PhytiumCommonPkg/Include/Protocol/SpiNorFlashP= rotocol.h b/Silicon/Phytium/PhytiumCommonPkg/Include/Protocol/SpiNorFlashPr= otocol.h new file mode 100755 index 0000000000..ce1877f13a --- /dev/null +++ b/Silicon/Phytium/PhytiumCommonPkg/Include/Protocol/SpiNorFlashProtocol= .h @@ -0,0 +1,74 @@ +/** @file + The Header of Protocol For NorFlash. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef SPI_NORFLASH_H_ +#define SPI_NORFLASH_H_ + +typedef struct _EFI_NORFLASH_DRV_PROTOCOL EFI_NORFLASH_DRV_PROTOCOL; +extern EFI_GUID gSpiNorFlashProtocolGuid; + +typedef struct { + UINTN DeviceBaseAddress; // Start address of the Device Base Ad= dress (DBA) + UINTN RegionBaseAddress; // Start address of one single region + UINTN Size; + UINTN BlockSize; + EFI_GUID Guid; +} NOR_FLASH_DEVICE_DESCRIPTION; + +typedef +EFI_STATUS +(EFIAPI *NORFLASH_PLATFORM_ERASE_INTERFACE) ( + IN UINT64 Offset, + IN UINT64 Length + ); + +typedef +EFI_STATUS +(EFIAPI *NORFLASH_PLATFORM_ERASESIGLEBLOCK_INTERFACE) ( + IN UINTN BlockAddress + ); + +typedef +EFI_STATUS +(EFIAPI *NORFLASH_PLATFORM_READ_INTERFACE) ( + IN UINTN Address, + IN VOID *Buffer, + OUT UINT32 Length + ); + +typedef +EFI_STATUS +(EFIAPI *NORFLASH_PLATFORM_WRITE_INTERFACE) ( + IN UINTN Address, + IN VOID *Buffer, + IN UINT32 Length + ); + +typedef +EFI_STATUS +(EFIAPI *NORFLASH_PLATFORM_GETDEVICE_INTERFACE) ( + OUT NOR_FLASH_DEVICE_DESCRIPTION *NorFlashDevices + ); + +typedef +EFI_STATUS +(EFIAPI *NORFLASH_PLATFORM_INIT_INTERFACE) ( + VOID + ); + +struct _EFI_NORFLASH_DRV_PROTOCOL{ + NORFLASH_PLATFORM_INIT_INTERFACE Initialization; + NORFLASH_PLATFORM_GETDEVICE_INTERFACE GetDevices; + NORFLASH_PLATFORM_ERASE_INTERFACE Erase; + NORFLASH_PLATFORM_ERASESIGLEBLOCK_INTERFACE EraseSingleBlock; + NORFLASH_PLATFORM_READ_INTERFACE Read; + NORFLASH_PLATFORM_WRITE_INTERFACE Write; +}; + +#endif // SPI_NORFLASH_H_ diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlash= Dxe.c b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.c new file mode 100755 index 0000000000..fbeb3d1a71 --- /dev/null +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.c @@ -0,0 +1,412 @@ +/** @file + Phytium NorFlash Drivers. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#include +#include +#include +#include +#include +#include +#include "SpiNorFlashDxe.h" + +STATIC EFI_EVENT mSpiNorFlashVirtualAddrChangeEvent; +STATIC UINT8 mCmdWrite; +STATIC UINT8 mCmdErase; +STATIC UINT8 mCmdPp; + +EFI_SPI_DRV_PROTOCOL *mSpiMasterProtocol; +NorFlash_Device *mFlashInstance; + +NOR_FLASH_DEVICE_DESCRIPTION mNorFlashDevices =3D { + SPI_FLASH_BASE, /* Device Base Address */ + SPI_FLASH_BASE, /* Region Base Address */ + SPI_FLASH_SIZE, /* Size */ + SIZE_64KB, /* Block Size */ + {0xE7223039, 0x5836, 0x41E1, { 0xB5, 0x42, 0xD7, 0xEC, 0x73, 0x6C, 0x5= E, 0x59 } } +}; + + +/** + This function writed up to 256 bytes to flash through spi driver. + + @param[in] Address The address of the flash. + @param[in] Buffer The pointer of buffer to be writed. + @param[in] BufferSizeInBytes The bytes to be writed. + + @retval EFI_SUCCESS NorFlashWrite256() is executed successfull= y. + +**/ +STATIC +EFI_STATUS +NorFlashWrite256 ( + IN UINTN Address, + IN VOID *Buffer, + IN UINT32 BufferSizeInBytes + ) +{ + UINT32 Index; + UINT32 *TempBuffer; + UINT8 WriteSize; + + TempBuffer =3D Buffer; + WriteSize =3D sizeof (UINT32); + + if (BufferSizeInBytes > 256) { + DEBUG ((DEBUG_ERROR, "The max length is 256 bytes.\n")); + return EFI_INVALID_PARAMETER; + } + + if ((BufferSizeInBytes % WriteSize) !=3D 0) { + DEBUG ((DEBUG_ERROR, "The length must four bytes aligned.\n")); + return EFI_INVALID_PARAMETER; + } + + if ((Address % WriteSize) !=3D 0) { + DEBUG ((DEBUG_ERROR, "The address must four bytes aligned.\n")); + return EFI_INVALID_PARAMETER; + } + + mSpiMasterProtocol->SpiSetConfig (mCmdPp, 0x400000, REG_CMD_PORT); + mSpiMasterProtocol->SpiSetConfig (0, 0x1, REG_LD_PORT); + + mSpiMasterProtocol->SpiSetConfig (mCmdWrite, 0x000208, REG_WR_CFG); + + for (Index =3D 0; Index < (BufferSizeInBytes / WriteSize); Index++) { + MmioWrite32 ((Address + (Index * WriteSize)), TempBuffer[Index]); + } + + mSpiMasterProtocol->SpiSetConfig (0, 0x1, REG_FLUSH_REG); + + mSpiMasterProtocol->SpiSetConfig (0, 0x0, REG_WR_CFG); + + return EFI_SUCCESS; +} + +/** + This function erased a sector of flash through spi driver. + + @param[in] BlockAddress The sector address to be erased. + + @retval None. + +**/ +STATIC +VOID +NorFlashPlatformEraseSector ( + IN UINTN BlockAddress + ) +{ + mSpiMasterProtocol->SpiSetConfig (mCmdPp, 0x400000, REG_CMD_PORT); + mSpiMasterProtocol->SpiSetConfig (0, 0x1, REG_LD_PORT); + + mSpiMasterProtocol->SpiSetConfig (mCmdErase, 0x408000, REG_CMD_PORT); + mSpiMasterProtocol->SpiSetConfig (0, BlockAddress, REG_ADDR_PORT); + mSpiMasterProtocol->SpiSetConfig (0, 0x1, REG_LD_PORT); + +} + + +/** + Fixup internal data so that EFI can be call in virtual mode. + Call the passed in Child Notify event and convert any pointers in + lib to virtual mode. + + @param[in] Event The Event that is being processed. + + @param[in] Context Event Context. + + @retval None. + +**/ +VOID +EFIAPI +PlatformNorFlashVirtualNotifyEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EfiConvertPointer (0x0, (VOID **)&(mSpiMasterProtocol->SpiGetConfig)); + EfiConvertPointer (0x0, (VOID **)&(mSpiMasterProtocol->SpiSetConfig)); + EfiConvertPointer (0x0, (VOID **)&(mSpiMasterProtocol)); + EfiConvertPointer (0x0, (VOID **)&(mFlashInstance->FlashProtocol.Erase)); + EfiConvertPointer (0x0, (VOID **)&(mFlashInstance->FlashProtocol.Read)); + EfiConvertPointer (0x0, (VOID **)&(mFlashInstance->FlashProtocol.Write)); + EfiConvertPointer (0x0, (VOID **)&(mFlashInstance->FlashProtocol.EraseSi= ngleBlock)); + EfiConvertPointer (0x0, (VOID **)&(mFlashInstance->FlashProtocol)); + EfiConvertPointer (0x0, (VOID **)&(mFlashInstance)); + EfiConvertPointer (0x0, (VOID **)&(mNorFlashDevices)); + + return; +} + + +/** + This function inited the flash platform. + + @param None. + + @retval EFI_SUCCESS NorFlashPlatformInitialization() is execut= ed successfully. + +**/ +EFI_STATUS +EFIAPI +NorFlashPlatformInitialization ( + VOID + ) +{ + + mCmdWrite =3D 0x2; + mCmdErase =3D 0xD8; + mCmdPp =3D 0x6; + + mSpiMasterProtocol->SpiInit(); + + return EFI_SUCCESS; +} + + +/** + This function geted the flash device information. + + @param[out] NorFlashDevices the pointer to store flash device informa= tion. + @param[out] Count the number of the flash device. + + @retval EFI_SUCCESS NorFlashPlatformGetDevices() is executed s= uccessfully. + +**/ +EFI_STATUS +EFIAPI +NorFlashPlatformGetDevices ( + OUT NOR_FLASH_DEVICE_DESCRIPTION *NorFlashDevices + ) +{ + *NorFlashDevices =3D mNorFlashDevices; + + return EFI_SUCCESS; +} + + +/** + This function readed flash content form the specified area of flash. + + @param[in] Address The address of the flash. + @param[in] Buffer The pointer of the Buffer to be stored. + @param[out] Length The bytes readed form flash. + + @retval EFI_SUCCESS NorFlashPlatformRead() is executed succes= sfully. + +**/ +EFI_STATUS +EFIAPI +NorFlashPlatformRead ( + IN UINTN Address, + IN VOID *Buffer, + OUT UINT32 Length + ) +{ + + CopyMem ((VOID *)Buffer, (VOID *)Address, Length); + + return EFI_SUCCESS; +} + + +/** + This function erased one block flash content. + + @param[in] BlockAddress the BlockAddress to be erased. + + @retval EFI_SUCCESS NorFlashPlatformEraseSingleBlock() is exe= cuted successfully. + +**/ +EFI_STATUS +EFIAPI +NorFlashPlatformEraseSingleBlock ( + IN UINTN BlockAddress + ) +{ + + NorFlashPlatformEraseSector ( BlockAddress); + + return EFI_SUCCESS; +} + + +/** + This function erased the flash content of the specified area. + + @param[in] Offset the offset of the flash. + @param[in] Length length to be erased. + + @retval EFI_SUCCESS NorFlashPlatformErase() is executed succe= ssfully. + +**/ +EFI_STATUS +EFIAPI +NorFlashPlatformErase ( + IN UINT64 Offset, + IN UINT64 Length + ) +{ + EFI_STATUS Status; + UINT64 Index; + UINT64 Count; + + Status =3D EFI_SUCCESS; + if ((Length % SIZE_64KB) =3D=3D 0) { + Count =3D Length / SIZE_64KB; + for (Index =3D 0; Index < Count; Index++) { + NorFlashPlatformEraseSingleBlock (Offset); + Offset +=3D SIZE_64KB; + } + } else { + Status =3D EFI_INVALID_PARAMETER; + } + + return Status; +} + + +/** + This function writed data to flash. + + @param[in] Address the address of the flash. + + @param[in] Buffer the pointer of the Buffer to be writed. + + @param[in] BufferSizeInBytes the bytes of the Buffer. + + @retval EFI_SUCCESS NorFlashPlatformWrite() is executed succe= ssfully. + +**/ +EFI_STATUS +EFIAPI +NorFlashPlatformWrite ( + IN UINTN Address, + IN VOID *Buffer, + IN UINT32 BufferSizeInBytes + ) +{ + UINT32 Index; + UINT32 Remainder; + UINT32 Quotient; + EFI_STATUS Status; + UINTN TmpAddress; + + TmpAddress =3D Address; + Remainder =3D BufferSizeInBytes % 256; + Quotient =3D BufferSizeInBytes / 256; + + if (BufferSizeInBytes <=3D 256) { + Status =3D NorFlashWrite256 (TmpAddress, Buffer, BufferSizeInBytes); + } else { + for (Index =3D 0; Index < Quotient; Index++) { + Status =3D NorFlashWrite256 (TmpAddress, Buffer, 256); + TmpAddress +=3D 256; + Buffer +=3D 256; + } + + if (Remainder !=3D 0) { + Status =3D NorFlashWrite256 (TmpAddress, Buffer, Remainder); + } + } + + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + } + + return EFI_SUCCESS; + +} + + +/** + This function inited the flash driver protocol. + + @param[in] NorFlashProtocol A pointer to the norflash protocol struct. + + @retval EFI_SUCCESS NorFlashPlatformInitProtocol() is executed suc= cessfully. + +**/ +EFI_STATUS +EFIAPI +NorFlashPlatformInitProtocol ( + IN EFI_NORFLASH_DRV_PROTOCOL *NorFlashProtocol + ) +{ + NorFlashProtocol->Initialization =3D NorFlashPlatformInitialization; + NorFlashProtocol->GetDevices =3D NorFlashPlatformGetDevices; + NorFlashProtocol->Erase =3D NorFlashPlatformErase; + NorFlashProtocol->EraseSingleBlock =3D NorFlashPlatformEraseSingleBlock; + NorFlashProtocol->Read =3D NorFlashPlatformRead; + NorFlashProtocol->Write =3D NorFlashPlatformWrite; + + return EFI_SUCCESS; +} + + +/** + This function is the entrypoint of the norflash driver. + + @param[in] ImageHandle The firmware allocated handle for the EFI imag= e. + + @param[in] SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS The entry point is executed successfully. + + @retval other Some error occurs when executing this entry po= int. + +**/ +EFI_STATUS +EFIAPI +NorFlashPlatformEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status =3D gBS->LocateProtocol ( + &gSpiMasterProtocolGuid, + NULL, + (VOID **)&mSpiMasterProtocol + ); + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + mFlashInstance =3D AllocateRuntimeZeroPool (sizeof (NorFlash_Device)); + if (mFlashInstance =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + NorFlashPlatformInitProtocol (&mFlashInstance->FlashProtocol); + + mFlashInstance->Signature =3D NORFLASH_SIGNATURE; + + Status =3D gBS->InstallMultipleProtocolInterfaces ( + &(mFlashInstance->Handle), + &gSpiNorFlashProtocolGuid, + &(mFlashInstance->FlashProtocol), + NULL + ); + ASSERT_EFI_ERROR (Status); + + //Register for the virtual address change event + Status =3D gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, + TPL_NOTIFY, + PlatformNorFlashVirtualNotifyEvent, + NULL, + &gEfiEventVirtualAddressChangeGuid, + &mSpiNorFlashVirtualAddrChangeEvent + ); + ASSERT_EFI_ERROR (Status); + + return Status; +} --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88905): https://edk2.groups.io/g/devel/message/88905 Mute This Topic: https://groups.io/mt/90458877/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 15 09:28:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+88907+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+88907+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1649916232; cv=none; d=zohomail.com; s=zohoarc; b=Ns4R38UfFt2bRuC84sHGd5fw47UHrebQGtS7BS2bdduxjx+fpJsvQfml5UnYkHX6jv4s5UejwgWOSZDLaWUwdvGQ+77kZBwhsam1mBovYhTpQsflB+HB/WUmfLY7Kmf0hTUVIfEnFrrU6i4FZMXgjE91/ikyO7huh4m9aFJIfN4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1649916232; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=7eMtRh/YD/4UFXGyVTPie4P0bt5HUdGzG85j1ZfTdfQ=; b=I8SJvoTaU3zhamJFdzs8uiRfR/lGH20vsfio5AYdMFb7dp6GB5S0t8kHOzsyqzZkZbntYzgiWe6pBTfrVym6YsXdnYrzAvEUcGgFXbGDJUVv0kL/Dbd/6OeXPuH1Gsff+aqC/n7/5o7jA66E8HCwZqJ93Bph6U7LDfT1YSBd+YI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+88907+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1649916232926320.42828003185366; Wed, 13 Apr 2022 23:03:52 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id JIsuYY1788612xp2esZddlRb; Wed, 13 Apr 2022 23:03:52 -0700 X-Received: from zg8tmtm4lje5ny4xodqumjaa.icoremail.net (zg8tmtm4lje5ny4xodqumjaa.icoremail.net [138.197.184.20]) by mx.groups.io with SMTP id smtpd.web10.8528.1649916225760836420 for ; Wed, 13 Apr 2022 23:03:46 -0700 X-Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-1 (Coremail) with SMTP id AQAAfwD33RjvuFdiIjPyAA--.19950S2; Thu, 14 Apr 2022 14:02:23 +0800 (CST) X-Received: from localhost.localdomain (unknown [2409:8950:e30:b22b:2796:3ef3:5bba:2229]) by mail (Coremail) with SMTP id AQAAfwD3qpswuVdisSEAAA--.705S5; Thu, 14 Apr 2022 14:03:39 +0800 (CST) From: "Ling Jia" To: devel@edk2.groups.io Cc: Leif Lindholm , Ling Jia Subject: [edk2-devel] [PATCH v7 3/4] Silicon/Phytium: Added fvb driver for flash Date: Thu, 14 Apr 2022 14:03:08 +0800 Message-Id: <20220414060309.30298-4-jialing@phytium.com.cn> In-Reply-To: <20220414060309.30298-1-jialing@phytium.com.cn> References: <20220414060309.30298-1-jialing@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAfwD3qpswuVdisSEAAA--.705S5 X-CM-SenderInfo: xmldzxdqj61x51wl3zoofrzhdfq/ X-Coremail-Antispam: 1Uk129KBjvAXoWDAFW3CF1rCr17Xw1kZFW3trb_yoWrZFW7Go WxXrWfXw18trWSvrs8tryjk3yxJFn3Xanxtrs5Zry2qan5Jw1a9FWIy3WUXws3tw1jkrnx K34fX3s5tFW3trykn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXasCq-sGcSsGvf J3UbIjqfuFe4nvWSU8nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UU UUUUUUU== Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jialing@phytium.com.cn X-Gm-Message-State: JZ57BNMprQiLGGObvcqQJUn9x1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1649916232; bh=CM+e4zp1AFqFQUDlOvwrqgxEm0XsE6aPwu3TRNi2+g4=; h=Cc:Date:From:Reply-To:Subject:To; b=bqCBWqP0Qf8esYkREK0WT/FP8oggxcw4TlPm4GUAUQIjPG+nZaqa+FiIKk6BdDkWmW1 OJdfOOBlyZ185JOARqXOxbxcUPvzGP3Ged2bqbTcr0fxTPxN2kQlZA1Azlp4Mg66hzzxR zuQBu7Cj+ZZVHyL5zVYI/M4Wq8OYdCfGvRQ= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1649916234720100021 Content-Type: text/plain; charset="utf-8" The FlashFvbDxe provided the fvb protocol, which requested by the flash operators. Signed-off-by: Ling Jia Reviewed-by: leif Lindholm --- Platform/Phytium/DurianPkg/DurianPkg.dsc | = 1 + Platform/Phytium/DurianPkg/DurianPkg.fdf | = 2 + Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.inf | 6= 3 + Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.h | 10= 5 ++ Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.c | 132= 9 ++++++++++++++++++++ 5 files changed, 1500 insertions(+) diff --git a/Platform/Phytium/DurianPkg/DurianPkg.dsc b/Platform/Phytium/Du= rianPkg/DurianPkg.dsc index cc0d418555..cedf7480a5 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.dsc +++ b/Platform/Phytium/DurianPkg/DurianPkg.dsc @@ -267,6 +267,7 @@ # NOR Flash driver # Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf + Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.inf =20 # # Usb Support diff --git a/Platform/Phytium/DurianPkg/DurianPkg.fdf b/Platform/Phytium/Du= rianPkg/DurianPkg.fdf index 5c1471d8ed..1a52250db2 100644 --- a/Platform/Phytium/DurianPkg/DurianPkg.fdf +++ b/Platform/Phytium/DurianPkg/DurianPkg.fdf @@ -88,6 +88,7 @@ READ_LOCK_STATUS =3D TRUE INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf INF Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf INF Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.= inf + INF Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.i= nf } =20 INF MdeModulePkg/Core/Dxe/DxeMain.inf @@ -105,6 +106,7 @@ READ_LOCK_STATUS =3D TRUE =20 INF Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf INF Silicon/Phytium/FT2000-4Pkg/Drivers/SpiNorFlashDxe/SpiNorFlashDxe.inf + INF Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.inf =20 # # Variable services diff --git a/Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbD= xe.inf b/Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.i= nf new file mode 100755 index 0000000000..9121be921c --- /dev/null +++ b/Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.inf @@ -0,0 +1,63 @@ +#/** @file +# Phytium NorFlash Fvb Drivers. +# +# Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
+# Copyright (C) 2020, Phytium Technology Co, Ltd. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#**/ + +[Defines] + INF_VERSION =3D 0x0001001b + BASE_NAME =3D FlashFvbDxe + FILE_GUID =3D b8923820-3e7c-11eb-b12c-17525e90ecc8 + MODULE_TYPE =3D DXE_RUNTIME_DRIVER + VERSION_STRING =3D 0.1 + ENTRY_POINT =3D FvbEntryPoint + +[Sources] + FlashFvbDxe.c + FlashFvbDxe.h + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Phytium/PhytiumCommonPkg/PhytiumCommonPkg.dec + +[LibraryClasses] + BaseLib + DebugLib + DxeServicesTableLib + HobLib + MemoryAllocationLib + UefiBootServicesTableLib + UefiRuntimeLib + UefiDriverEntryPoint + UefiRuntimeServicesTableLib + +[Guids] + gEfiAuthenticatedVariableGuid + gEfiEventVirtualAddressChangeGuid + gEfiSystemNvDataFvGuid + gEfiVariableGuid + +[Protocols] + gEfiDevicePathProtocolGuid + gEfiFirmwareVolumeBlockProtocolGuid + gSpiNorFlashProtocolGuid + +[FixedPcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase64 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase64 + + +[Depex] + TRUE diff --git a/Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbD= xe.h b/Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.h new file mode 100755 index 0000000000..923ad3ccbb --- /dev/null +++ b/Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.h @@ -0,0 +1,105 @@ +/** @file + Phytium NorFlash Fvb Drivers Header. + + Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#ifndef FVB_FLASH_DXE_H_ +#define FVB_FLASH_DXE_H_ + +#include +#include +#include +#include + +#define GET_DATA_OFFSET(BaseAddr, Lba, LbaSize) ((BaseAddr) + (UINTN)((Lba= ) * (LbaSize))) +#define FVB_FLASH_SIGNATURE SIGNATURE_32('S', 'N', '= O', 'R') +#define INSTANCE_FROM_FVB_THIS(a) CR(a, FT_FVB_DEVICE, Fvb= Protocol, FVB_FLASH_SIGNATURE) + +typedef struct _FT_FVB_DEVICE FT_FVB_DEVICE; + +#define NOR_FLASH_ERASE_RETRY 10 + +typedef struct { + VENDOR_DEVICE_PATH Vendor; + EFI_DEVICE_PATH_PROTOCOL End; + } FT_FVB_DEVICE_PATH; + +struct _FT_FVB_DEVICE { + UINT32 Signature; + EFI_HANDLE Handle; + + UINTN DeviceBaseAddress; + UINTN RegionBaseAddress; + UINTN Size; + EFI_LBA StartLba; + EFI_BLOCK_IO_MEDIA Media; + + EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol; + + FT_FVB_DEVICE_PATH DevicePath; + EFI_NORFLASH_DRV_PROTOCOL *SpiFlashProtocol; + UINTN FvbSize; + VOID* TempBuffer; + }; + +EFI_STATUS +EFIAPI +FvbGetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL * This, + OUT EFI_FVB_ATTRIBUTES_2 * Attributes + ); + +EFI_STATUS +EFIAPI +FvbSetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL * This, + IN OUT EFI_FVB_ATTRIBUTES_2 * Attributes + ); + +EFI_STATUS +EFIAPI +FvbGetPhysicalAddress ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL * This, + OUT EFI_PHYSICAL_ADDRESS * Address + ); + +EFI_STATUS +EFIAPI +FvbGetBlockSize ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL * This, + IN EFI_LBA Lba, + OUT UINTN * BlockSize, + OUT UINTN * NumberOfBlocks + ); + +EFI_STATUS +EFIAPI +FvbRead ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL * This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN * NumBytes, + IN OUT UINT8 * Buffer + ); + +EFI_STATUS +EFIAPI +FvbWrite ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL * This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN * NumBytes, + IN UINT8 * Buffer + ); + +EFI_STATUS +EFIAPI +FvbEraseBlocks ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL * This, + ... + ); + +#endif // FVB_FLASH_DXE_H_ diff --git a/Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbD= xe.c b/Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.c new file mode 100755 index 0000000000..6fad70f28b --- /dev/null +++ b/Silicon/Phytium/PhytiumCommonPkg/Drivers/FlashFvbDxe/FlashFvbDxe.c @@ -0,0 +1,1329 @@ +/** @file + Phytium NorFlash Fvb Drivers. + + Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
+ Copyright (C) 2020, Phytium Technology Co Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "FlashFvbDxe.h" + +STATIC EFI_EVENT mFvbVirtualAddrChangeEvent; +STATIC FT_FVB_DEVICE *mFvbDevice; +UINTN mFlashNvStorageVariableBase; +UINTN mFlashNvStorageFtwWorkingBase; +UINTN mFlashNvStorageFtwSpareBase; +UINT32 mFlashNvStorageVariableSize; +UINT32 mFlashNvStorageFtwWorkingSize; +UINT32 mFlashNvStorageFtwSpareSize; + +STATIC CONST FT_FVB_DEVICE mFvbFlashInstanceTemplate =3D { + FVB_FLASH_SIGNATURE, // Signature + NULL, // Handle ... NEED TO BE FILLED + 0, // DeviceBaseAddress ... NEED TO BE FILLED + 0, // RegionBaseAddress ... NEED TO BE FILLED + 0, // Size ... NEED TO BE FILLED + 0, // StartLba + { + 0, // MediaId ... NEED TO BE FILLED + FALSE, // RemovableMedia + TRUE, // MediaPresent + FALSE, // LogicalPartition + FALSE, // ReadOnly + FALSE, // WriteCaching; + 0, // BlockSize ... NEED TO BE FILLED + 4, // IoAlign + 0, // LastBlock ... NEED TO BE FILLED + 0, // LowestAlignedLba + 1, // LogicalBlocksPerPhysicalBlock + }, //Media; + { + FvbGetAttributes, // GetAttributes + FvbSetAttributes, // SetAttributes + FvbGetPhysicalAddress, // GetPhysicalAddress + FvbGetBlockSize, // GetBlockSize + FvbRead, // Read + FvbWrite, // Write + FvbEraseBlocks, // EraseBlocks + NULL, // ParentHandle + }, // FvbProtoccol; + + { + { + { + HARDWARE_DEVICE_PATH, + HW_VENDOR_DP, + { + (UINT8) sizeof (VENDOR_DEVICE_PATH), + (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) + } + }, + { + 0x0, 0x0, 0x0, { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 } + }, // GUID ... NEED TO BE FILLED + }, + { + END_DEVICE_PATH_TYPE, + END_ENTIRE_DEVICE_PATH_SUBTYPE, + { + sizeof (EFI_DEVICE_PATH_PROTOCOL), + 0 + } + } + }, // DevicePath + + NULL, // SpiFlashProtocol ... NEED TO BE FILLED + 0, // Fvb Size + NULL // TempBuffer +}; + + +/** + Erases a single block of flash. + + @param[in] FlashInstance The poiter of the fvb device sturct. + + @param[in] BlockAddress Physical address of Lba to be erased. + + @retval EFI_SUCCESS The erase single block request successfull= y completed. + +**/ +STATIC +EFI_STATUS +FvbFlashEraseSingleBlock ( + IN FT_FVB_DEVICE *FlashInstance, + IN UINTN BlockAddress + ) +{ + EFI_STATUS Status; + UINTN Index; + EFI_TPL OriginalTPL; + + if ( ! EfiAtRuntime ()) { + OriginalTPL =3D gBS->RaiseTPL (TPL_HIGH_LEVEL); + } else { + OriginalTPL =3D TPL_HIGH_LEVEL; + } + + Index =3D 0; + + do { + Status =3D FlashInstance->SpiFlashProtocol->EraseSingleBlock ( BlockAd= dress); + Index++; + } while ((Index < NOR_FLASH_ERASE_RETRY) && (Status =3D=3D EFI_WRITE_PRO= TECTED)); + + if (Index =3D=3D NOR_FLASH_ERASE_RETRY) { + DEBUG (( + DEBUG_ERROR, + "EraseSingleBlock(BlockAddress=3D0x%08x: BlockLocked Error (try to e= rase % d times)\n", + BlockAddress, + Index + )); + } + + if ( ! EfiAtRuntime ()) { + gBS->RestoreTPL (OriginalTPL); + } + + return Status; +} + + +/** + Readed the specified number of bytes from the form the block to output b= uffer. + + @param[in] FlashInstance The pointer of FT_FVB_DEVICE instance. + + @param[in] Lba The starting logical block index to wri= te to. + + @param[in] Offset Offset into the block at which to begin= writing. + + @param[in] BufferSizeInBytes The number of bytes to be writed. + + @param[out] Buffer The pointer to a caller-allocated buffe= r that + contains the source for the write. + + @retval EFI_SUCCESS FvbFlashRead() is executed successfully. + +**/ +STATIC +EFI_STATUS +FvbFlashRead ( + IN FT_FVB_DEVICE *FlashInstance, + IN EFI_LBA Lba, + IN UINTN Offset, + IN UINTN BufferSizeInBytes, + OUT VOID *Buffer + ) +{ + UINTN Address; + + // The buffer must be valid + if (Buffer =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + if (BufferSizeInBytes =3D=3D 0) { + return EFI_SUCCESS; + } + + if (((Lba * FlashInstance->Media.BlockSize) + Offset + BufferSizeInBytes= ) > FlashInstance->Size) { + DEBUG ((DEBUG_ERROR, "FvbFlashRead: ERROR - Read will exceed device si= ze.\n")); + return EFI_INVALID_PARAMETER; + } + + Address =3D GET_DATA_OFFSET ( + FlashInstance->RegionBaseAddress, + Lba, + FlashInstance->Media.BlockSize + ) + Offset; + + return FlashInstance->SpiFlashProtocol->Read (Address, Buffer, BufferSiz= eInBytes); +} + + +/** + Write a full or portion of a block. It must not span block boundaries; t= hat is, + Offset + *NumBytes <=3D FlashInstance->Media.BlockSize. + + @param[in] FlashInstance The pointer of FT_FVB_DEVICE instance. + + @param[in] Lba The starting logical block index to wri= te to. + + @param[in] Offset Offset into the block at which to begin= writing. + + @param[in] BufferSizeInBytes The number of bytes to be writed. + + @param[out] Buffer The pointer to a caller-allocated buffe= r that + contains the source for the write. + + @retval EFI_SUCCESS FvbWriteBlock() is executed successfull= y. + + @retval EFI_BAD_BUFFER_SIZE The write spaned block boundaries. + +**/ +STATIC +EFI_STATUS +FvbWriteBlock ( + IN FT_FVB_DEVICE *FlashInstance, + IN EFI_LBA Lba, + IN UINTN Offset, + IN UINTN BufferSizeInBytes, + IN UINT8 *Buffer + ) +{ + EFI_STATUS Status; + UINTN BlockSize; + UINTN BlockAddress; + + // Detect WriteDisabled state + if (FlashInstance->Media.ReadOnly =3D=3D TRUE) { + DEBUG (( + DEBUG_ERROR, + "FvbWriteBlock: ERROR - Can not write:Device is in WriteDisabled sta= te.\n" + )); + // It is in WriteDisabled state, return an error right away + return EFI_ACCESS_DENIED; + } + + // Cache the block size to avoid de-referencing pointers all the time + BlockSize =3D FlashInstance->Media.BlockSize; + + // The write must not span block boundaries. + // We need to check each variable individually because adding two large = values together overflows. + if ((Offset >=3D BlockSize) || + (BufferSizeInBytes > BlockSize) || + ((Offset + BufferSizeInBytes) > BlockSize)) + { + DEBUG (( + DEBUG_ERROR, + "FvbWriteBlock: ERROR - EFI_BAD_BUFFER_SIZE: (Offset =3D0x %x + NumB= ytes =3D0x%x) > BlockSize =3D0x%x\n", + Offset, + BufferSizeInBytes, + BlockSize + )); + return EFI_BAD_BUFFER_SIZE; + } + + // We must have some bytes to write + if (BufferSizeInBytes =3D=3D 0) { + DEBUG (( + DEBUG_ERROR, + "FvbWriteBlock: ERROR - EFI_BAD_BUFFER_SIZE: NumBytes =3D=3D 0\n" + )); + return EFI_BAD_BUFFER_SIZE; + } + + if (FlashInstance->TempBuffer =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "FvbWriteBlock: ERROR - Buffer not ready\n")); + return EFI_DEVICE_ERROR; + } + // + // Write the word to NOR. + // + BlockAddress =3D GET_DATA_OFFSET ( + FlashInstance->RegionBaseAddress, + Lba, + FlashInstance->Media.BlockSize + ); + // Read NOR Flash data into shadow buffer + Status =3D FlashInstance->SpiFlashProtocol->Read ( + BlockAddress, + FlashInstance->TempBuffer, + BlockSize + ); + if (EFI_ERROR (Status)) { + // Return one of the pre-approved error statuses + return EFI_DEVICE_ERROR; + } + + // Put the data at the appropriate location inside the buffer area + CopyMem ( + (VOID *) ((UINTN) FlashInstance->TempBuffer + Offset), + Buffer, + BufferSizeInBytes + ); + Status =3D FlashInstance->SpiFlashProtocol->EraseSingleBlock (BlockAddre= ss); + + if (EFI_ERROR (Status)) { + // Return one of the pre-approved error statuses + return EFI_DEVICE_ERROR; + } + + // Write the modified buffer back to the NorFlash + Status =3D FlashInstance->SpiFlashProtocol->Write ( + BlockAddress, + FlashInstance->TempBuffer, + BlockSize + ); + if (EFI_ERROR (Status)) { + // Return one of the pre-approved error statuses + return EFI_DEVICE_ERROR; + } + + return EFI_SUCCESS; +} + + +/** + Writes the specified number of bytes from the input buffer to the block. + + @param[in] FlashInstance The pointer of FT_FVB_DEVICE instance. + + @param[in] Lba The starting logical block index to writ= e to. + + @param[in] Offset Offset into the block at which to begin = writing. + + @param[in] BufferSizeInBytes The number of bytes to be writed. + + @param[in] Buffer The pointer to a caller-allocated buffer= that + contains the source for the write. + + @retval EFI_SUCCESS FvbFlashWrite() is executed successfully. + + @retval EFI_WRITE_PROTECTED Flash state is in the WriteDisabled stat= e. + + @retval EFI_INVALID_PARAMETER The pointer of Buffer is NULL. + +**/ +STATIC +EFI_STATUS +FvbFlashWrite ( + IN FT_FVB_DEVICE *FlashInstance, + IN EFI_LBA Lba, + IN UINTN Offset, + IN UINTN BufferSizeInBytes, + IN VOID *Buffer + ) +{ + EFI_STATUS Status; + UINT32 BlockSize; + UINT32 BlockOffset; + UINTN RemainingBytes; + UINTN WriteSize; + + if (FlashInstance->Media.ReadOnly =3D=3D TRUE) { + return EFI_WRITE_PROTECTED; + } + + if (BufferSizeInBytes =3D=3D 0) { + return EFI_SUCCESS; + } + + if (Buffer =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + Status =3D EFI_SUCCESS; + BlockSize =3D FlashInstance->Media.BlockSize; + BlockOffset =3D Offset; + RemainingBytes =3D BufferSizeInBytes; + + // The write must not span block boundaries. + // We need to check each variable individually because adding + // two large values together overflows. + if (Offset >=3D BlockSize) { + DEBUG (( + DEBUG_ERROR, + "FvbFlashWrite: ERROR - EFI_BAD_BUFFER_SIZE: Offset =3D0x%x > BlockS= ize =3D0x%x\n", + Offset, + BlockSize + )); + return EFI_BAD_BUFFER_SIZE; + } + + // We must have some bytes to read + // Write either all the remaining bytes, or the number of bytes that bri= ng + // us up to a block boundary, whichever is less. + // (DiskOffset | (BlockSize - 1)) + 1) rounds DiskOffset up to the next + // block boundary (even if it is already on one). + WriteSize =3D MIN (RemainingBytes, BlockSize - BlockOffset); + + do { + Status =3D FvbWriteBlock ( + FlashInstance, + Lba, + BlockOffset, + WriteSize, + Buffer + ); + if (EFI_ERROR (Status)) { + return Status; + } + + // Now continue writing either all the remaining bytes or single block= s. + RemainingBytes -=3D WriteSize; + Buffer =3D (UINT8 *) Buffer + WriteSize; + Lba++; + BlockOffset =3D 0; + WriteSize =3D MIN (RemainingBytes, BlockSize); + } while (RemainingBytes); + + return Status; +} + + +/** + Initialises the FV Header and Variable Store Header + to support variable operations. + + @param[in] Ptr Location to initialise the headers. + + @retval EFI_SUCCESS FvbInitFvAndVariableStoreHeaders() + is executed successfully. + +**/ +STATIC +EFI_STATUS +FvbInitFvAndVariableStoreHeaders ( + IN FT_FVB_DEVICE *FlashInstance + ) +{ + EFI_STATUS Status; + VOID * Headers; + UINTN HeadersLength; + UINT32 TempAttributes; + EFI_FIRMWARE_VOLUME_HEADER *FirmwareVolumeHeader; + VARIABLE_STORE_HEADER *VariableStoreHeader; + + HeadersLength =3D sizeof (EFI_FIRMWARE_VOLUME_HEADER) + + sizeof (EFI_FV_BLOCK_MAP_ENTRY) + + sizeof (VARIABLE_STORE_HEADER); + + Headers =3D AllocateZeroPool (HeadersLength); + + // FirmwareVolumeHeader->FvLength is declared to have the Variable area + // AND the FTW working area AND the FTW Spare contiguous. + ASSERT (mFlashNvStorageVariableBase + mFlashNvStorageVariableSize =3D=3D= mFlashNvStorageFtwWorkingBase); + ASSERT (mFlashNvStorageFtwWorkingBase + mFlashNvStorageFtwWorkingSize = =3D=3D mFlashNvStorageFtwSpareBase); + + // Check if the size of the area is at least one block size + ASSERT ((mFlashNvStorageVariableSize > 0) && (mFlashNvStorageVariableSiz= e / FlashInstance->Media.BlockSize > 0)); + ASSERT ((mFlashNvStorageFtwWorkingSize > 0) && (mFlashNvStorageFtwWorkin= gSize / FlashInstance->Media.BlockSize > 0)); + ASSERT ((mFlashNvStorageFtwSpareSize > 0) && (mFlashNvStorageFtwSpareSiz= e / FlashInstance->Media.BlockSize > 0)); + + // Ensure the Variable area Base Addresses are aligned on a block size b= oundaries + ASSERT (mFlashNvStorageVariableBase % FlashInstance->Media.BlockSize =3D= =3D 0); + ASSERT (mFlashNvStorageFtwWorkingBase % FlashInstance->Media.BlockSize = =3D=3D 0); + ASSERT (mFlashNvStorageFtwSpareBase % FlashInstance->Media.BlockSize =3D= =3D 0); + + // + // EFI_FIRMWARE_VOLUME_HEADER + // + FirmwareVolumeHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *)Headers; + CopyGuid (&FirmwareVolumeHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid= ); + FirmwareVolumeHeader->FvLength =3D FlashInstance->FvbSize; + + TempAttributes =3D ( + EFI_FVB2_READ_ENABLED_CAP | // Reads may be enabled + EFI_FVB2_READ_STATUS | // Reads are currently = enabled + EFI_FVB2_STICKY_WRITE | // A block erase is req= uired to + EFI_FVB2_MEMORY_MAPPED | // It is memory mapped + EFI_FVB2_ERASE_POLARITY | // After erasure all bi= ts take this value + EFI_FVB2_WRITE_STATUS | // Writes are currently= enabled + EFI_FVB2_WRITE_ENABLED_CAP // Writes may be enabled + ); + + FirmwareVolumeHeader->Signature =3D EFI_FVH_SIGNATURE; + FirmwareVolumeHeader->Attributes =3D (EFI_FVB_ATTRIBUTES_2) TempAttribut= es; + + FirmwareVolumeHeader->HeaderLength =3D sizeof (EFI_FIRMWARE_VOLUME_HEADE= R) + sizeof (EFI_FV_BLOCK_MAP_ENTRY); + FirmwareVolumeHeader->Revision =3D EFI_FVH_REVISION; + FirmwareVolumeHeader->BlockMap[0].NumBlocks =3D FlashInstance->Media.Las= tBlock + 1; + FirmwareVolumeHeader->BlockMap[0].Length =3D FlashInstance->Media.Blo= ckSize; + FirmwareVolumeHeader->BlockMap[1].NumBlocks =3D 0; + FirmwareVolumeHeader->BlockMap[1].Length =3D 0; + FirmwareVolumeHeader->Checksum =3D CalculateCheckSum16 ( + (UINT16 *)FirmwareVolumeHeader, + FirmwareVolumeHeader->HeaderLength + ); + + // + // VARIABLE_STORE_HEADER + // + VariableStoreHeader =3D (VARIABLE_STORE_HEADER *) ((UINTN)Headers + Firm= wareVolumeHeader->HeaderLength); + CopyGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGui= d); + VariableStoreHeader->Size =3D mFlashNvStorageVariableSize - FirmwareVo= lumeHeader->HeaderLength; + VariableStoreHeader->Format =3D VARIABLE_STORE_FORMATTED; + VariableStoreHeader->State =3D VARIABLE_STORE_HEALTHY; + + // Install the combined super-header in the NorFlash + Status =3D FvbWrite (&FlashInstance->FvbProtocol, 0, 0, &HeadersLength, = Headers); + + FreePool (Headers); + + return Status; +} + + +/** + Check the integrity of firmware volume header. + + @param[in] FwVolHeader A pointer to a firmware volume header + + @retval EFI_SUCCESS The firmware volume is consistent + + @retval EFI_NOT_FOUND The firmware volume has been corrupted. + +**/ +STATIC +EFI_STATUS +FvbValidateFvHeader ( + IN FT_FVB_DEVICE *FlashInstance + ) +{ + UINT16 Checksum; + EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader; + VARIABLE_STORE_HEADER *VariableStoreHeader; + UINTN VariableStoreLength; + UINTN FvLength; + + FwVolHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *)GET_DATA_OFFSET (FlashInst= ance->RegionBaseAddress, + FlashInstance->StartLba, + FlashInstance->Media.Block= Size + ); + FvLength =3D FlashInstance->FvbSize; + + + if ((FwVolHeader->Revision !=3D EFI_FVH_REVISION) || + (FwVolHeader->Signature !=3D EFI_FVH_SIGNATURE) || + (FwVolHeader->FvLength !=3D FvLength)) + { + DEBUG (( + DEBUG_ERROR, + "ValidateFvHeader: No Firmware Volume header present\n" + )); + return EFI_NOT_FOUND; + } + + // Check the Firmware Volume Guid + if ( CompareGuid (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid)= =3D=3D FALSE ) { + DEBUG (( + DEBUG_ERROR, + "ValidateFvHeader: Firmware Volume Guid non-compatible\n" + )); + return EFI_NOT_FOUND; + } + + // Verify the header checksum + Checksum =3D CalculateSum16 ((UINT16 *)FwVolHeader, FwVolHeader->HeaderL= ength); + if (Checksum !=3D 0) { + DEBUG (( + DEBUG_ERROR, + "ValidateFvHeader: FV checksum is invalid (Checksum:0x%X)\n", + Checksum)); + return EFI_NOT_FOUND; + } + + VariableStoreHeader =3D (VARIABLE_STORE_HEADER *) ((UINTN)FwVolHeader + = FwVolHeader->HeaderLength); + + // Check the Variable Store Guid + if ( ! CompareGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid) = && + ! CompareGuid (&VariableStoreHeader->Signature, + &gEfiAuthenticatedVariableGuid)) + { + DEBUG (( + DEBUG_ERROR, + "%a: Variable Store Guid non-compatible\n" + )); + return EFI_NOT_FOUND; + } + + VariableStoreLength =3D mFlashNvStorageVariableSize - FwVolHeader->Heade= rLength; + if (VariableStoreHeader->Size !=3D VariableStoreLength) { + DEBUG (( + DEBUG_ERROR, + "ValidateFvHeader: Variable Store Length does not match\n" + )); + return EFI_NOT_FOUND; + } + + return EFI_SUCCESS; +} + + +/** + The FvbGetAttributes() function retrieves the attributes and + current settings of the block. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL in= stance. + + @param Attributes Pointer to EFI_FVB_ATTRIBUTES_2 in which the attribu= tes and + current settings are returned. + Type EFI_FVB_ATTRIBUTES_2 is defined in + EFI_FIRMWARE_VOLUME_HEADER. + + @retval EFI_SUCCESS The firmware volume attributes were returned. + +**/ +EFI_STATUS +EFIAPI +FvbGetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + EFI_FVB_ATTRIBUTES_2 FlashFvbAttributes; + CONST FT_FVB_DEVICE *FlashInstance; + + FlashInstance =3D INSTANCE_FROM_FVB_THIS (This); + + FlashFvbAttributes =3D (EFI_FVB_ATTRIBUTES_2) ( + EFI_FVB2_READ_ENABLED_CAP | // Reads may be enabled + EFI_FVB2_READ_STATUS | // Reads are currently enabled + EFI_FVB2_STICKY_WRITE | // A block erase is required to flip bit= s into EFI_FVB2_ERASE_POLARITY + EFI_FVB2_MEMORY_MAPPED | // It is memory mapped + EFI_FVB2_ERASE_POLARITY // After erasure all bits take this valu= e (i.e. '1') + ); + + // Check if it is write protected + if (FlashInstance->Media.ReadOnly !=3D TRUE) { + FlashFvbAttributes =3D FlashFvbAttributes | + EFI_FVB2_WRITE_STATUS | // Writes are curren= tly enabled + EFI_FVB2_WRITE_ENABLED_CAP | // Writes may be ena= bled + EFI_FVB2_ALIGNMENT_4; + } + + *Attributes =3D FlashFvbAttributes; + + return EFI_SUCCESS; +} + + +/** + The FvbSetAttributes() function sets configurable firmware volume attrib= utes + and returns the new settings of the firmware volume. + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL inst= ance. + + @param Attributes On input, Attributes is a pointer to + EFI_FVB_ATTRIBUTES_2 that contains the d= esired + firmware volume settings. + On successful return, it contains the new + settings of the firmware volume. + + @retval EFI_SUCCESS The firmware volume attributes were retu= rned. + + @retval EFI_INVALID_PARAMETER The attributes requested are in conflict= with + the capabilities as declared in the firm= ware + volume header. + +**/ +EFI_STATUS +EFIAPI +FvbSetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + return EFI_UNSUPPORTED; +} + + +/** + The FvbGetPhysicalAddress() function retrieves the base address of + a memory-mapped firmware volume. This function should be called + only for memory-mapped firmware volumes. + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Address Pointer to a caller-allocated + EFI_PHYSICAL_ADDRESS that, on successful + return from GetPhysicalAddress(), contains the + base address of the firmware volume. + + @retval EFI_SUCCESS The firmware volume base address was returned. + + @retval EFI_NOT_SUPPORTED The firmware volume is not memory mapped. + +**/ +EFI_STATUS +EFIAPI +FvbGetPhysicalAddress ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + OUT EFI_PHYSICAL_ADDRESS *Address + ) +{ + ASSERT (Address !=3D NULL); + + *Address =3D mFlashNvStorageVariableBase; + + return EFI_SUCCESS; +} + + +/** + The FvbGetBlockSize() function retrieves the size of the requested + block. It also returns the number of additional blocks with + the identical size. The FvbGetBlockSize() function is used to + retrieve the block map (see EFI_FIRMWARE_VOLUME_HEADER). + + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL inst= ance. + + @param Lba Indicates the block whose size to return. + + @param BlockSize Pointer to a caller-allocated UINTN in w= hich + the size of the block is returned. + + @param NumberOfBlocks Pointer to a caller-allocated UINTN in + which the number of consecutive blocks, + starting with Lba, is returned. All + blocks in this range have a size of + BlockSize. + + + @retval EFI_SUCCESS The firmware volume base address was ret= urned. + + @retval EFI_INVALID_PARAMETER The requested LBA is out of range. + +**/ +EFI_STATUS +EFIAPI +FvbGetBlockSize ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + OUT UINTN *BlockSize, + OUT UINTN *NumberOfBlocks + ) +{ + EFI_STATUS Status; + FT_FVB_DEVICE *FlashInstance; + + FlashInstance =3D INSTANCE_FROM_FVB_THIS (This); + + if (Lba > FlashInstance->Media.LastBlock) { + Status =3D EFI_INVALID_PARAMETER; + } else { + // This is easy because in this platform each NorFlash device has equa= l sized blocks. + *BlockSize =3D (UINTN) FlashInstance->Media.BlockSize; + *NumberOfBlocks =3D (UINTN) (FlashInstance->Media.LastBlock - Lba + 1); + Status =3D EFI_SUCCESS; + } + + return Status; +} + + +/** + Reads the specified number of bytes into a buffer from the specified blo= ck. + + The FvbRead() function reads the requested number of bytes from the + requested block and stores them in the provided buffer. + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Lba The starting logical block index from which = to read. + + @param Offset Offset into the block at which to begin read= ing. + + @param NumBytes Pointer to a UINTN. + At entry, *NumBytes contains the total size = of the + buffer. + At exit, *NumBytes contains the total number= of + bytes read. + + @param Buffer Pointer to a caller-allocated buffer that wi= ll be + used to hold the data that is read. + + @retval EFI_SUCCESS The firmware volume was read successfully, a= nd + contents are in Buffer. + + @retval EFI_BAD_BUFFER_SIZE Read attempted across an LBA boundary. + On output, NumBytes contains the total numbe= r of + bytes returned in Buffer. + + @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled s= tate. + + @retval EFI_DEVICE_ERROR The block device is not functioning correctl= y and + could not be read. +**/ +EFI_STATUS +EFIAPI +FvbRead ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + IN OUT UINT8 *Buffer + ) +{ + UINTN BlockSize; + FT_FVB_DEVICE *FlashInstance; + EFI_STATUS Status; + + FlashInstance =3D INSTANCE_FROM_FVB_THIS (This); + + // Cache the block size to avoid de-referencing pointers all the time + BlockSize =3D FlashInstance->Media.BlockSize; + + // The read must not span block boundaries. + // We need to check each variable individually because adding two large = values together overflows. + if ((Offset >=3D BlockSize) || + (*NumBytes > BlockSize) || + ((Offset + *NumBytes) > BlockSize)) { + return EFI_BAD_BUFFER_SIZE; + } + + // We must have some bytes to read + if (*NumBytes =3D=3D 0) { + return EFI_BAD_BUFFER_SIZE; + } + + Status =3D FvbFlashRead ( + FlashInstance, + FlashInstance->StartLba + Lba, + Offset, + *NumBytes, + Buffer + ); + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + return EFI_SUCCESS; +} + + +/** + Writes the specified number of bytes from the input buffer to the block. + + The FvbWrite() function writes the specified number of bytes from + the provided buffer to the specified block and offset. + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Lba The starting logical block index to write to. + + @param Offset Offset into the block at which to begin writ= ing. + + @param NumBytes The pointer to a UINTN. + At entry, *NumBytes contains the total size = of the + buffer. + At exit, *NumBytes contains the total number= of + bytes actually written. + + @param Buffer The pointer to a caller-allocated buffer that + contains the source for the write. + + @retval EFI_SUCCESS The firmware volume was written successfully. + + @retval EFI_BAD_BUFFER_SIZE The write was attempted across an LBA bounda= ry. + On output, NumBytes contains the total numbe= r of + bytes actually written. + + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled = state. + + @retval EFI_DEVICE_ERROR The block device is malfunctioning and could= not be + written. + +**/ +EFI_STATUS +EFIAPI +FvbWrite ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + IN UINT8 *Buffer + ) +{ + FT_FVB_DEVICE *FlashInstance; + + FlashInstance =3D INSTANCE_FROM_FVB_THIS (This); + + return FvbFlashWrite (FlashInstance, + FlashInstance->StartLba + Lba, + Offset, + *NumBytes, + Buffer + ); +} + + +/** + Erases and initialises a firmware volume block. + + The FvbEraseBlocks() function erases one or more blocks as denoted + by the variable argument list. + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL + instance. + + @param ... The variable argument list is a list of = tuples. + Each tuple describes a range of LBAs to = erase + and consists of the following: + An EFI_LBA that indicates the starting L= BA + A UINTN that indicates the number of blo= cks + to erase. + + The list is terminated with an + EFI_LBA_LIST_TERMINATOR. + + @retval EFI_SUCCESS The erase request successfully completed. + + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisab= led + state. + + @retval EFI_DEVICE_ERROR The block device is not functioning corr= ectly + and could not be written. + The firmware device may have been partia= lly + erased. + + @retval EFI_INVALID_PARAMETER One or more of the LBAs listed in the va= riable + argument list do not exist in the firmwa= re + volume. + +**/ +EFI_STATUS +EFIAPI +FvbEraseBlocks ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + ... + ) +{ + EFI_STATUS Status; + VA_LIST Args; + UINTN BlockAddress; // Physical address of Lba to erase + EFI_LBA StartingLba; // Lba from which we start erasing + UINTN NumOfLba; // Number of Lba blocks to erase + FT_FVB_DEVICE *Instance; + + Instance =3D INSTANCE_FROM_FVB_THIS (This); + + Status =3D EFI_SUCCESS; + + // Detect WriteDisabled state + if (Instance->Media.ReadOnly =3D=3D TRUE) { + // Firmware volume is in WriteDisabled state + DEBUG (( + DEBUG_ERROR, + "FvbEraseBlocks: ERROR - Device is in WriteDisabled state.\n" + )); + return EFI_ACCESS_DENIED; + } + + // Before erasing, check the entire list of parameters to ensure all spe= cified blocks are valid + + VA_START (Args, This); + do { + // Get the Lba from which we start erasing + StartingLba =3D VA_ARG (Args, EFI_LBA); + + // Have we reached the end of the list? + if (StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR) { + //Exit the while loop + break; + } + + // How many Lba blocks are we requested to erase? + NumOfLba =3D VA_ARG (Args, UINT32); + + // All blocks must be within range + if ((NumOfLba =3D=3D 0) || ((Instance->StartLba + StartingLba + NumOfL= ba - 1) > Instance->Media.LastBlock)) { + VA_END (Args); + DEBUG (( + DEBUG_ERROR, + "FvbEraseBlocks: ERROR - Lba range goes past the last Lba.\n" + )); + Status =3D EFI_INVALID_PARAMETER; + goto EXIT; + } + } while (TRUE); + + VA_END (Args); + + // + // To get here, all must be ok, so start erasing + // + VA_START (Args, This); + do { + // Get the Lba from which we start erasing + StartingLba =3D VA_ARG (Args, EFI_LBA); + + // Have we reached the end of the list? + if (StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR) { + // Exit the while loop + break; + } + + // How many Lba blocks are we requested to erase? + NumOfLba =3D VA_ARG (Args, UINT32); + + // Go through each one and erase it + while (NumOfLba > 0) { + // Get the physical address of Lba to erase + BlockAddress =3D GET_DATA_OFFSET ( + Instance->RegionBaseAddress, + Instance->StartLba + StartingLba, + Instance->Media.BlockSize + ); + + // Erase it + Status =3D FvbFlashEraseSingleBlock (Instance, BlockAddress); + if (EFI_ERROR (Status)) { + VA_END (Args); + Status =3D EFI_DEVICE_ERROR; + goto EXIT; + } + + // Move to the next Lba + StartingLba++; + NumOfLba--; + } + } while (TRUE); + + VA_END (Args); + +EXIT: + return Status; +} + + +/** + This function inited the NorFlash instance. + + @param[in][out] FlashInstance The pointer of FT_FVB_DEVICE instance. + + @retval EFI_SUCCESS PhytNorFlashFvbInitialize() is executed = successfully. + +**/ +STATIC +EFI_STATUS +PhytNorFlashFvbInitialize ( + IN OUT FT_FVB_DEVICE *FlashInstance + ) +{ + EFI_STATUS Status; + UINT32 FvbNumLba; + EFI_BOOT_MODE BootMode; + UINTN RuntimeMmioRegionSize; + + RuntimeMmioRegionSize =3D FlashInstance->Size; + + // Declare the Non-Volatile storage as EFI_MEMORY_RUNTIME + Status =3D gDS->AddMemorySpace ( + EfiGcdMemoryTypeMemoryMappedIo, + FlashInstance->RegionBaseAddress, + RuntimeMmioRegionSize, + EFI_MEMORY_UC | EFI_MEMORY_RUNTIME + ); + ASSERT_EFI_ERROR (Status); + + Status =3D gDS->SetMemorySpaceAttributes ( + FlashInstance->RegionBaseAddress, + RuntimeMmioRegionSize, + EFI_MEMORY_UC | EFI_MEMORY_RUNTIME + ); + ASSERT_EFI_ERROR (Status); + + // Set the index of the first LBA for the FVB + FlashInstance->StartLba =3D (mFlashNvStorageVariableBase - FlashInstance= ->RegionBaseAddress) / FlashInstance->Media.BlockSize; + + BootMode =3D GetBootModeHob (); + if (BootMode =3D=3D BOOT_WITH_DEFAULT_SETTINGS) { + Status =3D EFI_INVALID_PARAMETER; + } else { + // Determine if there is a valid header at the beginning of the NorFla= sh + Status =3D FvbValidateFvHeader (FlashInstance); + } + + // Install the Default FVB header if required + if (EFI_ERROR (Status)) { + // There is no valid header, so time to install one. + DEBUG (( + DEBUG_ERROR, + "NorFlashFvbInitialize: ERROR - The FVB Header is invalid. Installin= g a correct one for this volume.\n" + )); + + // Erase all the NorFlash that is reserved for variable storage + FvbNumLba =3D FlashInstance->FvbSize / FlashInstance->Media.BlockSize; + + Status =3D FvbEraseBlocks ( + &FlashInstance->FvbProtocol, + (EFI_LBA)0, + FvbNumLba, + EFI_LBA_LIST_TERMINATOR + ); + if (EFI_ERROR (Status)) { + return Status; + } + + // Install all appropriate headers + Status =3D FvbInitFvAndVariableStoreHeaders (FlashInstance); + if (EFI_ERROR (Status)) { + return Status; + } + } + + return Status; +} + + +/** + The CreateInstance() function Create Fvb Instance. + + @retval EFI_SUCCESS Create Instance successfully. + + @retval other Create Instance failed. + +**/ +STATIC +EFI_STATUS +CreateInstance ( + VOID + ) +{ + EFI_STATUS Status; + NOR_FLASH_DEVICE_DESCRIPTION *NorFlashDevice; + + mFvbDevice =3D AllocateRuntimeCopyPool (sizeof (mFvbFlashInstanceTemplat= e), &mFvbFlashInstanceTemplate); + if (mFvbDevice =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + + } + // Locate flash protocols + Status =3D gBS->LocateProtocol (&gSpiNorFlashProtocolGuid, + NULL, + (VOID **)&mFvbDevice->SpiFlashProtocol); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "Cannot locate NorFlash protocol.\n" + )); + return Status; + } + + NorFlashDevice =3D AllocateRuntimePool (sizeof (NOR_FLASH_DEVICE_DESCRIP= TION)); + if (NorFlashDevice =3D=3D NULL) { + DEBUG (( + DEBUG_ERROR, + "Cannot Allocate NorFlashDevice Pool.\n" + )); + return Status; + } + + Status =3D mFvbDevice->SpiFlashProtocol->GetDevices (NorFlashDevice); + if (EFI_ERROR (Status)) { + return Status; + } + + Status =3D mFvbDevice->SpiFlashProtocol->Initialization (); + if (EFI_ERROR (Status)) { + return Status; + } + + mFvbDevice->DeviceBaseAddress =3D NorFlashDevice->DeviceBaseAddress; + mFvbDevice->RegionBaseAddress =3D NorFlashDevice->RegionBaseAddress; + mFvbDevice->Size =3D NorFlashDevice->Size; + + mFvbDevice->Media.MediaId =3D 0; + mFvbDevice->Media.BlockSize =3D NorFlashDevice->BlockSize; + mFvbDevice->Media.LastBlock =3D (mFvbDevice->Size / mFvbDevice->Media.Bl= ockSize) - 1; + mFvbDevice->FvbSize =3D mFlashNvStorageVariableSize + + mFlashNvStorageFtwWorkingSize + + mFlashNvStorageFtwSpareSize; + DEBUG((DEBUG_INFO, "mFvbDevice->fvbSize=3D%x\n", mFvbDevice->FvbSize)); + CopyGuid (&mFvbDevice->DevicePath.Vendor.Guid, &NorFlashDevice->Guid); + + mFvbDevice->TempBuffer =3D AllocateRuntimePool (mFvbDevice->Media.BlockS= ize); + if (mFvbDevice->TempBuffer =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + Status =3D PhytNorFlashFvbInitialize (mFvbDevice); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "PhytNorFlashFvbInitialize: Fail to init NorFlash devices\n" + )); + return Status; + } + + Status =3D gBS->InstallMultipleProtocolInterfaces ( + &mFvbDevice->Handle, + &gEfiDevicePathProtocolGuid, + &mFvbDevice->DevicePath, + &gEfiFirmwareVolumeBlockProtocolGuid, + &mFvbDevice->FvbProtocol, + NULL + ); + if (EFI_ERROR (Status)) { + FreePool (mFvbDevice); + FreePool (NorFlashDevice); + return Status; + } + + FreePool (NorFlashDevice); + + return Status; +} + + +/** + Fixup internal data so that EFI can be call in virtual mode. + Call the passed in Child Notify event and convert any pointers + in lib to virtual mode. + + @param[in] Event The Event that is being processed. + + @param[in] Context Event Context. + + @retval None. + +**/ +STATIC +VOID +EFIAPI +FvbVirtualNotifyEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + VOID *Pointer; + + EfiConvertPointer (0x0, (VOID **)&mFlashNvStorageVariableBase); + EfiConvertPointer (0x0, (VOID **)&mFlashNvStorageFtwWorkingBase); + EfiConvertPointer (0x0, (VOID **)&mFlashNvStorageFtwSpareBase); + if (!mFvbDevice->DeviceBaseAddress) { + mFvbDevice->DeviceBaseAddress |=3D 0x1; + } + + if (!mFvbDevice->RegionBaseAddress) { + mFvbDevice->RegionBaseAddress |=3D 0x1; + } + EfiConvertPointer (0x0, (VOID **)&mFvbDevice->DeviceBaseAddress); + EfiConvertPointer (0x0, (VOID **)&mFvbDevice->RegionBaseAddress); + + mFvbDevice->DeviceBaseAddress &=3D ~(EFI_PHYSICAL_ADDRESS)0x1; + mFvbDevice->RegionBaseAddress &=3D ~(EFI_PHYSICAL_ADDRESS)0x1; + + // Convert SpiFlashProtocol + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->SpiFlashProtocol->Erase)); + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->SpiFlashProtocol->Write)); + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->SpiFlashProtocol->Read)); + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->SpiFlashProtocol->GetDevi= ces)); + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->SpiFlashProtocol)); + + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->FvbProtocol.EraseBlocks)); + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->FvbProtocol.GetAttributes= )); + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->FvbProtocol.GetBlockSize)= ); + + Pointer =3D (VOID *)(UINTN)mFvbDevice->FvbProtocol.GetPhysicalAddress; + EfiConvertPointer (0x0, &Pointer); + mFvbDevice->FvbProtocol.GetPhysicalAddress =3D (EFI_FVB_GET_PHYSICAL_ADD= RESS)(UINTN)Pointer; + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->FvbProtocol.Read)); + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->FvbProtocol.SetAttributes= )); + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->FvbProtocol.Write)); + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->FvbProtocol)); + + if (mFvbDevice->TempBuffer !=3D NULL) { + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice->TempBuffer)); + } + EfiConvertPointer (0x0, (VOID **)&(mFvbDevice)); + + return; +} + + +/** + This function is the entrypoint of the fvb driver. + + @param[in] ImageHandle The firmware allocated handle for the EFI imag= e. + + @param[in] SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS The entry point is executed successfully. + + @retval other Some error occurs when executing this entry po= int. + +**/ +EFI_STATUS +EFIAPI +FvbEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + mFlashNvStorageVariableBase =3D FixedPcdGet64 (PcdFlashNvStorageVariab= leBase64); + mFlashNvStorageFtwWorkingBase =3D FixedPcdGet64 (PcdFlashNvStorageFtwWor= kingBase64); + mFlashNvStorageFtwSpareBase =3D FixedPcdGet64 (PcdFlashNvStorageFtwSpa= reBase64); + mFlashNvStorageVariableSize =3D FixedPcdGet32 (PcdFlashNvStorageVariab= leSize); + mFlashNvStorageFtwWorkingSize =3D FixedPcdGet32 (PcdFlashNvStorageFtwWor= kingSize); + mFlashNvStorageFtwSpareSize =3D FixedPcdGet32 (PcdFlashNvStorageFtwSpa= reSize); + + Status =3D CreateInstance (); + if (EFI_ERROR (Status)) { + DEBUG (( + DEBUG_ERROR, + "CreateInstance: Fail to create instance for NorFlash\n" + )); + } + // Register for the virtual address change event + // + Status =3D gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, + TPL_NOTIFY, + FvbVirtualNotifyEvent, + NULL, + &gEfiEventVirtualAddressChangeGuid, + &mFvbVirtualAddrChangeEvent + ); + ASSERT_EFI_ERROR (Status); + + return Status; +} --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88907): https://edk2.groups.io/g/devel/message/88907 Mute This Topic: https://groups.io/mt/90458879/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Wed May 15 09:28:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+88904+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+88904+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1649916229; cv=none; d=zohomail.com; s=zohoarc; b=d21SvFunNfkdoMrSkGUn7tDPWsJCGwHzFJLwyoiveq0sjjdFqt3/+o8VGT7VKNbUsem9q0FGQ6isgem6USdQuWf6oivMKEDnITmmfrLG71GeWFkFagm1ZmuqePkjAJ/vNYR+h/M3IiA4qP4MsaGDByfKKfWwoRFxqP9IdRQ+wsI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1649916229; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=NC7heF0Vx+I/6sYlo1pLnE9+xfK/2yOJy4lxoD/dIfc=; b=NXWcneyj73AGwywVeuFa6juxQChKrTu6SjjWCqKwL2656Dzsb8zI+9ONqmIWNSStSkUEobbbFgLTnPHSN5EPcpMjArppya72WLhqIvGJCL6JvvSpW8x+kCn6kk8cfWX6o2L5GtGhcTcdiJmYfBECs6z9bWDErbV1Icirfx3gtWU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+88904+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1649916229769822.7745679026456; Wed, 13 Apr 2022 23:03:49 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id pl87YY1788612x0tD4i3zENI; Wed, 13 Apr 2022 23:03:49 -0700 X-Received: from zg8tmty3ljk5ljewns4xndka.icoremail.net (zg8tmty3ljk5ljewns4xndka.icoremail.net [167.99.105.149]) by mx.groups.io with SMTP id smtpd.web09.8413.1649916223397099165 for ; Wed, 13 Apr 2022 23:03:45 -0700 X-Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-2 (Coremail) with SMTP id AQAAfwBH5cxcuVdiwbCVAA--.48050S2; Thu, 14 Apr 2022 14:04:12 +0800 (CST) X-Received: from localhost.localdomain (unknown [2409:8950:e30:b22b:2796:3ef3:5bba:2229]) by mail (Coremail) with SMTP id AQAAfwD3qpswuVdisSEAAA--.705S6; Thu, 14 Apr 2022 14:03:39 +0800 (CST) From: "Ling Jia" To: devel@edk2.groups.io Cc: Leif Lindholm , Ling Jia Subject: [edk2-devel] [PATCH v7 4/4] Silicon/Phytium: Added runtime support to spi master. Date: Thu, 14 Apr 2022 14:03:09 +0800 Message-Id: <20220414060309.30298-5-jialing@phytium.com.cn> In-Reply-To: <20220414060309.30298-1-jialing@phytium.com.cn> References: <20220414060309.30298-1-jialing@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAfwD3qpswuVdisSEAAA--.705S6 X-CM-SenderInfo: xmldzxdqj61x51wl3zoofrzhdfq/ X-Coremail-Antispam: 1Uk129KBjvJXoWxKw15Gw4UZFyxGr4DJF43KFg_yoW7KrW8pa 1Utr4aqF4UJr43Zw1rZw18urn5A390ka4DJrW3WF9YkF1agryjqa13Zr1rKa4xtr9Fya48 XrnYqw48urZ0yw7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj DUYxn0WfASr-VFAU7a7-sFnT9fnUUIcSsGvfJ3UbIYCTnIWIevJa73UjIFyTuYvj4RJUUU UUUUU Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jialing@phytium.com.cn X-Gm-Message-State: ihlhInIeJPmS6qIaWF8gL6NOx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1649916229; bh=L2BIvbENASwwEKCCzCUBePU9yg9RZZgLfMkaJy/gcKU=; h=Cc:Date:From:Reply-To:Subject:To; b=LSCJQE+7Zal+2kQ5uOrtZ658pBnaBc/Q0PyORJzTBM36tPM/ToHUugwo4cWVwq8JU+W qfx/rDmMCWKOewPACdmcYQ4BK9MsRsADfK7zlPv/L3Xz/AtC2r2yquizxNA0K0zxibAkK yLJP6g8eFoV2++SU+fSt32Gi9LX5ibjUo0w= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1649916231643100008 Content-Type: text/plain; charset="utf-8" Solved the problem of virtual address translation in runtime access under OS Signed-off-by: Ling Jia Reviewed-by: leif Lindholm --- Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf | 5 ++ Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.h | 2 + Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.c | 84 +++++++++++++++= ++--- 3 files changed, 80 insertions(+), 11 deletions(-) diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf b/Silico= n/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf index 21d75f268d..0b23821c65 100644 --- a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.inf @@ -27,18 +27,23 @@ [LibraryClasses] BaseLib DebugLib + DxeServicesTableLib IoLib UefiLib UefiBootServicesTableLib UefiDriverEntryPoint + UefiRuntimeLib + UefiRuntimeServicesTableLib =20 [Guids] + gEfiEventVirtualAddressChangeGuid =20 [Protocols] gSpiMasterProtocolGuid =20 [FixedPcd] gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerBase + gPhytiumPlatformTokenSpaceGuid.PcdSpiControllerSize =20 [Depex] TRUE diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.h b/Silicon/= Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.h index 8795ea238d..842d0c3d18 100644 --- a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.h +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.h @@ -10,6 +10,8 @@ #ifndef SPI_DXE_H_ #define SPI_DXE_H_ =20 +#include +#include #include =20 #define SPI_MASTER_SIGNATURE SIGNATURE_32 ('M', 'S', 'P', 'I') diff --git a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.c b/Silicon/= Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.c index 7602a3e0cd..5358ff6090 100644 --- a/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.c +++ b/Silicon/Phytium/FT2000-4Pkg/Drivers/SpiDxe/SpiDxe.c @@ -13,8 +13,9 @@ #include #include "SpiDxe.h" =20 -PHYT_SPI_MASTER *pSpiMasterInstance; -static UINTN mSpiControlBase; +STATIC EFI_EVENT mSpiMasterVirtualAddrChangeEvent; +STATIC UINTN mSpiMasterControlBase; +PHYT_SPI_MASTER *mSpiMasterInstance; =20 /** This function inited a spi driver. @@ -66,7 +67,7 @@ SpiMasterSetConfig ( Value =3D Config; } =20 - SpiAddr =3D mSpiControlBase + RegAddr; + SpiAddr =3D mSpiMasterControlBase + RegAddr; MmioWrite32 (SpiAddr, Value); =20 return EFI_SUCCESS; @@ -99,7 +100,7 @@ SpiMasterGetConfig ( SpiAddr =3D 0; Value =3D 0; =20 - SpiAddr =3D mSpiControlBase + RegAddr; + SpiAddr =3D mSpiMasterControlBase + RegAddr; Value =3D MmioRead32 (SpiAddr); =20 if (CmdId !=3D 0) { @@ -157,6 +158,34 @@ SpiMasterInitProtocol ( return EFI_SUCCESS; } =20 +/** + Fixup internal data so that EFI can be call in virtual mode. + Call the passed in Child Notify event and convert any pointers + in lib to virtual mode. + + @param[in] Event The Event that is being processed. + + @param[in] Context Event Context. + + @retval None. + +**/ +STATIC +VOID +EFIAPI +SpiMasterVirtualNotifyEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EfiConvertPointer (0x0, (VOID **)&(mSpiMasterControlBase)); + EfiConvertPointer (0x0, (VOID **)&(mSpiMasterInstance->SpiMasterProtocol= .SpiGetConfig)); + EfiConvertPointer (0x0, (VOID **)&(mSpiMasterInstance->SpiMasterProtocol= .SpiSetConfig)); + EfiConvertPointer (0x0, (VOID **)&(mSpiMasterInstance->SpiMasterProtocol= )); + EfiConvertPointer (0x0, (VOID **)&(mSpiMasterInstance)); + + return; +} =20 /** This function is the entrypoint of the spi driver. @@ -178,25 +207,58 @@ SpiMasterDrvEntryPoint ( ) { EFI_STATUS Status; + UINTN SpiMasterControlSize; =20 - pSpiMasterInstance =3D AllocateRuntimeZeroPool (sizeof (PHYT_SPI_MASTER)= ); - if (pSpiMasterInstance =3D=3D NULL) { + mSpiMasterControlBase =3D FixedPcdGet64 (PcdSpiControllerBase); + SpiMasterControlSize =3D FixedPcdGet64 (PcdSpiControllerSize); + + mSpiMasterInstance =3D AllocateRuntimeZeroPool (sizeof (PHYT_SPI_MASTER)= ); + if (mSpiMasterInstance =3D=3D NULL) { return EFI_OUT_OF_RESOURCES; } =20 - mSpiControlBase =3D FixedPcdGet64 (PcdSpiControllerBase); + mSpiMasterControlBase =3D FixedPcdGet64 (PcdSpiControllerBase); =20 - SpiMasterInitProtocol (&pSpiMasterInstance->SpiMasterProtocol); + SpiMasterInitProtocol (&mSpiMasterInstance->SpiMasterProtocol); =20 - pSpiMasterInstance->Signature =3D SPI_MASTER_SIGNATURE; + mSpiMasterInstance->Signature =3D SPI_MASTER_SIGNATURE; =20 Status =3D gBS->InstallMultipleProtocolInterfaces ( - &(pSpiMasterInstance->Handle), + &(mSpiMasterInstance->Handle), &gSpiMasterProtocolGuid, - &(pSpiMasterInstance->SpiMasterProtocol), + &(mSpiMasterInstance->SpiMasterProtocol), NULL ); ASSERT_EFI_ERROR (Status); =20 + // + // Declare the SPI Controller Space as EFI_MEMORY_RUNTIME + // + Status =3D gDS->AddMemorySpace ( + EfiGcdMemoryTypeMemoryMappedIo, + (mSpiMasterControlBase >> EFI_PAGE_SHIFT) << EFI_PAGE_SH= IFT, EFI_PAGES_TO_SIZE(EFI_SIZE_TO_PAGES(SpiMasterControlSize)), + EFI_MEMORY_UC | EFI_MEMORY_RUNTIME + ); + ASSERT_EFI_ERROR (Status); + + Status =3D gDS->SetMemorySpaceAttributes ( + (mSpiMasterControlBase >> EFI_PAGE_SHIFT) << EFI_PAGE_SH= IFT, EFI_PAGES_TO_SIZE(EFI_SIZE_TO_PAGES(SpiMasterControlSize)), + EFI_MEMORY_UC | EFI_MEMORY_RUNTIME + ); + ASSERT_EFI_ERROR (Status); + + // + // Register for the virtual address change event + // + Status =3D gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, + TPL_NOTIFY, + SpiMasterVirtualNotifyEvent, + NULL, + &gEfiEventVirtualAddressChangeGuid, + &mSpiMasterVirtualAddrChangeEvent + ); + ASSERT_EFI_ERROR (Status); + return EFI_SUCCESS; } --=20 2.25.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#88904): https://edk2.groups.io/g/devel/message/88904 Mute This Topic: https://groups.io/mt/90458876/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-