This patch follows new Intel SDM to define CPUID.(EAX=7,ECX=0):EDX[30].
Signed-off-by: Star Zeng <star.zeng@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
---
MdePkg/Include/Register/Intel/Cpuid.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Include/Register/Intel/Cpuid.h b/MdePkg/Include/Register/Intel/Cpuid.h
index 6f77e174c115..5ec85ba561ac 100644
--- a/MdePkg/Include/Register/Intel/Cpuid.h
+++ b/MdePkg/Include/Register/Intel/Cpuid.h
@@ -1587,9 +1587,9 @@ typedef union {
///
UINT32 EnumeratesSupportForCapability:1;
///
- /// [Bit 30] Reserved.
+ /// [Bit 30] Enumerates support for the IA32_CORE_CAPABILITIES MSR.
///
- UINT32 Reserved3:1;
+ UINT32 EnumeratesSupportForCoreCapabilitiesMsr:1;
///
/// [Bit 31] Enumerates support for Speculative Store Bypass Disable (SSBD).
/// Processors that set this bit sup-port the IA32_SPEC_CTRL MSR. They allow
--
2.27.0.windows.1
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Reviewed-by: Ray Ni <ray.ni@intel.com> > -----Original Message----- > From: Zeng, Star <star.zeng@intel.com> > Sent: Thursday, October 21, 2021 11:28 AM > To: devel@edk2.groups.io > Cc: Zeng, Star <star.zeng@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao > <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>; Ni, Ray <ray.ni@intel.com> > Subject: [PATCH] MdePkg Cpuid.h: Define CPUID.(EAX=7,ECX=0):EDX[30] > > This patch follows new Intel SDM to define CPUID.(EAX=7,ECX=0):EDX[30]. > > Signed-off-by: Star Zeng <star.zeng@intel.com> > Cc: Michael D Kinney <michael.d.kinney@intel.com> > Cc: Liming Gao <gaoliming@byosoft.com.cn> > Cc: Zhiguang Liu <zhiguang.liu@intel.com> > Cc: Ray Ni <ray.ni@intel.com> > --- > MdePkg/Include/Register/Intel/Cpuid.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/MdePkg/Include/Register/Intel/Cpuid.h b/MdePkg/Include/Register/Intel/Cpuid.h > index 6f77e174c115..5ec85ba561ac 100644 > --- a/MdePkg/Include/Register/Intel/Cpuid.h > +++ b/MdePkg/Include/Register/Intel/Cpuid.h > @@ -1587,9 +1587,9 @@ typedef union { > /// > > UINT32 EnumeratesSupportForCapability:1; > > /// > > - /// [Bit 30] Reserved. > > + /// [Bit 30] Enumerates support for the IA32_CORE_CAPABILITIES MSR. > > /// > > - UINT32 Reserved3:1; > > + UINT32 EnumeratesSupportForCoreCapabilitiesMsr:1; > > /// > > /// [Bit 31] Enumerates support for Speculative Store Bypass Disable (SSBD). > > /// Processors that set this bit sup-port the IA32_SPEC_CTRL MSR. They allow > > -- > 2.27.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#82470): https://edk2.groups.io/g/devel/message/82470 Mute This Topic: https://groups.io/mt/86482397/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> > -----邮件原件----- > 发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Ni, Ray > 发送时间: 2021年10月22日 11:29 > 收件人: Zeng, Star <star.zeng@intel.com>; devel@edk2.groups.io > 抄送: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao > <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com> > 主题: Re: [edk2-devel] [PATCH] MdePkg Cpuid.h: Define > CPUID.(EAX=7,ECX=0):EDX[30] > > Reviewed-by: Ray Ni <ray.ni@intel.com> > > > -----Original Message----- > > From: Zeng, Star <star.zeng@intel.com> > > Sent: Thursday, October 21, 2021 11:28 AM > > To: devel@edk2.groups.io > > Cc: Zeng, Star <star.zeng@intel.com>; Kinney, Michael D > <michael.d.kinney@intel.com>; Liming Gao > > <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>; Ni, > Ray <ray.ni@intel.com> > > Subject: [PATCH] MdePkg Cpuid.h: Define CPUID.(EAX=7,ECX=0):EDX[30] > > > > This patch follows new Intel SDM to define CPUID.(EAX=7,ECX=0):EDX[30]. > > > > Signed-off-by: Star Zeng <star.zeng@intel.com> > > Cc: Michael D Kinney <michael.d.kinney@intel.com> > > Cc: Liming Gao <gaoliming@byosoft.com.cn> > > Cc: Zhiguang Liu <zhiguang.liu@intel.com> > > Cc: Ray Ni <ray.ni@intel.com> > > --- > > MdePkg/Include/Register/Intel/Cpuid.h | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/MdePkg/Include/Register/Intel/Cpuid.h > b/MdePkg/Include/Register/Intel/Cpuid.h > > index 6f77e174c115..5ec85ba561ac 100644 > > --- a/MdePkg/Include/Register/Intel/Cpuid.h > > +++ b/MdePkg/Include/Register/Intel/Cpuid.h > > @@ -1587,9 +1587,9 @@ typedef union { > > /// > > > > UINT32 EnumeratesSupportForCapability:1; > > > > /// > > > > - /// [Bit 30] Reserved. > > > > + /// [Bit 30] Enumerates support for the IA32_CORE_CAPABILITIES > MSR. > > > > /// > > > > - UINT32 Reserved3:1; > > > > + UINT32 EnumeratesSupportForCoreCapabilitiesMsr:1; > > > > /// > > > > /// [Bit 31] Enumerates support for Speculative Store Bypass Disable > (SSBD). > > > > /// Processors that set this bit sup-port the IA32_SPEC_CTRL MSR. > They allow > > > > -- > > 2.27.0.windows.1 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#82770): https://edk2.groups.io/g/devel/message/82770 Mute This Topic: https://groups.io/mt/86642951/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=-=-=-=-=-=-=-=-=-=-=-
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