From nobody Tue Apr 30 03:19:32 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 152121681821075.20216244029655; Fri, 16 Mar 2018 09:13:38 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 64A4521E49029; Fri, 16 Mar 2018 09:07:10 -0700 (PDT) Received: from mail-wr0-x244.google.com (mail-wr0-x244.google.com [IPv6:2a00:1450:400c:c0c::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E421E20954BB2 for ; Fri, 16 Mar 2018 09:07:07 -0700 (PDT) Received: by mail-wr0-x244.google.com with SMTP id h2so12204036wre.12 for ; Fri, 16 Mar 2018 09:13:33 -0700 (PDT) Received: from localhost.localdomain ([105.142.191.63]) by smtp.gmail.com with ESMTPSA id n8sm7876242wrf.12.2018.03.16.09.13.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Mar 2018 09:13:30 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::244; helo=mail-wr0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WXaYHjYEe6/nlwT9JWXFcLEkXj9565ICXBYMJ7hq+dE=; b=SRU8VCRCT7liC+7sam6LpvSi6+j7BP2YHXzKsxUMQfqrVVLfN0CIyz3NLM6dh16BLD Uz/51iA/4h+YAbPqMh2HAaAm6MR/AHVVsypdT1cqRMTrZXD3dsDgb902jm8s712NmvVw t37GOPX8LHZRDoKLofIL0bwUGl6YvJVzYudxo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WXaYHjYEe6/nlwT9JWXFcLEkXj9565ICXBYMJ7hq+dE=; b=rYEjS0ZWhxfcp2GkVIEkKac2Qi5n0+cRJ2C3zmi36/zU9Gi3lQyqAufwEtubWoV91F pVjF5fF2vPFxMhFn+rFrd7Ile8+tJ/DTvX+p8znMdMO2/ei5FhifFyqWE8USiUeZIUsz Rjq30EM+LijloIY+QUJrQeYvT7f7vcOz1bbXMGVURfKMgj+TRMJRRRZANna1ez2V2jBB tqxCCjtiHf/us6+/83XYpMB2lFsyHceMOgaQMqZ6ilncZIRDOyO7P/lKZOIOWc8NpQjS L7xLimfeP1F5zoO8jqCMtVtNmE1Hw5XeZ/chNqJEZIM1H0/Fg4fRZ/V11gSlQm+rQ0jt +6lw== X-Gm-Message-State: AElRT7GLVgIFJXG/nBWDkICMkiurm4+eGESzdBNmIT8z9oRtdVNJFb8y VB+cKJZTmwdCWhSFdgWhWeO4oCg9Jk0= X-Google-Smtp-Source: AG47ELuj/TWLrxAMGewtN8kxYPfQXgqbP6ftGO8fWzY47A6aTg0trreWyoFHK0Si/7FIqGWJneQ/Sg== X-Received: by 10.223.174.247 with SMTP id y110mr2168505wrc.68.1521216811644; Fri, 16 Mar 2018 09:13:31 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 16 Mar 2018 16:13:17 +0000 Message-Id: <20180316161322.6756-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180316161322.6756-1-ard.biesheuvel@linaro.org> References: <20180316161322.6756-1-ard.biesheuvel@linaro.org> Subject: [edk2] [RFC PATCH edk2-platforms 1/6] Silicon/SynQuacerPlatformFlashAccessLib: fix return value on no FVB found X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" If no suitable FVB protocol implementation is found to apply the capsule update, and the last one we disregarded was ruled out because it has the read-only attribute, we will exit the function returning EFI_SUCCESS without assigning a value to *OutFvb, resulting in a crash when it subsequently gets dereferenced. So set the correct value for Status for that case. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQua= cerPlatformFlashAccessLib.c | 1 + 1 file changed, 1 insertion(+) diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAcce= ssLib/SynQuacerPlatformFlashAccessLib.c b/Silicon/Socionext/SynQuacer/Libra= ry/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c index fbb8f1f9e48c..1af4abc16aa5 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/S= ynQuacerPlatformFlashAccessLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/S= ynQuacerPlatformFlashAccessLib.c @@ -99,6 +99,7 @@ GetFvbByAddress ( DEBUG ((DEBUG_INFO, "%a: ignoring read-only FVB protocol implementation\n", __FUNCTION__)); + Status =3D EFI_NOT_FOUND; continue; } =20 --=20 2.15.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Apr 30 03:19:32 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 16 Mar 2018 09:13:32 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::243; helo=mail-wr0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UP79KEtGjrsXu1BisqMygG3vBJQhUaVzyXwNOgD7MbY=; b=C/sIPMqBPcErrjKd5l9y049N4UtUdMd2LrK/rW5w6L738aVe9f4vjNjuVBYbilF2wF tWPeMTnANHt5If5Ij6vgzLXAliQe/9JQiFxhJ6ix6mfc1mayhAiFQgglsrdepToOBM/a DS3r8dUeKO+p58tDqLBKTip7ACsVwSBNBH7UE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; 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charset="utf-8" When we updated the capsule definition to cover the ARM Trusted Firmware binary image as well as the firmware volume containing the EDK2 code, we failed to recognize that the start of the image no longer constitutes a Firmware Volume header, and so we should not interpret the data as such. Note that this makes the FVB protocol slighty less appropriate as the abstraction to use to write this data, but given that there does not appear to be a better match (disk I/O, block I/O), let's stick with it for now, but require the base address to match the capsule's target address exactly rather than reading the size of the FV from the header. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQua= cerPlatformFlashAccessLib.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAcce= ssLib/SynQuacerPlatformFlashAccessLib.c b/Silicon/Socionext/SynQuacer/Libra= ry/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c index 1af4abc16aa5..82fe3f74aa7f 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/S= ynQuacerPlatformFlashAccessLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/S= ynQuacerPlatformFlashAccessLib.c @@ -53,7 +53,6 @@ GetFvbByAddress ( UINTN HandleCount; UINTN Index; EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *Fvb; - EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader; EFI_FVB_ATTRIBUTES_2 Attributes; =20 // @@ -103,8 +102,7 @@ GetFvbByAddress ( continue; } =20 - FwVolHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) ((UINTN) *FvbBaseAddres= s); - if ((Address >=3D *FvbBaseAddress) && (Address <=3D (*FvbBaseAddress += FwVolHeader->FvLength))) { + if (Address =3D=3D *FvbBaseAddress) { *OutFvb =3D Fvb; Status =3D EFI_SUCCESS; break; --=20 2.15.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Apr 30 03:19:32 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1521216824450846.0151954001653; Fri, 16 Mar 2018 09:13:44 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 4DF12223FCF36; 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Fri, 16 Mar 2018 09:13:35 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 16 Mar 2018 16:13:19 +0000 Message-Id: <20180316161322.6756-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180316161322.6756-1-ard.biesheuvel@linaro.org> References: <20180316161322.6756-1-ard.biesheuvel@linaro.org> Subject: [edk2] [RFC PATCH edk2-platforms 3/6] Silicon/SynQuacerPlatformFlashAccessLib: skip empty blocks X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Before adding more payload to the capsule which may be only partially occupied, add some logic to skip writing these blocks after erasing them. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQua= cerPlatformFlashAccessLib.c | 41 +++++++++++++++++--- 1 file changed, 36 insertions(+), 5 deletions(-) diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAcce= ssLib/SynQuacerPlatformFlashAccessLib.c b/Silicon/Socionext/SynQuacer/Libra= ry/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c index 82fe3f74aa7f..0131e33a4fe7 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/S= ynQuacerPlatformFlashAccessLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/S= ynQuacerPlatformFlashAccessLib.c @@ -115,6 +115,35 @@ GetFvbByAddress ( return Status; } =20 +/** + Check whether a buffer has any data in it, i.e., bytes with value !=3D 0= xff + + @param[in] Buffer Address of the buffer + @param[in] Length Size of the buffer + + @retval TRUE A non-0xff byte was found + @retval FALSE Buffer has 0xff bytes only + +**/ +STATIC +BOOLEAN +BufferHasData ( + IN VOID *Buffer, + IN UINTN Length + ) +{ + UINT8 *Data; + UINTN Index; + + Data =3D Buffer; + for (Index =3D 0; Index < Length; Index++) { + if (Data[Index] !=3D 0xff) { + return TRUE; + } + } + return FALSE; +} + /** Perform flash write operation. =20 @@ -257,11 +286,13 @@ PerformFlashWrite ( __FUNCTION__, BlockSize, Lba)); =20 NumBytes =3D BlockSize; - Status =3D Fvb->Write (Fvb, Lba, 0, &NumBytes, Buffer); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, - "%a: write of LBA 0x%lx failed - %r (NumBytes =3D=3D 0x%lx)\n", - __FUNCTION__, Lba, Status, NumBytes)); + if (BufferHasData (Buffer, NumBytes)) { + Status =3D Fvb->Write (Fvb, Lba, 0, &NumBytes, Buffer); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "%a: write of LBA 0x%lx failed - %r (NumBytes =3D=3D 0x%lx)\n", + __FUNCTION__, Lba, Status, NumBytes)); + } } =20 if (HaveBootGraphics) { --=20 2.15.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Apr 30 03:19:32 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Allow the lowest supported firmware version to be configured by PCD so that each platform can set it individually. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDes= criptor.inf | 2 ++ Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDes= criptorTable.aslc | 2 +- Silicon/Socionext/SynQuacer/SynQuacer.dec = | 3 +++ 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/Syste= mFirmwareDescriptor.inf b/Platform/Socionext/DeveloperBox/SystemFirmwareDes= criptor/SystemFirmwareDescriptor.inf index 95a5e482a713..db0c9c43b2e5 100644 --- a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwa= reDescriptor.inf +++ b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwa= reDescriptor.inf @@ -29,6 +29,7 @@ [Packages] MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec SignedCapsulePkg/SignedCapsulePkg.dec + Silicon/Socionext/SynQuacer/SynQuacer.dec =20 [LibraryClasses] DebugLib @@ -39,6 +40,7 @@ [LibraryClasses] [FixedPcd] gArmTokenSpaceGuid.PcdFdSize gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision + gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion =20 [Pcd] gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor diff --git a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/Syste= mFirmwareDescriptorTable.aslc b/Platform/Socionext/DeveloperBox/SystemFirmw= areDescriptor/SystemFirmwareDescriptorTable.aslc index fb69de078313..12a56315a5ab 100644 --- a/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwa= reDescriptorTable.aslc +++ b/Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwa= reDescriptorTable.aslc @@ -25,7 +25,7 @@ #define BUILD_STRING(x) L"build #" __BUILD_STRING(x) #define CURRENT_FIRMWARE_VERSION FixedPcdGet32 (PcdFirmwareRevi= sion) #define CURRENT_FIRMWARE_VERSION_STRING BUILD_STRING (FixedPcdGet32 (P= cdFirmwareRevision)) -#define LOWEST_SUPPORTED_FIRMWARE_VERSION 0x00000001 +#define LOWEST_SUPPORTED_FIRMWARE_VERSION FixedPcdGet32 (PcdLowestSuppor= tedFirmwareVersion) =20 #define IMAGE_ID SIGNATURE_64('S', 'N', 'D', 'E= ', 'V', 'B', 'O', 'X') #define IMAGE_ID_STRING L"Socionext Developer Box" diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/= SynQuacer/SynQuacer.dec index eb4fc4ace2f7..ccaf80def06b 100644 --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -44,6 +44,9 @@ [PcdsFixedAtBuild] =20 gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock|62500000|UINT32|0x00000005 =20 + # for capsule update + gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|1|UINT32|0x00= 000009 + [PcdsPatchableInModule, PcdsDynamic] # Enable both RC #0 and RC #1 by default gSynQuacerTokenSpaceGuid.PcdPcieEnableMask|0x3|UINT8|0x00000007 --=20 2.15.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Apr 30 03:19:32 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Fri, 16 Mar 2018 09:13:37 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::241; helo=mail-wr0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UvgEDsDYCRNbKbBTtx/lwSC50yJMhxlnVB6nwljwR+A=; b=jChW1N09J1yVgRMpjaDMrT/6USAn2zTo9OX3if38RPqFNj6yBNi7vS5q9CAW+3IQEC DO9g4U5B3FNAZMy+lQODsUkHLpAjugfWBTUoIJTj9qrklhpeypwCPyRgxQnq4MQOLI5v f2fs71FUKHYVfZ7VhNj2CxeevF4ZBvcZnQMMo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; 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charset="utf-8" Needed to make change to capsule footprint installable via capsule update. Will be reverted in next patch, and will be squashed together before going upstream. Reviewed-by: Leif Lindholm --- Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer= .c | 4 ++-- Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMem= oryInitPeiLib.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFl= ashSynQuacer.c b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/N= orFlashSynQuacer.c index 816d8ba33f8c..cd6ab582fdc5 100644 --- a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQ= uacer.c +++ b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQ= uacer.c @@ -23,8 +23,8 @@ STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] =3D { { // UEFI code region SYNQUACER_SPI_NOR_BASE, // device base - FixedPcdGet64 (PcdFdBaseAddress), // region base - FixedPcdGet32 (PcdFdSize), // region size + 0x8100000, //FixedPcdGet64 (PcdFdBaseAddress), // re= gion base + 0x300000, //FixedPcdGet32 (PcdFdSize), // reg= ion size SIZE_64KB, // block size { 0x19c118b0, 0xc423, 0x42be, { 0xb8, 0x0f, 0x70, 0x6f, 0x1f, 0xcb, 0x= 59, 0x9a } diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/= SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacer= MemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c index 1402ecafce4a..963d568e43df 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuac= erMemoryInitPeiLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuac= erMemoryInitPeiLib.c @@ -57,8 +57,8 @@ STATIC CONST EFI_RESOURCE_ATTRIBUTE_TYPE mDramResourceAtt= ributes =3D =20 STATIC CONST ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] =3D { // Memory mapped SPI NOR flash - ARM_CACHED_DEVICE_REGION (FixedPcdGet64 (PcdFdBaseAddress), - FixedPcdGet32 (PcdFdSize)), + ARM_CACHED_DEVICE_REGION (0x8100000,//FixedPcdGet64 (PcdFdBaseAddress), + 0x300000),//FixedPcdGet32 (PcdFdSize)), =20 // SynQuacer OnChip peripherals ARM_DEVICE_REGION (SYNQUACER_PERIPHERALS_BASE, --=20 2.15.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Apr 30 03:19:32 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Modify the .FDF definitions describing the Flash Device and the capsule payload so that the SCP firmware can be updated along with the ARM Trusted Firmware and EDK2 code. Note that this does not increase the likelihood some kind of recovery is needed when a capsule update fails: the NOR layout has been updated to allow the serial flasher to execute even if the SCP firmware has been corrupted, and a failed flash of just UEFI already requires such recovery anyway. Since this constitutes a backward incompatible changes as far as capsule update is concerned, add a provision for setting the minimum supported firmware version via the build command line. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Platform/Socionext/DeveloperBox/DeveloperBox.dsc = | 3 +++ Platform/Socionext/DeveloperBox/DeveloperBox.fdf = | 15 +++++++++------ Platform/Socionext/DeveloperBox/SystemFirmwareUpdateConfig/SystemFirmwareU= pdateConfig.ini | 4 ++-- Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQuacer= .c | 4 ++-- Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMem= oryInitPeiLib.c | 4 ++-- 5 files changed, 18 insertions(+), 12 deletions(-) diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/So= cionext/DeveloperBox/DeveloperBox.dsc index 538488253d9b..af2930bcbba5 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc @@ -29,6 +29,7 @@ [Defines] BUILD_NUMBER =3D 1 =20 DEFINE DO_X86EMU =3D FALSE + DEFINE MIN_BUILD_NUMBER =3D 1 =20 [BuildOptions] RELEASE_*_*_CC_FLAGS =3D -DMDEPKG_NDEBUG -U_FORTIFY_SOURCE -D_FORTIFY_S= OURCE=3D0 @@ -404,6 +405,8 @@ [PcdsFixedAtBuild.common] !endif gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision|$(BUILD_NUMBER) =20 + gSynQuacerTokenSpaceGuid.PcdLowestSupportedFirmwareVersion|$(MIN_BUILD_N= UMBER) + # # 96boards mezzanine support # diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf b/Platform/So= cionext/DeveloperBox/DeveloperBox.fdf index ddd9757201aa..b2de8a2255c9 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf @@ -26,13 +26,13 @@ ##########################################################################= ###### =20 [FD.SPI_NOR_IMAGE] -BaseAddress =3D 0x08180000|gArmTokenSpaceGuid.PcdFdBaseAddress # The ba= se address of the Firmware in NOR Flash. -Size =3D 0x00280000|gArmTokenSpaceGuid.PcdFdSize # The si= ze in bytes of the FLASH Device +BaseAddress =3D 0x08100000|gArmTokenSpaceGuid.PcdFdBaseAddress # The ba= se address of the Firmware in NOR Flash. +Size =3D 0x00300000|gArmTokenSpaceGuid.PcdFdSize # The si= ze in bytes of the FLASH Device ErasePolarity =3D 1 =20 # This one is tricky, it must be: BlockSize * NumBlocks =3D Size BlockSize =3D 0x00010000 -NumBlocks =3D 0x28 +NumBlocks =3D 0x30 =20 ##########################################################################= ###### # @@ -50,13 +50,16 @@ [FD.SPI_NOR_IMAGE] # ##########################################################################= ###### =20 -0x00000000|0x00078000 +0x00000000|0x00080000 +FILE =3D Platform/Socionext/DeveloperBox/scp_firmware.bin + +0x00080000|0x00078000 FILE =3D Platform/Socionext/DeveloperBox/fip_all_arm_tf.bin =20 -0x00078000|0x00008000 +0x000f8000|0x00008000 FILE =3D $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(ARCH)/Silicon/S= ocionext/SynQuacer/Stage2Tables/Stage2Tables/OUTPUT/Stage2Tables.bin =20 -0x00080000|0x00200000 +0x00100000|0x00200000 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize FV =3D FVMAIN_COMPACT =20 diff --git a/Platform/Socionext/DeveloperBox/SystemFirmwareUpdateConfig/Sys= temFirmwareUpdateConfig.ini b/Platform/Socionext/DeveloperBox/SystemFirmwar= eUpdateConfig/SystemFirmwareUpdateConfig.ini index 1f77aeab5049..32b342bd0a1b 100644 --- a/Platform/Socionext/DeveloperBox/SystemFirmwareUpdateConfig/SystemFirm= wareUpdateConfig.ini +++ b/Platform/Socionext/DeveloperBox/SystemFirmwareUpdateConfig/SystemFirm= wareUpdateConfig.ini @@ -19,7 +19,7 @@ Update0 =3D SynQuacerFvMain [SynQuacerFvMain] FirmwareType =3D 0 # SystemFirmware AddressType =3D 1 # 0 - relative address, 1 - absolute addre= ss. -BaseAddress =3D 0x08180000 # Base address offset on flash -Length =3D 0x00240000 # Length +BaseAddress =3D 0x08100000 # Base address offset on flash +Length =3D 0x00300000 # Length ImageOffset =3D 0x00000000 # Image offset of this SystemFirmware image FileGuid =3D e99b89f7-c120-4b25-4db1-8394edb0b4f5 # PcdEdkiiSystemFi= rmwareFileGuid diff --git a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFl= ashSynQuacer.c b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/N= orFlashSynQuacer.c index cd6ab582fdc5..816d8ba33f8c 100644 --- a/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQ= uacer.c +++ b/Silicon/Socionext/SynQuacer/Library/NorFlashSynQuacerLib/NorFlashSynQ= uacer.c @@ -23,8 +23,8 @@ STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] =3D { { // UEFI code region SYNQUACER_SPI_NOR_BASE, // device base - 0x8100000, //FixedPcdGet64 (PcdFdBaseAddress), // re= gion base - 0x300000, //FixedPcdGet32 (PcdFdSize), // reg= ion size + FixedPcdGet64 (PcdFdBaseAddress), // region base + FixedPcdGet32 (PcdFdSize), // region size SIZE_64KB, // block size { 0x19c118b0, 0xc423, 0x42be, { 0xb8, 0x0f, 0x70, 0x6f, 0x1f, 0xcb, 0x= 59, 0x9a } diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/= SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacer= MemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c index 963d568e43df..1402ecafce4a 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuac= erMemoryInitPeiLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuac= erMemoryInitPeiLib.c @@ -57,8 +57,8 @@ STATIC CONST EFI_RESOURCE_ATTRIBUTE_TYPE mDramResourceAtt= ributes =3D =20 STATIC CONST ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] =3D { // Memory mapped SPI NOR flash - ARM_CACHED_DEVICE_REGION (0x8100000,//FixedPcdGet64 (PcdFdBaseAddress), - 0x300000),//FixedPcdGet32 (PcdFdSize)), + ARM_CACHED_DEVICE_REGION (FixedPcdGet64 (PcdFdBaseAddress), + FixedPcdGet32 (PcdFdSize)), =20 // SynQuacer OnChip peripherals ARM_DEVICE_REGION (SYNQUACER_PERIPHERALS_BASE, --=20 2.15.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel