From nobody Sat Apr 27 21:25:01 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1514259082054112.47887603849915; Mon, 25 Dec 2017 19:31:22 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 8D8D1222447DF; Mon, 25 Dec 2017 19:26:26 -0800 (PST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 723F9208F7A3C for ; Mon, 25 Dec 2017 19:26:25 -0800 (PST) Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Dec 2017 19:31:19 -0800 Received: from zwei4-mobl1.ccr.corp.intel.com ([10.239.193.199]) by fmsmga008.fm.intel.com with ESMTP; 25 Dec 2017 19:31:18 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=david.wei@intel.com; receiver=edk2-devel@lists.01.org X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,458,1508828400"; d="scan'208";a="5247749" From: zwei4 To: edk2-devel@lists.01.org Date: Tue, 26 Dec 2017 11:31:12 +0800 Message-Id: <20171226033112.14108-1-david.wei@intel.com> X-Mailer: git-send-email 2.14.1.windows.1 Subject: [edk2] [Patch][edk2-platforms/devel-MinnowBoardMax-UDK2017] Fix License Header. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: michael.d.kinney@intel.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: zwei4 Cc: michael.d.kinney@intel.com Cc: mike.wu@intel.com --- .../Library/SerialPortLib/PlatformSerialPortLib.h | 128 +++-- .../Library/SerialPortLib/SerialPortLib.c | 514 ++++++++++-------= ---- Vlv2TbltDevicePkg/Library/SerialPortLib/SioInit.h | 146 +++--- .../MonoStatusCode/PlatformStatusCode.h | 351 ++++++-------- 4 files changed, 523 insertions(+), 616 deletions(-) diff --git a/Vlv2TbltDevicePkg/Library/SerialPortLib/PlatformSerialPortLib.= h b/Vlv2TbltDevicePkg/Library/SerialPortLib/PlatformSerialPortLib.h index e59ae9279..2cc7525b2 100644 --- a/Vlv2TbltDevicePkg/Library/SerialPortLib/PlatformSerialPortLib.h +++ b/Vlv2TbltDevicePkg/Library/SerialPortLib/PlatformSerialPortLib.h @@ -1,69 +1,59 @@ -/** @file - Header file of Serial port hardware definition. - - Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
- = =20 - This program and the accompanying materials are licensed and made availa= ble under - the terms and conditions of the BSD License that accompanies this distri= bution. =20 - The full text of the license may be found at = =20 - http://opensource.org/licenses/bsd-license.php. = =20 - = =20 - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. =20 - = =20 - This software and associated documentation - (if any) is furnished under a license and may only be used or - copied in accordance with the terms of the license. Except as - permitted by such license, no part of this software or - documentation may be reproduced, stored in a retrieval system, or - transmitted in any form or by any means without the express written - consent of Intel Corporation. - - Module Name: PlatformSerialPortLib.h - -**/ - -#ifndef __PLATFORM_SERIAL_PORT_LIB_H_ -#define __PLATFORM_SERIAL_PORT_LIB_H_ - -#include -#include -#include -#include -#include - -// -// UART Register Offsets -// -#define BAUD_LOW_OFFSET 0x00 -#define BAUD_HIGH_OFFSET 0x01 -#define IER_OFFSET 0x01 -#define LCR_SHADOW_OFFSET 0x01 -#define FCR_SHADOW_OFFSET 0x02 -#define IR_CONTROL_OFFSET 0x02 -#define FCR_OFFSET 0x02 -#define EIR_OFFSET 0x02 -#define BSR_OFFSET 0x03 -#define LCR_OFFSET 0x03 -#define MCR_OFFSET 0x04 -#define LSR_OFFSET 0x05 -#define MSR_OFFSET 0x06 - -// -// UART Register Bit Defines -// -#define LSR_TXRDY 0x20 -#define LSR_RXDA 0x01 -#define DLAB 0x01 - -#define UART_DATA 8 -#define UART_STOP 1 -#define UART_PARITY 0 -#define UART_BREAK_SET 0 - -VOID -InitializeSio ( - VOID - ); - -#endif +/** @file + Header file of Serial port hardware definition. + + Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
+ = =20 + This program and the accompanying materials are licensed and made availa= ble under + the terms and conditions of the BSD License that accompanies this distri= bution. =20 + The full text of the license may be found at = =20 + http://opensource.org/licenses/bsd-license.php. = =20 + = =20 + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. =20 + = =20 +**/ + +#ifndef __PLATFORM_SERIAL_PORT_LIB_H_ +#define __PLATFORM_SERIAL_PORT_LIB_H_ + +#include +#include +#include +#include +#include + +// +// UART Register Offsets +// +#define BAUD_LOW_OFFSET 0x00 +#define BAUD_HIGH_OFFSET 0x01 +#define IER_OFFSET 0x01 +#define LCR_SHADOW_OFFSET 0x01 +#define FCR_SHADOW_OFFSET 0x02 +#define IR_CONTROL_OFFSET 0x02 +#define FCR_OFFSET 0x02 +#define EIR_OFFSET 0x02 +#define BSR_OFFSET 0x03 +#define LCR_OFFSET 0x03 +#define MCR_OFFSET 0x04 +#define LSR_OFFSET 0x05 +#define MSR_OFFSET 0x06 + +// +// UART Register Bit Defines +// +#define LSR_TXRDY 0x20 +#define LSR_RXDA 0x01 +#define DLAB 0x01 + +#define UART_DATA 8 +#define UART_STOP 1 +#define UART_PARITY 0 +#define UART_BREAK_SET 0 + +VOID +InitializeSio ( + VOID + ); + +#endif diff --git a/Vlv2TbltDevicePkg/Library/SerialPortLib/SerialPortLib.c b/Vlv2= TbltDevicePkg/Library/SerialPortLib/SerialPortLib.c index 21d5e8aec..891972f1a 100644 --- a/Vlv2TbltDevicePkg/Library/SerialPortLib/SerialPortLib.c +++ b/Vlv2TbltDevicePkg/Library/SerialPortLib/SerialPortLib.c @@ -1,262 +1,252 @@ -/** @file - Serial I/O Port library functions with no library constructor/destructor - - Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
- = =20 - This program and the accompanying materials are licensed and made availa= ble under - the terms and conditions of the BSD License that accompanies this distri= bution. =20 - The full text of the license may be found at = =20 - http://opensource.org/licenses/bsd-license.php. = =20 - = =20 - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. =20 - = =20 - This software and associated documentation - (if any) is furnished under a license and may only be used or - copied in accordance with the terms of the license. Except as - permitted by such license, no part of this software or - documentation may be reproduced, stored in a retrieval system, or - transmitted in any form or by any means without the express written - consent of Intel Corporation. - - Module Name: SerialPortLib.c - -**/ - -#include "PlatformSerialPortLib.h" - -UINT16 gComBase =3D 0x3f8; -UINTN gBps =3D 115200; -UINT8 gData =3D 8; -UINT8 gStop =3D 1; -UINT8 gParity =3D 0; -UINT8 gBreakSet =3D 0; - -/** - Initialize Serial Port - - The Baud Rate Divisor registers are programmed and the LCR - is used to configure the communications format. Hard coded - UART config comes from globals in DebugSerialPlatform lib. - - @param None - - @retval None - -**/ -RETURN_STATUS -EFIAPI -UARTInitialize ( - VOID - ) -{ - UINTN Divisor; - UINT8 OutputData; - UINT8 Data; - - // - // Map 5..8 to 0..3 - // - Data =3D (UINT8) (gData - (UINT8) 5); - - // - // Calculate divisor for baud generator - // - Divisor =3D 115200 / gBps; - - // - // Set communications format - // - OutputData =3D (UINT8) ((DLAB << 7) | ((gBreakSet << 6) | ((gParity << 3= ) | ((gStop << 2) | Data)))); - IoWrite8 (gComBase + LCR_OFFSET, OutputData); - - // - // Configure baud rate - // - IoWrite8 (gComBase + BAUD_HIGH_OFFSET, (UINT8) (Divisor >> 8)); - IoWrite8 (gComBase + BAUD_LOW_OFFSET, (UINT8) (Divisor & 0xff)); - - // - // Switch back to bank 0 - // - OutputData =3D (UINT8) ((~DLAB << 7) | ((gBreakSet << 6) | ((gParity << = 3) | ((gStop << 2) | Data)))); - IoWrite8 (gComBase + LCR_OFFSET, OutputData); - - return RETURN_SUCCESS; -} - -/** - Common function to initialize UART Serial device and USB Serial device. - - @param None - - @retval None - -**/ -RETURN_STATUS -EFIAPI -SerialPortInitialize ( - VOID - ) -{ - - UARTInitialize (); - - - return RETURN_SUCCESS; -} - -/** - Write data to serial device. - - If the buffer is NULL, then return 0; - if NumberOfBytes is zero, then return 0. - - @param Buffer Point of data buffer which need to be writed. - @param NumberOfBytes Number of output bytes which are cached in Buff= er. - - @retval 0 Write data failed. - @retval !0 Actual number of bytes writed to serial device. - -**/ -UINTN -EFIAPI -UARTDbgOut ( - IN UINT8 *Buffer, - IN UINTN NumberOfBytes -) -{ - UINTN Result; - UINT8 Data; - - if (NULL =3D=3D Buffer) { - return 0; - } - - Result =3D NumberOfBytes; - - while (NumberOfBytes--) { - // - // Wait for the serial port to be ready. - // - do { - Data =3D IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OF= FSET); - } while ((Data & LSR_TXRDY) =3D=3D 0); - IoWrite8 ((UINT16) PcdGet64 (PcdSerialRegisterBase), *Buffer++); - } - - return Result; -} - -/** - Common function to write data to UART Serial device and USB Serial devic= e. - - @param Buffer Point of data buffer which need to be writed. - @param NumberOfBytes Number of output bytes which are cached in Buff= er. - -**/ -UINTN -EFIAPI -SerialPortWrite ( - IN UINT8 *Buffer, - IN UINTN NumberOfBytes -) -{ - if (FeaturePcdGet (PcdStatusCodeUseIsaSerial)) { - UARTDbgOut (Buffer, NumberOfBytes); - } - - return RETURN_SUCCESS; -} - -/** - Read data from serial device and save the datas in buffer. - - If the buffer is NULL, then return 0; - if NumberOfBytes is zero, then return 0. - - @param Buffer Point of data buffer which need to be writed. - @param NumberOfBytes Number of output bytes which are cached in Buff= er. - - @retval 0 Read data failed. - @retval !0 Actual number of bytes raed to serial device. - -**/ -UINTN -EFIAPI -UARTDbgIn ( - OUT UINT8 *Buffer, - IN UINTN NumberOfBytes -) -{ - UINTN Result; - UINT8 Data; - - if (NULL =3D=3D Buffer) { - return 0; - } - - Result =3D NumberOfBytes; - - while (NumberOfBytes--) { - // - // Wait for the serial port to be ready. - // - do { - Data =3D IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OF= FSET); - } while ((Data & LSR_RXDA) =3D=3D 0); - - *Buffer++ =3D IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase)); - } - - return Result; -} - -/** - Common function to Read data from UART serial device, USB serial device = and save the datas in buffer. - - @param Buffer Point of data buffer which need to be writed. - @param NumberOfBytes Number of output bytes which are cached in Buff= er. - -**/ -UINTN -EFIAPI -SerialPortRead ( - OUT UINT8 *Buffer, - IN UINTN NumberOfBytes -) -{ - if (FeaturePcdGet (PcdStatusCodeUseIsaSerial)) { - UARTDbgIn (Buffer, NumberOfBytes); - } - - return RETURN_SUCCESS; -} - - -/** - Polls a serial device to see if there is any data waiting to be read. - - Polls aserial device to see if there is any data waiting to be read. - If there is data waiting to be read from the serial device, then TRUE is= returned. - If there is no data waiting to be read from the serial device, then FALS= E is returned. - - @retval TRUE Data is waiting to be read from the serial devi= ce. - @retval FALSE There is no data waiting to be read from the se= rial device. - -**/ -BOOLEAN -EFIAPI -SerialPortPoll ( - VOID - ) -{ - UINT8 Data; - - // - // Read the serial port status. - // - Data =3D IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OFFSET= ); - - return (BOOLEAN) ((Data & LSR_RXDA) !=3D 0); -} +/** @file + Serial I/O Port library functions with no library constructor/destructor + + Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
+ = =20 + This program and the accompanying materials are licensed and made availa= ble under + the terms and conditions of the BSD License that accompanies this distri= bution. =20 + The full text of the license may be found at = =20 + http://opensource.org/licenses/bsd-license.php. = =20 + = =20 + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. =20 + = =20 +**/ + +#include "PlatformSerialPortLib.h" + +UINT16 gComBase =3D 0x3f8; +UINTN gBps =3D 115200; +UINT8 gData =3D 8; +UINT8 gStop =3D 1; +UINT8 gParity =3D 0; +UINT8 gBreakSet =3D 0; + +/** + Initialize Serial Port + + The Baud Rate Divisor registers are programmed and the LCR + is used to configure the communications format. Hard coded + UART config comes from globals in DebugSerialPlatform lib. + + @param None + + @retval None + +**/ +RETURN_STATUS +EFIAPI +UARTInitialize ( + VOID + ) +{ + UINTN Divisor; + UINT8 OutputData; + UINT8 Data; + + // + // Map 5..8 to 0..3 + // + Data =3D (UINT8) (gData - (UINT8) 5); + + // + // Calculate divisor for baud generator + // + Divisor =3D 115200 / gBps; + + // + // Set communications format + // + OutputData =3D (UINT8) ((DLAB << 7) | ((gBreakSet << 6) | ((gParity << 3= ) | ((gStop << 2) | Data)))); + IoWrite8 (gComBase + LCR_OFFSET, OutputData); + + // + // Configure baud rate + // + IoWrite8 (gComBase + BAUD_HIGH_OFFSET, (UINT8) (Divisor >> 8)); + IoWrite8 (gComBase + BAUD_LOW_OFFSET, (UINT8) (Divisor & 0xff)); + + // + // Switch back to bank 0 + // + OutputData =3D (UINT8) ((~DLAB << 7) | ((gBreakSet << 6) | ((gParity << = 3) | ((gStop << 2) | Data)))); + IoWrite8 (gComBase + LCR_OFFSET, OutputData); + + return RETURN_SUCCESS; +} + +/** + Common function to initialize UART Serial device and USB Serial device. + + @param None + + @retval None + +**/ +RETURN_STATUS +EFIAPI +SerialPortInitialize ( + VOID + ) +{ + + UARTInitialize (); + + + return RETURN_SUCCESS; +} + +/** + Write data to serial device. + + If the buffer is NULL, then return 0; + if NumberOfBytes is zero, then return 0. + + @param Buffer Point of data buffer which need to be writed. + @param NumberOfBytes Number of output bytes which are cached in Buff= er. + + @retval 0 Write data failed. + @retval !0 Actual number of bytes writed to serial device. + +**/ +UINTN +EFIAPI +UARTDbgOut ( + IN UINT8 *Buffer, + IN UINTN NumberOfBytes +) +{ + UINTN Result; + UINT8 Data; + + if (NULL =3D=3D Buffer) { + return 0; + } + + Result =3D NumberOfBytes; + + while (NumberOfBytes--) { + // + // Wait for the serial port to be ready. + // + do { + Data =3D IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OF= FSET); + } while ((Data & LSR_TXRDY) =3D=3D 0); + IoWrite8 ((UINT16) PcdGet64 (PcdSerialRegisterBase), *Buffer++); + } + + return Result; +} + +/** + Common function to write data to UART Serial device and USB Serial devic= e. + + @param Buffer Point of data buffer which need to be writed. + @param NumberOfBytes Number of output bytes which are cached in Buff= er. + +**/ +UINTN +EFIAPI +SerialPortWrite ( + IN UINT8 *Buffer, + IN UINTN NumberOfBytes +) +{ + if (FeaturePcdGet (PcdStatusCodeUseIsaSerial)) { + UARTDbgOut (Buffer, NumberOfBytes); + } + + return RETURN_SUCCESS; +} + +/** + Read data from serial device and save the datas in buffer. + + If the buffer is NULL, then return 0; + if NumberOfBytes is zero, then return 0. + + @param Buffer Point of data buffer which need to be writed. + @param NumberOfBytes Number of output bytes which are cached in Buff= er. + + @retval 0 Read data failed. + @retval !0 Actual number of bytes raed to serial device. + +**/ +UINTN +EFIAPI +UARTDbgIn ( + OUT UINT8 *Buffer, + IN UINTN NumberOfBytes +) +{ + UINTN Result; + UINT8 Data; + + if (NULL =3D=3D Buffer) { + return 0; + } + + Result =3D NumberOfBytes; + + while (NumberOfBytes--) { + // + // Wait for the serial port to be ready. + // + do { + Data =3D IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OF= FSET); + } while ((Data & LSR_RXDA) =3D=3D 0); + + *Buffer++ =3D IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase)); + } + + return Result; +} + +/** + Common function to Read data from UART serial device, USB serial device = and save the datas in buffer. + + @param Buffer Point of data buffer which need to be writed. + @param NumberOfBytes Number of output bytes which are cached in Buff= er. + +**/ +UINTN +EFIAPI +SerialPortRead ( + OUT UINT8 *Buffer, + IN UINTN NumberOfBytes +) +{ + if (FeaturePcdGet (PcdStatusCodeUseIsaSerial)) { + UARTDbgIn (Buffer, NumberOfBytes); + } + + return RETURN_SUCCESS; +} + + +/** + Polls a serial device to see if there is any data waiting to be read. + + Polls aserial device to see if there is any data waiting to be read. + If there is data waiting to be read from the serial device, then TRUE is= returned. + If there is no data waiting to be read from the serial device, then FALS= E is returned. + + @retval TRUE Data is waiting to be read from the serial devi= ce. + @retval FALSE There is no data waiting to be read from the se= rial device. + +**/ +BOOLEAN +EFIAPI +SerialPortPoll ( + VOID + ) +{ + UINT8 Data; + + // + // Read the serial port status. + // + Data =3D IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OFFSET= ); + + return (BOOLEAN) ((Data & LSR_RXDA) !=3D 0); +} diff --git a/Vlv2TbltDevicePkg/Library/SerialPortLib/SioInit.h b/Vlv2TbltDe= vicePkg/Library/SerialPortLib/SioInit.h index cded45c7e..83c119b72 100644 --- a/Vlv2TbltDevicePkg/Library/SerialPortLib/SioInit.h +++ b/Vlv2TbltDevicePkg/Library/SerialPortLib/SioInit.h @@ -1,78 +1,68 @@ -/** @file - Header file of Serial port hardware definition. - - Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.
- = =20 - This program and the accompanying materials are licensed and made availa= ble under - the terms and conditions of the BSD License that accompanies this distri= bution. =20 - The full text of the license may be found at = =20 - http://opensource.org/licenses/bsd-license.php. = =20 - = =20 - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. =20 - = =20 - This software and associated documentation - (if any) is furnished under a license and may only be used or - copied in accordance with the terms of the license. Except as - permitted by such license, no part of this software or - documentation may be reproduced, stored in a retrieval system, or - transmitted in any form or by any means without the express written - consent of Intel Corporation. - - Module Name: PlatformSerialPortLib.h - -**/ - -#ifndef _SIO_INIT_H_ -#define _SIO_INIT_H_ - -#define WPCN381U_CONFIG_INDEX 0x2E -#define WPCN381U_CONFIG_DATA 0x2F -#define WPCN381U_CONFIG_INDEX1 0x164E -#define WPCN381U_CONFIG_DATA1 0x164F -#define WPCN381U_CHIP_ID 0xF4 -#define WDCP376_CHIP_ID 0xF1 - -// -// SIO Logical Devices Numbers -// -#define WPCN381U_LDN_UART0 0x03 // LDN for Serial Port = Controller -#define WPCN381U_LDN_UART1 0x02 // LDN for Parallel Por= t Controller -#define WPCN381U_LDN_PS2K 0x06 // LDN for PS2 Keyboard= Controller -#define WPCN381U_LDN_PS2M 0x05 // LDN for PS2 Mouse Co= ntroller -#define WPCN381U_KB_BASE1_ADDRESS 0x60 // Base Address of KB c= ontroller -#define WPCN381U_KB_BASE2_ADDRESS 0x64 // Base Address of KB c= ontroller -#define SIO_KBC_CLOCK 0x01 // 0/1/2 - 8/12/16 MHz = KBC Clock Source -#define WPCN381U_LDN_GPIO 0x07 // LDN for GPIO - -// -// SIO Registers Layout -// -#define WPCN381U_LD_SEL_REGISTER 0x07 // Logical Device Selec= t Register Address -#define WPCN381U_DEV_ID_REGISTER 0x20 // Device Identificatio= n Register Address -#define WPCN381U_ACTIVATE_REGISTER 0x30 // Device Identificatio= n Register Address -#define WPCN381U_BASE1_HI_REGISTER 0x60 // Device BaseAddres Re= gister #1 MSB Address -#define WPCN381U_BASE1_LO_REGISTER 0x61 // Device BaseAddres Re= gister #1 LSB Address -#define WPCN381U_BASE2_HI_REGISTER 0x62 // Device BaseAddres Re= gister #1 MSB Address -#define WPCN381U_BASE2_LO_REGISTER 0x63 // Device Ba1eAddres Re= gister #1 LSB Address -#define WPCN381U_IRQ1_REGISTER 0x70 // Device IRQ Register = #1 Address -#define WPCN381U_IRQ2_REGISTER 0x71 // Device IRQ Register = #2 Address - -// -// SIO Activation Values -// -#define WPCN381U_ACTIVATE_VALUE 0x01 // Value to activate De= vice -#define WPCN381U_DEACTIVATE_VALUE 0x00 // Value to deactivate = Device - -// -// SIO GPIO -// -#define WPCN381U_GPIO_BASE_ADDRESS 0x0A20 // SIO GPIO Base Address - -// -// SIO Serial Port Settings -// -#define WPCN381U_SERIAL_PORT0_BASE_ADDRESS 0x03F8 // Base Address of Seri= al Port 0 (COMA / UART0) -#define WPCN381U_SERIAL_PORT1_BASE_ADDRESS 0x02F8 // Base Address of Seri= al Port 1 (COMB / UART1) - -#endif +/** @file + Header file of Serial port hardware definition. + + Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
+ = =20 + This program and the accompanying materials are licensed and made availa= ble under + the terms and conditions of the BSD License that accompanies this distri= bution. =20 + The full text of the license may be found at = =20 + http://opensource.org/licenses/bsd-license.php. = =20 + = =20 + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. =20 + = =20 +**/ + +#ifndef _SIO_INIT_H_ +#define _SIO_INIT_H_ + +#define WPCN381U_CONFIG_INDEX 0x2E +#define WPCN381U_CONFIG_DATA 0x2F +#define WPCN381U_CONFIG_INDEX1 0x164E +#define WPCN381U_CONFIG_DATA1 0x164F +#define WPCN381U_CHIP_ID 0xF4 +#define WDCP376_CHIP_ID 0xF1 + +// +// SIO Logical Devices Numbers +// +#define WPCN381U_LDN_UART0 0x03 // LDN for Serial Port = Controller +#define WPCN381U_LDN_UART1 0x02 // LDN for Parallel Por= t Controller +#define WPCN381U_LDN_PS2K 0x06 // LDN for PS2 Keyboard= Controller +#define WPCN381U_LDN_PS2M 0x05 // LDN for PS2 Mouse Co= ntroller +#define WPCN381U_KB_BASE1_ADDRESS 0x60 // Base Address of KB c= ontroller +#define WPCN381U_KB_BASE2_ADDRESS 0x64 // Base Address of KB c= ontroller +#define SIO_KBC_CLOCK 0x01 // 0/1/2 - 8/12/16 MHz = KBC Clock Source +#define WPCN381U_LDN_GPIO 0x07 // LDN for GPIO + +// +// SIO Registers Layout +// +#define WPCN381U_LD_SEL_REGISTER 0x07 // Logical Device Selec= t Register Address +#define WPCN381U_DEV_ID_REGISTER 0x20 // Device Identificatio= n Register Address +#define WPCN381U_ACTIVATE_REGISTER 0x30 // Device Identificatio= n Register Address +#define WPCN381U_BASE1_HI_REGISTER 0x60 // Device BaseAddres Re= gister #1 MSB Address +#define WPCN381U_BASE1_LO_REGISTER 0x61 // Device BaseAddres Re= gister #1 LSB Address +#define WPCN381U_BASE2_HI_REGISTER 0x62 // Device BaseAddres Re= gister #1 MSB Address +#define WPCN381U_BASE2_LO_REGISTER 0x63 // Device Ba1eAddres Re= gister #1 LSB Address +#define WPCN381U_IRQ1_REGISTER 0x70 // Device IRQ Register = #1 Address +#define WPCN381U_IRQ2_REGISTER 0x71 // Device IRQ Register = #2 Address + +// +// SIO Activation Values +// +#define WPCN381U_ACTIVATE_VALUE 0x01 // Value to activate De= vice +#define WPCN381U_DEACTIVATE_VALUE 0x00 // Value to deactivate = Device + +// +// SIO GPIO +// +#define WPCN381U_GPIO_BASE_ADDRESS 0x0A20 // SIO GPIO Base Address + +// +// SIO Serial Port Settings +// +#define WPCN381U_SERIAL_PORT0_BASE_ADDRESS 0x03F8 // Base Address of Seri= al Port 0 (COMA / UART0) +#define WPCN381U_SERIAL_PORT1_BASE_ADDRESS 0x02F8 // Base Address of Seri= al Port 1 (COMB / UART1) + +#endif diff --git a/Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.h b/Vlv2Tb= ltDevicePkg/MonoStatusCode/PlatformStatusCode.h index 51e13e03d..b83c71fbf 100644 --- a/Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.h +++ b/Vlv2TbltDevicePkg/MonoStatusCode/PlatformStatusCode.h @@ -1,207 +1,144 @@ -/*++ - - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- = =20 - This program and the accompanying materials are licensed and made availa= ble under - the terms and conditions of the BSD License that accompanies this distri= bution. =20 - The full text of the license may be found at = =20 - http://opensource.org/licenses/bsd-license.php. = =20 - = =20 - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. =20 - = =20 - -Module Name: - - PlatformStatusCode.h - -Abstract: - - Contains Platform specific implementations required to use status codes. - ---*/ - -#ifndef _PLATFORM_STATUS_CODE_H_ -#define _PLATFORM_STATUS_CODE_H_ - - -#define CONFIG_PORT0 0x4E -#define INDEX_PORT0 0x4E -#define DATA_PORT0 0x4F -#define PCI_IDX 0xCF8 -#define PCI_DAT 0xCFC - -#include "MonoStatusCode.h" - -/*++ - -Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved - = =20 - This program and the accompanying materials are licensed and made availa= ble under - the terms and conditions of the BSD License that accompanies this distri= bution. =20 - The full text of the license may be found at = =20 - http://opensource.org/licenses/bsd-license.php. = =20 - = =20 - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. =20 - = =20 -This software and associated documentation (if any) is furnished -under a license and may only be used or copied in accordance -with the terms of the license. Except as permitted by such -license, no part of this software or documentation may be -reproduced, stored in a retrieval system, or transmitted in any -form or by any means without the express written consent of -Intel Corporation. - - -Module Name: - - Port80StatusCodeLib.h - -Abstract: - - Lib to provide status code reporting via port 80. - ---*/ - -#ifndef _PEI_PORT_80_STATUS_CODE_H_ -#define _PEI_PORT_80_STATUS_CODE_H_ - - - -// -// Status code reporting function -// -EFI_STATUS -Port80ReportStatusCode ( - IN CONST EFI_PEI_SERVICES **PeiServices, - IN EFI_STATUS_CODE_TYPE CodeType, - IN EFI_STATUS_CODE_VALUE Value, - IN UINT32 Instance, - IN CONST EFI_GUID * CallerId, - IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL - ); - -#endif - -/*++ - -Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved - = =20 - This program and the accompanying materials are licensed and made availa= ble under - the terms and conditions of the BSD License that accompanies this distri= bution. =20 - The full text of the license may be found at = =20 - http://opensource.org/licenses/bsd-license.php. = =20 - = =20 - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. =20 - = =20 -This software and associated documentation (if any) is furnished -under a license and may only be used or copied in accordance -with the terms of the license. Except as permitted by such -license, no part of this software or documentation may be -reproduced, stored in a retrieval system, or transmitted in any -form or by any means without the express written consent of -Intel Corporation. - - -Module Name: - - SerialStatusCodeLib.h - -Abstract: - - Lib to provide Serial I/O status code reporting. - ---*/ - -#ifndef _PEI_SERIAL_STATUS_CODE_LIB_H_ -#define _PEI_SERIAL_STATUS_CODE_LIB_H_ - - -#include -#include -#include -#include -#include - -// -// Initialization function -// -VOID -SerialInitializeStatusCode ( - VOID - ); - -// -// Status code reporting function -// -EFI_STATUS -SerialReportStatusCode ( - IN CONST EFI_PEI_SERVICES **PeiServices, - IN EFI_STATUS_CODE_TYPE CodeType, - IN EFI_STATUS_CODE_VALUE Value, - IN UINT32 Instance, - IN CONST EFI_GUID * CallerId, - IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL - ); - -#endif - -extern EFI_PEI_PROGRESS_CODE_PPI mStatusCodePpi; -extern EFI_PEI_PPI_DESCRIPTOR mPpiListStatusCode; -#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8)) -#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGN= ATURE_16 (C, D) << 16)) -#define STATUSCODE_PEIM_SIGNATURE EFI_SIGNATURE_32 ('p', 's', 't', 'c') - -typedef struct { - UINT32 Signature; - EFI_FFS_FILE_HEADER *FfsHeader; - EFI_PEI_NOTIFY_DESCRIPTOR StatusCodeNotify; -} STATUSCODE_CALLBACK_STATE_INFORMATION; - -#pragma pack(1) -typedef struct { - UINT16 Limit; - UINT32 Base; -} GDT_DSCRIPTOR; -#pragma pack() - -#define STATUSCODE_PEIM_FROM_THIS(a) \ - BASE_CR ( \ - a, \ - STATUSCODE_CALLBACK_STATE_INFORMATION, \ - StatusCodeNotify \ - ) - -VOID -EFIAPI -PlatformInitializeStatusCode ( - IN EFI_FFS_FILE_HEADER *FfsHeader, - IN CONST EFI_PEI_SERVICES **PeiServices - ); - - -// -// Function declarations -// -/** - Install Firmware Volume Hob's once there is main memory - - @param PeiServices General purpose services available to every PE= IM. - @param NotifyDescriptor Not Used - @param Ppi Not Used - - @retval Status EFI_SUCCESS if the interface could be successf= ully - installed - -**/ -EFI_STATUS -EFIAPI -MemoryDiscoveredPpiNotifyCallback ( - IN EFI_PEI_SERVICES **PeiServices, - IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, - IN VOID *Ppi - ); - -#endif +/*++ + + Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.
+ = =20 + This program and the accompanying materials are licensed and made availa= ble under + the terms and conditions of the BSD License that accompanies this distri= bution. =20 + The full text of the license may be found at = =20 + http://opensource.org/licenses/bsd-license.php. = =20 + = =20 + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, = =20 + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. =20 + = =20 + +Module Name: + + PlatformStatusCode.h + +Abstract: + + Contains Platform specific implementations required to use status codes. + +--*/ + +#ifndef _PLATFORM_STATUS_CODE_H_ +#define _PLATFORM_STATUS_CODE_H_ + + +#define CONFIG_PORT0 0x4E +#define INDEX_PORT0 0x4E +#define DATA_PORT0 0x4F +#define PCI_IDX 0xCF8 +#define PCI_DAT 0xCFC + +#include "MonoStatusCode.h" +#ifndef _PEI_PORT_80_STATUS_CODE_H_ +#define _PEI_PORT_80_STATUS_CODE_H_ + + + +// +// Status code reporting function +// +EFI_STATUS +Port80ReportStatusCode ( + IN CONST EFI_PEI_SERVICES **PeiServices, + IN EFI_STATUS_CODE_TYPE CodeType, + IN EFI_STATUS_CODE_VALUE Value, + IN UINT32 Instance, + IN CONST EFI_GUID * CallerId, + IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL + ); + +#endif + +#ifndef _PEI_SERIAL_STATUS_CODE_LIB_H_ +#define _PEI_SERIAL_STATUS_CODE_LIB_H_ + + +#include +#include +#include +#include +#include + +// +// Initialization function +// +VOID +SerialInitializeStatusCode ( + VOID + ); + +// +// Status code reporting function +// +EFI_STATUS +SerialReportStatusCode ( + IN CONST EFI_PEI_SERVICES **PeiServices, + IN EFI_STATUS_CODE_TYPE CodeType, + IN EFI_STATUS_CODE_VALUE Value, + IN UINT32 Instance, + IN CONST EFI_GUID * CallerId, + IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL + ); + +#endif + +extern EFI_PEI_PROGRESS_CODE_PPI mStatusCodePpi; +extern EFI_PEI_PPI_DESCRIPTOR mPpiListStatusCode; +#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8)) +#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGN= ATURE_16 (C, D) << 16)) +#define STATUSCODE_PEIM_SIGNATURE EFI_SIGNATURE_32 ('p', 's', 't', 'c') + +typedef struct { + UINT32 Signature; + EFI_FFS_FILE_HEADER *FfsHeader; + EFI_PEI_NOTIFY_DESCRIPTOR StatusCodeNotify; +} STATUSCODE_CALLBACK_STATE_INFORMATION; + +#pragma pack(1) +typedef struct { + UINT16 Limit; + UINT32 Base; +} GDT_DSCRIPTOR; +#pragma pack() + +#define STATUSCODE_PEIM_FROM_THIS(a) \ + BASE_CR ( \ + a, \ + STATUSCODE_CALLBACK_STATE_INFORMATION, \ + StatusCodeNotify \ + ) + +VOID +EFIAPI +PlatformInitializeStatusCode ( + IN EFI_FFS_FILE_HEADER *FfsHeader, + IN CONST EFI_PEI_SERVICES **PeiServices + ); + + +// +// Function declarations +// +/** + Install Firmware Volume Hob's once there is main memory + + @param PeiServices General purpose services available to every PE= IM. + @param NotifyDescriptor Not Used + @param Ppi Not Used + + @retval Status EFI_SUCCESS if the interface could be successf= ully + installed + +**/ +EFI_STATUS +EFIAPI +MemoryDiscoveredPpiNotifyCallback ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, + IN VOID *Ppi + ); + +#endif --=20 2.14.1.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel