From nobody Sun Apr 28 14:34:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1512545515758438.87408973029585; Tue, 5 Dec 2017 23:31:55 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C3DFC2035627E; Tue, 5 Dec 2017 23:27:21 -0800 (PST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5BE85220FB33F for ; Tue, 5 Dec 2017 23:27:20 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Dec 2017 23:31:51 -0800 Received: from jwang36-mobl2.ccr.corp.intel.com ([10.239.192.49]) by fmsmga002.fm.intel.com with ESMTP; 05 Dec 2017 23:31:48 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,367,1508828400"; d="scan'208";a="1252390292" From: Jian J Wang To: edk2-devel@lists.01.org Date: Wed, 6 Dec 2017 15:31:18 +0800 Message-Id: <20171206073120.2248-2-jian.j.wang@intel.com> X-Mailer: git-send-email 2.15.1.windows.2 In-Reply-To: <20171206073120.2248-1-jian.j.wang@intel.com> References: <20171206073120.2248-1-jian.j.wang@intel.com> Subject: [edk2] [PATCH 1/3] IntelFrameworkPkg/LegacyBios.h: Add a macro to guarantee page 0 access X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael D Kinney , Liming Gao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Due to the introduction of NULL pointer detection feature, page 0 will be disabled if the feature is enabled, which will cause legacy code failed to update legacy data in page 0. This macro is introduced to make sure the page 0 is enabled before those code and restore the original status of it afterwards. Another reason to introduce this macro is to eliminate the dependency on the PcdNullPointerDetectionPropertyMask. Because this is a new PCD, it could cause some backward compatibility issue for some old packages. This macro will simply check if the page 0 is disabled or not. If it's disabled, it will enable it before code updating page 0 and disable it afterwards. Otherwise, this macro will do nothing to page 0. The usage of the macro will be look like (similar to DEBUG_CODE macro): ACCESS_PAGE0_CODE( { } ); Cc: Liming Gao Cc: Michael D Kinney Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- IntelFrameworkPkg/Include/Protocol/LegacyBios.h | 34 +++++++++++++++++++++= ++++ 1 file changed, 34 insertions(+) diff --git a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h b/IntelFramewo= rkPkg/Include/Protocol/LegacyBios.h index 641f101bce..f77c92ba21 100644 --- a/IntelFrameworkPkg/Include/Protocol/LegacyBios.h +++ b/IntelFrameworkPkg/Include/Protocol/LegacyBios.h @@ -1518,6 +1518,40 @@ struct _EFI_LEGACY_BIOS_PROTOCOL { EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice; }; =20 +// +// Legacy BIOS needs to access memory in page 0 (0-4095), which is disable= d if +// NULL pointer detection feature is enabled. Following macro can be used = to +// enable/disable page 0 before/after accessing it. +// +#define ACCESS_PAGE0_CODE(statements) \ + do { \ + EFI_STATUS Status_; \ + EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc_; \ + \ + Status_ =3D gDS->GetMemorySpaceDescriptor (0, &Desc_); \ + if (!EFI_ERROR (Status_)) { \ + if ((Desc_.Attributes & EFI_MEMORY_RP) !=3D 0) { \ + Status_ =3D gDS->SetMemorySpaceAttributes ( \ + 0, \ + EFI_PAGES_TO_SIZE(1), \ + Desc_.Attributes &=3D ~EFI_MEMORY_RP \ + ); \ + ASSERT_EFI_ERROR (Status_); \ + } \ + \ + statements; \ + \ + if ((Desc_.Attributes & EFI_MEMORY_RP) !=3D 0) { \ + Status_ =3D gDS->SetMemorySpaceAttributes ( \ + 0, \ + EFI_PAGES_TO_SIZE(1), \ + Desc_.Attributes \ + ); \ + ASSERT_EFI_ERROR (Status_); \ + } \ + } \ + } while (FALSE) + extern EFI_GUID gEfiLegacyBiosProtocolGuid; =20 #endif --=20 2.15.1.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sun Apr 28 14:34:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1512545518537282.1664951266357; Tue, 5 Dec 2017 23:31:58 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 0C4D42218E93D; Tue, 5 Dec 2017 23:27:23 -0800 (PST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6187D220FB33F for ; Tue, 5 Dec 2017 23:27:21 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Dec 2017 23:31:52 -0800 Received: from jwang36-mobl2.ccr.corp.intel.com ([10.239.192.49]) by fmsmga002.fm.intel.com with ESMTP; 05 Dec 2017 23:31:50 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,367,1508828400"; d="scan'208";a="1252390306" From: Jian J Wang To: edk2-devel@lists.01.org Date: Wed, 6 Dec 2017 15:31:19 +0800 Message-Id: <20171206073120.2248-3-jian.j.wang@intel.com> X-Mailer: git-send-email 2.15.1.windows.2 In-Reply-To: <20171206073120.2248-1-jian.j.wang@intel.com> References: <20171206073120.2248-1-jian.j.wang@intel.com> Subject: [edk2] [PATCH 2/3] IntelFrameworkModulePkg/LegacyBiosDxe: Use macro to enable/disable page 0 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael D Kinney , Liming Gao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Current implementation uses following two methods EnableNullDetection() DisableNullDetection() to enable/disable page 0. These two methods will check PCD PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or no= t. This is due to the fact that old GCD service doesn't provide paging related attributes of memory block. Since this issue has been fixed, GCD services can be used to determine the paging status of page 0. This is also make it possible to just use a new macro ACCESS_PAGE0_CODE( { } ); to replace above methods to do the same job, which also makes code more readability. Cc: Liming Gao Cc: Michael D Kinney Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- .../Csm/LegacyBiosDxe/LegacyBda.c | 53 ++++---- .../Csm/LegacyBiosDxe/LegacyBios.c | 135 ++---------------= ---- .../Csm/LegacyBiosDxe/LegacyBiosDxe.inf | 1 - .../Csm/LegacyBiosDxe/LegacyBiosInterface.h | 16 --- .../Csm/LegacyBiosDxe/LegacyBootSupport.c | 80 ++++++------ .../Csm/LegacyBiosDxe/LegacyPci.c | 72 ++++++----- IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c | 51 ++++---- 7 files changed, 135 insertions(+), 273 deletions(-) diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c b/IntelF= rameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c index c6670febee..9667dc2a0f 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBda.c @@ -34,37 +34,36 @@ LegacyBiosInitBda ( BDA_STRUC *Bda; UINT8 *Ebda; =20 - DisableNullDetection (); - Bda =3D (BDA_STRUC *) ((UINTN) 0x400); Ebda =3D (UINT8 *) ((UINTN) 0x9fc00); =20 - ZeroMem (Bda, 0x100); + ACCESS_PAGE0_CODE ({ + ZeroMem (Bda, 0x100); + // + // 640k-1k for EBDA + // + Bda->MemSize =3D 0x27f; + Bda->KeyHead =3D 0x1e; + Bda->KeyTail =3D 0x1e; + Bda->FloppyData =3D 0x00; + Bda->FloppyTimeout =3D 0xff; + + Bda->KeyStart =3D 0x001E; + Bda->KeyEnd =3D 0x003E; + Bda->KeyboardStatus =3D 0x10; + Bda->Ebda =3D 0x9fc0; + + // + // Move LPT time out here and zero out LPT4 since some SCSI OPROMS + // use this as scratch pad (LPT4 is Reserved) + // + Bda->Lpt1_2Timeout =3D 0x1414; + Bda->Lpt3_4Timeout =3D 0x1400; + + }); + ZeroMem (Ebda, 0x400); - // - // 640k-1k for EBDA - // - Bda->MemSize =3D 0x27f; - Bda->KeyHead =3D 0x1e; - Bda->KeyTail =3D 0x1e; - Bda->FloppyData =3D 0x00; - Bda->FloppyTimeout =3D 0xff; - - Bda->KeyStart =3D 0x001E; - Bda->KeyEnd =3D 0x003E; - Bda->KeyboardStatus =3D 0x10; - Bda->Ebda =3D 0x9fc0; - - // - // Move LPT time out here and zero out LPT4 since some SCSI OPROMS - // use this as scratch pad (LPT4 is Reserved) - // - Bda->Lpt1_2Timeout =3D 0x1414; - Bda->Lpt3_4Timeout =3D 0x1400; - - *Ebda =3D 0x01; - - EnableNullDetection (); + *Ebda =3D 0x01; =20 return EFI_SUCCESS; } diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c b/Intel= FrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c index c6461f5547..d50c15eacb 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBios.c @@ -786,115 +786,6 @@ ToggleEndOfDxeStatus ( return; } =20 -// -// Legacy BIOS needs to access memory between 0-4095, which will cause page -// fault exception if NULL pointer detection mechanism is enabled. Followi= ng -// functions can be used to disable/enable NULL pointer detection before/a= fter -// accessing those memory. -// - -/** - Enable NULL pointer detection. -**/ -VOID -EnableNullDetection ( - VOID - ) -{ - EFI_STATUS Status; - EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc; - - if (((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) =3D=3D 0) - || - ((mEndOfDxe) && - ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT7|BIT0)) - =3D=3D (BIT7|BIT0))) - ) { - return; - } - - // - // Check current capabilities and attributes - // - Status =3D gDS->GetMemorySpaceDescriptor (0, &Desc); - ASSERT_EFI_ERROR (Status); - - // - // Try to add EFI_MEMORY_RP support if necessary - // - if ((Desc.Capabilities & EFI_MEMORY_RP) =3D=3D 0) { - Desc.Capabilities |=3D EFI_MEMORY_RP; - Status =3D gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1), - Desc.Capabilities); - ASSERT_EFI_ERROR (Status); - if (EFI_ERROR (Status)) { - return; - } - } - - // - // Don't bother if EFI_MEMORY_RP is already set. - // - if ((Desc.Attributes & EFI_MEMORY_RP) =3D=3D 0) { - Desc.Attributes |=3D EFI_MEMORY_RP; - Status =3D gDS->SetMemorySpaceAttributes (0, EFI_PAGES_TO_SIZE(1), - Desc.Attributes); - ASSERT_EFI_ERROR (Status); - } -} - -/** - Disable NULL pointer detection. -**/ -VOID -DisableNullDetection ( - VOID - ) -{ - EFI_STATUS Status; - EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc; - - if (((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) =3D=3D 0) - || - ((mEndOfDxe) && - ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT7|BIT0)) - =3D=3D (BIT7|BIT0))) - ) { - return; - } - - // - // Check current capabilities and attributes - // - Status =3D gDS->GetMemorySpaceDescriptor (0, &Desc); - ASSERT_EFI_ERROR (Status); - - // - // Try to add EFI_MEMORY_RP support if necessary - // - if ((Desc.Capabilities & EFI_MEMORY_RP) =3D=3D 0) { - Desc.Capabilities |=3D EFI_MEMORY_RP; - Status =3D gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1), - Desc.Capabilities); - ASSERT_EFI_ERROR (Status); - if (EFI_ERROR (Status)) { - return; - } - } - - // - // Don't bother if EFI_MEMORY_RP is already cleared. - // - if ((Desc.Attributes & EFI_MEMORY_RP) !=3D 0) { - Desc.Attributes &=3D ~EFI_MEMORY_RP; - Status =3D gDS->SetMemorySpaceAttributes (0, EFI_PAGES_TO_SIZE(1), - Desc.Attributes); - ASSERT_EFI_ERROR (Status); - } else { - DEBUG ((DEBUG_WARN, "!!! Page 0 is supposed to be disabled !!!\r\n")); - } -} - /** Install Driver to produce Legacy BIOS protocol. =20 @@ -1095,10 +986,10 @@ LegacyBiosInstall ( // Initialize region from 0x0000 to 4k. This initializes interrupt vector // range. // - DisableNullDetection (); - gBS->SetMem ((VOID *) ClearPtr, 0x400, INITIAL_VALUE_BELOW_1K); - ZeroMem ((VOID *) ((UINTN)ClearPtr + 0x400), 0xC00); - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + gBS->SetMem ((VOID *) ClearPtr, 0x400, INITIAL_VALUE_BELOW_1K); + ZeroMem ((VOID *) ((UINTN)ClearPtr + 0x400), 0xC00); + }); =20 // // Allocate pages for OPROM usage @@ -1237,16 +1128,14 @@ LegacyBiosInstall ( // // Save Unexpected interrupt vector so can restore it just prior to boot // - DisableNullDetection (); - - BaseVectorMaster =3D (UINT32 *) (sizeof (UINT32) * PROTECTED_MODE_BASE_V= ECTOR_MASTER); - Private->BiosUnexpectedInt =3D BaseVectorMaster[0]; - IntRedirCode =3D (UINT32) (UINTN) Private->IntThunk->InterruptRedirectio= nCode; - for (Index =3D 0; Index < 8; Index++) { - BaseVectorMaster[Index] =3D (EFI_SEGMENT (IntRedirCode + Index * 4) <<= 16) | EFI_OFFSET (IntRedirCode + Index * 4); - } - - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + BaseVectorMaster =3D (UINT32 *) (sizeof (UINT32) * PROTECTED_MODE_BASE= _VECTOR_MASTER); + Private->BiosUnexpectedInt =3D BaseVectorMaster[0]; + IntRedirCode =3D (UINT32) (UINTN) Private->IntThunk->InterruptRedirect= ionCode; + for (Index =3D 0; Index < 8; Index++) { + BaseVectorMaster[Index] =3D (EFI_SEGMENT (IntRedirCode + Index * 4) = << 16) | EFI_OFFSET (IntRedirCode + Index * 4); + } + }); =20 // // Save EFI value diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf b/= IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf index 6efc7f36ae..180c18e3fc 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf @@ -148,7 +148,6 @@ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdHighPmmMemorySize = ## CONSUMES gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemoryBase = ## CONSUMES gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemorySize = ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask = ## CONSUMES =20 [Depex] gEfiLegacyRegion2ProtocolGuid AND gEfiLegacyInterruptProtocolGuid AND gE= fiLegacyBiosPlatformProtocolGuid AND gEfiLegacy8259ProtocolGuid AND gEfiGen= ericMemTestProtocolGuid AND gEfiCpuArchProtocolGuid AND gEfiTimerArchProtoc= olGuid AND gEfiVariableWriteArchProtocolGuid diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.= h b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h index 86a3b09080..cc2fc9fc13 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h @@ -1544,20 +1544,4 @@ LegacyBiosInstallVgaRom ( IN LEGACY_BIOS_INSTANCE *Private ); =20 -/** - Enable NULL pointer detection. -**/ -VOID -EnableNullDetection ( - VOID - ); - -/** - Disable NULL pointer detection. -**/ -VOID -DisableNullDetection ( - VOID - ); - #endif diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c = b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c index c2ac69ce69..d65a751fe7 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBootSupport.c @@ -1041,7 +1041,9 @@ GenericLegacyBoot ( // // Setup BDA and EBDA standard areas before Legacy Boot // - LegacyBiosCompleteBdaBeforeBoot (Private); + ACCESS_PAGE0_CODE ({ + LegacyBiosCompleteBdaBeforeBoot (Private); + }); LegacyBiosCompleteStandardCmosBeforeBoot (Private); =20 // @@ -1073,10 +1075,10 @@ GenericLegacyBoot ( // Use 182/10 to avoid floating point math. // LocalTime =3D (LocalTime * 182) / 10; - DisableNullDetection (); - BdaPtr =3D (UINT32 *) (UINTN)0x46C; - *BdaPtr =3D LocalTime; - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + BdaPtr =3D (UINT32 *) (UINTN)0x46C; + *BdaPtr =3D LocalTime; + }); =20 // // Shadow PCI ROMs. We must do this near the end since this will kick @@ -1322,15 +1324,15 @@ GenericLegacyBoot ( // set of TIANO vectors) or takes it over. // // - DisableNullDetection (); - BaseVectorMaster =3D (UINT32 *) (sizeof (UINT32) * PROTECTED_MODE_BASE= _VECTOR_MASTER); - for (Index =3D 0; Index < 8; Index++) { - Private->ThunkSavedInt[Index] =3D BaseVectorMaster[Index]; - if (Private->ThunkSeg =3D=3D (UINT16) (BaseVectorMaster[Index] >> 16= )) { - BaseVectorMaster[Index] =3D (UINT32) (Private->BiosUnexpectedInt); + ACCESS_PAGE0_CODE ({ + BaseVectorMaster =3D (UINT32 *) (sizeof (UINT32) * PROTECTED_MODE_BA= SE_VECTOR_MASTER); + for (Index =3D 0; Index < 8; Index++) { + Private->ThunkSavedInt[Index] =3D BaseVectorMaster[Index]; + if (Private->ThunkSeg =3D=3D (UINT16) (BaseVectorMaster[Index] >> = 16)) { + BaseVectorMaster[Index] =3D (UINT32) (Private->BiosUnexpectedInt= ); + } } - } - EnableNullDetection (); + }); =20 ZeroMem (&Regs, sizeof (EFI_IA32_REGISTER_SET)); Regs.X.AX =3D Legacy16Boot; @@ -1344,12 +1346,12 @@ GenericLegacyBoot ( 0 ); =20 - DisableNullDetection (); - BaseVectorMaster =3D (UINT32 *) (sizeof (UINT32) * PROTECTED_MODE_BASE= _VECTOR_MASTER); - for (Index =3D 0; Index < 8; Index++) { - BaseVectorMaster[Index] =3D Private->ThunkSavedInt[Index]; - } - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + BaseVectorMaster =3D (UINT32 *) (sizeof (UINT32) * PROTECTED_MODE_BA= SE_VECTOR_MASTER); + for (Index =3D 0; Index < 8; Index++) { + BaseVectorMaster[Index] =3D Private->ThunkSavedInt[Index]; + } + }); } Private->LegacyBootEntered =3D TRUE; if ((mBootMode =3D=3D BOOT_LEGACY_OS) || (mBootMode =3D=3D BOOT_UNCONVEN= TIONAL_DEVICE)) { @@ -1737,11 +1739,11 @@ LegacyBiosBuildE820 ( // // First entry is 0 to (640k - EBDA) // - DisableNullDetection (); - E820Table[0].BaseAddr =3D 0; - E820Table[0].Length =3D (UINT64) ((*(UINT16 *) (UINTN)0x40E) << 4); - E820Table[0].Type =3D EfiAcpiAddressRangeMemory; - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + E820Table[0].BaseAddr =3D 0; + E820Table[0].Length =3D (UINT64) ((*(UINT16 *) (UINTN)0x40E) << 4); + E820Table[0].Type =3D EfiAcpiAddressRangeMemory; + }); =20 // // Second entry is (640k - EBDA) to 640k @@ -1975,8 +1977,6 @@ LegacyBiosCompleteBdaBeforeBoot ( UINT16 MachineConfig; DEVICE_PRODUCER_DATA_HEADER *SioPtr; =20 - DisableNullDetection (); - Bda =3D (BDA_STRUC *) ((UINTN) 0x400); MachineConfig =3D 0; =20 @@ -2035,8 +2035,6 @@ LegacyBiosCompleteBdaBeforeBoot ( MachineConfig =3D (UINT16) (MachineConfig + 0x00 + 0x02 + (SioPtr-= >MousePresent * 0x04)); Bda->MachineConfig =3D MachineConfig; =20 - EnableNullDetection (); - return EFI_SUCCESS; } =20 @@ -2063,17 +2061,15 @@ LegacyBiosUpdateKeyboardLedStatus ( =20 Private =3D LEGACY_BIOS_INSTANCE_FROM_THIS (This); =20 - DisableNullDetection (); - - Bda =3D (BDA_STRUC *) ((UINTN) 0x400); - LocalLeds =3D Leds; - Bda->LedStatus =3D (UINT8) ((Bda->LedStatus &~0x07) | LocalLeds); - LocalLeds =3D (UINT8) (LocalLeds << 4); - Bda->ShiftStatus =3D (UINT8) ((Bda->ShiftStatus &~0x70) | LocalLeds); - LocalLeds =3D (UINT8) (Leds & 0x20); - Bda->KeyboardStatus =3D (UINT8) ((Bda->KeyboardStatus &~0x20) | LocalLed= s); - - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + Bda =3D (BDA_STRUC *) ((UINTN) 0x400); + LocalLeds =3D Leds; + Bda->LedStatus =3D (UINT8) ((Bda->LedStatus &~0x07) | LocalLeds); + LocalLeds =3D (UINT8) (LocalLeds << 4); + Bda->ShiftStatus =3D (UINT8) ((Bda->ShiftStatus &~0x70) | LocalLeds= ); + LocalLeds =3D (UINT8) (Leds & 0x20); + Bda->KeyboardStatus =3D (UINT8) ((Bda->KeyboardStatus &~0x20) | LocalL= eds); + }); =20 // // Call into Legacy16 code to allow it to do any processing @@ -2119,9 +2115,9 @@ LegacyBiosCompleteStandardCmosBeforeBoot ( // to large capacity drives // CMOS 14 =3D BDA 40:10 plus bit 3(display enabled) // - DisableNullDetection (); - Bda =3D (UINT8)(*((UINT8 *)((UINTN)0x410)) | BIT3); - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + Bda =3D (UINT8)(*((UINT8 *)((UINTN)0x410)) | BIT3); + }); =20 // // Force display enabled diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c b/IntelF= rameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c index d38cef3e33..c317d21055 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c @@ -2403,35 +2403,33 @@ LegacyBiosInstallRom ( // 2. BBS compliants drives will not change 40:75 until boot time. // 3. Onboard IDE controllers will change 40:75 // - DisableNullDetection (); - - LocalDiskStart =3D (UINT8) ((*(UINT8 *) ((UINTN) 0x475)) + 0x80); - if ((Private->Disk4075 + 0x80) < LocalDiskStart) { - // - // Update table since onboard IDE drives found - // - Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciSegment= =3D 0xff; - Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciBus = =3D 0xff; - Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciDevice = =3D 0xff; - Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciFunctio= n =3D 0xff; - Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].StartDrive= Number =3D (UINT8) (Private->Disk4075 + 0x80); - Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].EndDriveNu= mber =3D LocalDiskStart; - Private->LegacyEfiHddTableIndex ++; - Private->Disk4075 =3D (UINT8) (LocalDiskStart & 0x7f); - Private->DiskEnd =3D LocalDiskStart; - } - - if (PciHandle !=3D mVgaHandle) { + ACCESS_PAGE0_CODE ({ + LocalDiskStart =3D (UINT8) ((*(UINT8 *) ((UINTN) 0x475)) + 0x80); + if ((Private->Disk4075 + 0x80) < LocalDiskStart) { + // + // Update table since onboard IDE drives found + // + Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciSegme= nt =3D 0xff; + Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciBus = =3D 0xff; + Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciDevic= e =3D 0xff; + Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciFunct= ion =3D 0xff; + Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].StartDri= veNumber =3D (UINT8) (Private->Disk4075 + 0x80); + Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].EndDrive= Number =3D LocalDiskStart; + Private->LegacyEfiHddTableIndex ++; + Private->Disk4075 =3D (UINT8) (LocalDiskStart & 0x7f); + Private->DiskEnd =3D LocalDiskStart; + } =20 - EnablePs2Keyboard (); + if (PciHandle !=3D mVgaHandle) { =20 - // - // Store current mode settings since PrepareToScanRom may change mode. - // - VideoMode =3D *(UINT8 *) ((UINTN) (0x400 + BDA_VIDEO_MODE)); - } + EnablePs2Keyboard (); =20 - EnableNullDetection (); + // + // Store current mode settings since PrepareToScanRom may change mod= e. + // + VideoMode =3D *(UINT8 *) ((UINTN) (0x400 + BDA_VIDEO_MODE)); + } + }); =20 // // Notify the platform that we are about to scan the ROM @@ -2473,11 +2471,11 @@ LegacyBiosInstallRom ( // Multiply result by 18.2 for number of ticks since midnight. // Use 182/10 to avoid floating point math. // - DisableNullDetection (); - LocalTime =3D (LocalTime * 182) / 10; - BdaPtr =3D (UINT32 *) ((UINTN) 0x46C); - *BdaPtr =3D LocalTime; - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + LocalTime =3D (LocalTime * 182) / 10; + BdaPtr =3D (UINT32 *) ((UINTN) 0x46C); + *BdaPtr =3D LocalTime; + }); =20 // // Pass in handoff data @@ -2573,9 +2571,9 @@ LegacyBiosInstallRom ( // // Set mode settings since PrepareToScanRom may change mode // - DisableNullDetection (); - OldVideoMode =3D *(UINT8 *) ((UINTN) (0x400 + BDA_VIDEO_MODE)); - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + OldVideoMode =3D *(UINT8 *) ((UINTN) (0x400 + BDA_VIDEO_MODE)); + }); =20 if (VideoMode !=3D OldVideoMode) { // @@ -2617,9 +2615,9 @@ LegacyBiosInstallRom ( } } =20 - DisableNullDetection (); - LocalDiskEnd =3D (UINT8) ((*(UINT8 *) ((UINTN) 0x475)) + 0x80); - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + LocalDiskEnd =3D (UINT8) ((*(UINT8 *) ((UINTN) 0x475)) + 0x80); + }); =20 // // Allow platform to perform any required actions after the diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c b/IntelFrame= workModulePkg/Csm/LegacyBiosDxe/Thunk.c index d249479c56..d975d94e70 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c @@ -73,10 +73,10 @@ LegacyBiosInt86 ( // The base address of legacy interrupt vector table is 0. // We use this base address to get the legacy interrupt handler. // - DisableNullDetection (); - Segment =3D (UINT16)(((UINT32 *)0)[BiosInt] >> 16); - Offset =3D (UINT16)((UINT32 *)0)[BiosInt]; - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + Segment =3D (UINT16)(((UINT32 *)0)[BiosInt] >> 16); + Offset =3D (UINT16)((UINT32 *)0)[BiosInt]; + }); =20 return InternalLegacyBiosFarCall ( This, @@ -286,29 +286,6 @@ InternalLegacyBiosFarCall ( =20 AsmThunk16 (&mThunkContext); =20 - // - // OPROM may allocate EBDA range by itself and change EBDA base and EBDA= size. - // Get the current EBDA base address, and compared with pre-allocate min= imum - // EBDA base address, if the current EBDA base address is smaller, it in= dicates - // PcdEbdaReservedMemorySize should be adjusted to larger for more OPROM= s. - // - DEBUG_CODE ( - { - UINTN EbdaBaseAddress; - UINTN ReservedEbdaBaseAddress; - - // - // Skip this part of debug code if NULL pointer detection is enabled - // - if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) =3D=3D 0)= { - EbdaBaseAddress =3D (*(UINT16 *) (UINTN) 0x40E) << 4; - ReservedEbdaBaseAddress =3D CONVENTIONAL_MEMORY_TOP - - PcdGet32 (PcdEbdaReservedMemorySize); - ASSERT (ReservedEbdaBaseAddress <=3D EbdaBaseAddress); - } - } - ); - if (Stack !=3D NULL && StackSize !=3D 0) { // // Copy low memory stack to Stack @@ -334,6 +311,26 @@ InternalLegacyBiosFarCall ( // gBS->RestoreTPL (OriginalTpl); =20 + // + // OPROM may allocate EBDA range by itself and change EBDA base and EBDA= size. + // Get the current EBDA base address, and compared with pre-allocate min= imum + // EBDA base address, if the current EBDA base address is smaller, it in= dicates + // PcdEbdaReservedMemorySize should be adjusted to larger for more OPROM= s. + // + DEBUG_CODE ( + { + UINTN EbdaBaseAddress; + UINTN ReservedEbdaBaseAddress; + + ACCESS_PAGE0_CODE ({ + EbdaBaseAddress =3D (*(UINT16 *) (UINTN) 0x40E) << 4; + ReservedEbdaBaseAddress =3D CONVENTIONAL_MEMORY_TOP + - PcdGet32 (PcdEbdaReservedMemorySize); + ASSERT (ReservedEbdaBaseAddress <=3D EbdaBaseAddress); + }); + } + ); + // // Restore interrupt of debug timer // --=20 2.15.1.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sun Apr 28 14:34:52 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 151254552097118.900044622511928; Tue, 5 Dec 2017 23:32:00 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 479D120352A9B; Tue, 5 Dec 2017 23:27:25 -0800 (PST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 588B920352A97 for ; Tue, 5 Dec 2017 23:27:23 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Dec 2017 23:31:55 -0800 Received: from jwang36-mobl2.ccr.corp.intel.com ([10.239.192.49]) by fmsmga002.fm.intel.com with ESMTP; 05 Dec 2017 23:31:52 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=jian.j.wang@intel.com; receiver=edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,367,1508828400"; d="scan'208";a="1252390314" From: Jian J Wang To: edk2-devel@lists.01.org Date: Wed, 6 Dec 2017 15:31:20 +0800 Message-Id: <20171206073120.2248-4-jian.j.wang@intel.com> X-Mailer: git-send-email 2.15.1.windows.2 In-Reply-To: <20171206073120.2248-1-jian.j.wang@intel.com> References: <20171206073120.2248-1-jian.j.wang@intel.com> Subject: [edk2] [PATCH 3/3] IntelFrameworkModulePkg/KeyboardDxe: Use macro to enable/disable page 0 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael D Kinney , Liming Gao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Current implementation uses following two methods EnableNullDetection() DisableNullDetection() to enable/disable page 0. These two methods will check PCD PcdNullPointerDetectionPropertyMask to know if the page 0 is disabled or no= t. This is due to the fact that old GCD service doesn't provide paging related attributes of memory block. Since this issue has been fixed, GCD services can be used to determine the paging status of page 0. This is also make it possible to just use a new macro ACCESS_PAGE0_CODE( { } ); to replace above methods to do the same job, which also makes code more readability. Cc: Liming Gao Cc: Michael D Kinney Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- .../Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c | 118 ++---------------= ---- .../Csm/BiosThunk/KeyboardDxe/KeyboardDxe.inf | 1 - 2 files changed, 10 insertions(+), 109 deletions(-) diff --git a/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard= .c b/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c index ebf03d30c1..c7797acfb8 100644 --- a/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c +++ b/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/BiosKeyboard.c @@ -1732,98 +1732,6 @@ CheckKeyboardConnect ( } } =20 -/** - Disable NULL pointer detection. -**/ -VOID -DisableNullDetection ( - VOID - ) -{ - EFI_STATUS Status; - EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc; - - if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) =3D=3D 0) { - return; - } - - // - // Check current capabilities and attributes - // - Status =3D gDS->GetMemorySpaceDescriptor (0, &Desc); - ASSERT_EFI_ERROR (Status); - - // - // Try to add EFI_MEMORY_RP support if necessary - // - if ((Desc.Capabilities & EFI_MEMORY_RP) =3D=3D 0) { - Desc.Capabilities |=3D EFI_MEMORY_RP; - Status =3D gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1), - Desc.Capabilities); - ASSERT_EFI_ERROR (Status); - if (EFI_ERROR (Status)) { - return; - } - } - - // - // Don't bother if EFI_MEMORY_RP is already cleared. - // - if ((Desc.Attributes & EFI_MEMORY_RP) !=3D 0) { - Desc.Attributes &=3D ~EFI_MEMORY_RP; - Status =3D gDS->SetMemorySpaceAttributes (0, EFI_PAGES_TO_SIZE(1), - Desc.Attributes); - ASSERT_EFI_ERROR (Status); - } else { - DEBUG ((DEBUG_WARN, "!!! Page 0 is supposed to be disabled !!!\r\n")); - } -} - -/** - Enable NULL pointer detection. -**/ -VOID -EnableNullDetection ( - VOID - ) -{ - EFI_STATUS Status; - EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc; - - if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT0) =3D=3D 0) { - return; - } - - // - // Check current capabilities and attributes - // - Status =3D gDS->GetMemorySpaceDescriptor (0, &Desc); - ASSERT_EFI_ERROR (Status); - - // - // Try to add EFI_MEMORY_RP support if necessary - // - if ((Desc.Capabilities & EFI_MEMORY_RP) =3D=3D 0) { - Desc.Capabilities |=3D EFI_MEMORY_RP; - Status =3D gDS->SetMemorySpaceCapabilities (0, EFI_PAGES_TO_SIZE(1), - Desc.Capabilities); - ASSERT_EFI_ERROR (Status); - if (EFI_ERROR (Status)) { - return; - } - } - - // - // Don't bother if EFI_MEMORY_RP is already set. - // - if ((Desc.Attributes & EFI_MEMORY_RP) =3D=3D 0) { - Desc.Attributes |=3D EFI_MEMORY_RP; - Status =3D gDS->SetMemorySpaceAttributes (0, EFI_PAGES_TO_SIZE(1), - Desc.Attributes); - ASSERT_EFI_ERROR (Status); - } -} - /** Timer event handler: read a series of key stroke from 8042 and put them into memory key buffer.=20 @@ -1931,16 +1839,13 @@ BiosKeyboardTimerHandler ( // 0 Right Shift pressed =20 =20 - // - // Disable NULL pointer detection temporarily - // - DisableNullDetection (); - // // Clear the CTRL and ALT BDA flag // - KbFlag1 =3D *((UINT8 *) (UINTN) 0x417); // read the STATUS FLAGS 1 - KbFlag2 =3D *((UINT8 *) (UINTN) 0x418); // read STATUS FLAGS 2 + ACCESS_PAGE0_CODE ({ + KbFlag1 =3D *((UINT8 *) (UINTN) 0x417); // read the STATUS FLAGS 1 + KbFlag2 =3D *((UINT8 *) (UINTN) 0x418); // read STATUS FLAGS 2 + }); =20 DEBUG_CODE ( { @@ -2008,15 +1913,12 @@ BiosKeyboardTimerHandler ( // // Clear left alt and left ctrl BDA flag // - KbFlag2 &=3D ~(KB_LEFT_ALT_PRESSED | KB_LEFT_CTRL_PRESSED); - *((UINT8 *) (UINTN) 0x418) =3D KbFlag2; - KbFlag1 &=3D ~0x0C; =20 - *((UINT8 *) (UINTN) 0x417) =3D KbFlag1;=20 - - // - // Restore NULL pointer detection - // - EnableNullDetection (); + ACCESS_PAGE0_CODE ({ + KbFlag2 &=3D ~(KB_LEFT_ALT_PRESSED | KB_LEFT_CTRL_PRESSED); + *((UINT8 *) (UINTN) 0x418) =3D KbFlag2; + KbFlag1 &=3D ~0x0C; + *((UINT8 *) (UINTN) 0x417) =3D KbFlag1; + }); =20 // // Output EFI input key and shift/toggle state diff --git a/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/KeyboardDxe.= inf b/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/KeyboardDxe.inf index 596f4ced44..eaaedbfa9c 100644 --- a/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/KeyboardDxe.inf +++ b/IntelFrameworkModulePkg/Csm/BiosThunk/KeyboardDxe/KeyboardDxe.inf @@ -74,7 +74,6 @@ =20 [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdFastPS2Detection ## S= OMETIMES_CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask ## C= ONSUMES =20 [UserExtensions.TianoCore."ExtraFiles"] KeyboardDxeExtra.uni --=20 2.15.1.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel