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31 Jul 2017 21:32:07 -0700 Received: from shwdeopenpsi014.ccr.corp.intel.com ([10.239.9.13]) by orsmga002.jf.intel.com with ESMTP; 31 Jul 2017 21:32:06 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,305,1498546800"; d="scan'208";a="117974498" From: Hao Wu To: edk2-devel@lists.01.org Date: Tue, 1 Aug 2017 12:32:02 +0800 Message-Id: <20170801043203.23040-2-hao.a.wu@intel.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20170801043203.23040-1-hao.a.wu@intel.com> References: <20170801043203.23040-1-hao.a.wu@intel.com> Subject: [edk2] [PATCH 1/2] IntelSiliconPkg/IntelVTdDxe: Fix typo for VTd IOTLB domain ID X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hao Wu , Jiewen Yao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Cc: Jiewen Yao Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu Reviewed-by: jiewen.yao@intel.com --- IntelSiliconPkg/IntelVTdDxe/VtdReg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/IntelSiliconPkg/IntelVTdDxe/VtdReg.c b/IntelSiliconPkg/IntelVT= dDxe/VtdReg.c index 456a039bcd..d19aea2cc1 100644 --- a/IntelSiliconPkg/IntelVTdDxe/VtdReg.c +++ b/IntelSiliconPkg/IntelVTdDxe/VtdReg.c @@ -158,7 +158,7 @@ InvalidateVtdIOTLBDomain ( =20 Reg64 &=3D ((~B_IOTLB_REG_IVT) & (~B_IOTLB_REG_IIRG_MASK)); Reg64 |=3D (B_IOTLB_REG_IVT | V_IOTLB_REG_IIRG_DOMAIN); - Reg64 |=3D DomainIdentifier; + Reg64 |=3D LShiftU64 (DomainIdentifier, 32); MmioWrite64 (mVtdUnitInformation[VtdIndex].VtdUnitBaseAddress + (mVtdUni= tInformation[VtdIndex].ECapReg.Bits.IRO * 16) + R_IOTLB_REG, Reg64); =20 do { --=20 2.12.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Fri May 3 05:42:03 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; 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31 Jul 2017 21:32:07 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,305,1498546800"; d="scan'208";a="117974506" From: Hao Wu To: edk2-devel@lists.01.org Date: Tue, 1 Aug 2017 12:32:03 +0800 Message-Id: <20170801043203.23040-3-hao.a.wu@intel.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20170801043203.23040-1-hao.a.wu@intel.com> References: <20170801043203.23040-1-hao.a.wu@intel.com> Subject: [edk2] [PATCH 2/2] IntelSiliconPkg/IntelVTdDxe: Add explicit NULL pointer checks X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hao Wu , Jiewen Yao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add explicit NULL pointer check to make the codes more straight-forward. Cc: Jiewen Yao Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu Reviewed-by: jiewen.yao@intel.com --- IntelSiliconPkg/IntelVTdDxe/TranslationTable.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c b/IntelSiliconP= kg/IntelVTdDxe/TranslationTable.c index 0cff2cc939..5af4a4627b 100644 --- a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c +++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c @@ -862,6 +862,8 @@ SetAccessAttribute ( VTD_SECOND_LEVEL_PAGING_ENTRY *SecondLevelPagingEntry; UINT64 Pt; =20 + SecondLevelPagingEntry =3D NULL; + DEBUG ((DEBUG_INFO,"SetAccessAttribute (S%04x B%02x D%02x F%02x) (0x%016= lx - 0x%08x, %x)\n", Segment, SourceId.Bits.Bus, SourceId.Bits.Device, Sour= ceId.Bits.Function, BaseAddress, (UINTN)Length, IoMmuAccess)); =20 VtdIndex =3D FindVtdIndexByPciDevice (Segment, SourceId, &ExtContextEntr= y, &ContextEntry); @@ -884,7 +886,7 @@ SetAccessAttribute ( SecondLevelPagingEntry =3D (VOID *)(UINTN)LShiftU64 (ExtContextEntry= ->Bits.SecondLevelPageTranslationPointer, 12); DEBUG ((DEBUG_VERBOSE,"SecondLevelPagingEntry - 0x%x (S%04x B%02x D%= 02x F%02x)\n", SecondLevelPagingEntry, Segment, SourceId.Bits.Bus, SourceId= .Bits.Device, SourceId.Bits.Function)); } - } else { + } else if (ContextEntry !=3D NULL) { if (ContextEntry->Bits.Present =3D=3D 0) { SecondLevelPagingEntry =3D CreateSecondLevelPagingEntry (VtdIndex, 0= ); DEBUG ((DEBUG_VERBOSE,"SecondLevelPagingEntry - 0x%x (S%04x B%02x D%= 02x F%02x) New\n", SecondLevelPagingEntry, Segment, SourceId.Bits.Bus, Sour= ceId.Bits.Device, SourceId.Bits.Function)); @@ -959,7 +961,7 @@ AlwaysEnablePageAttribute ( ExtContextEntry->Bits.SecondLevelPageTranslationPointer =3D Pt; ExtContextEntry->Bits.DomainIdentifier =3D ((1 << (UINT8)((UINTN)mVtdU= nitInformation[VtdIndex].CapReg.Bits.ND * 2 + 4)) - 1); ExtContextEntry->Bits.Present =3D 1; - } else { + } else if (ContextEntry !=3D NULL) { ContextEntry->Bits.SecondLevelPageTranslationPointer =3D Pt; ContextEntry->Bits.DomainIdentifier =3D ((1 << (UINT8)((UINTN)mVtdUnit= Information[VtdIndex].CapReg.Bits.ND * 2 + 4)) - 1); ContextEntry->Bits.Present =3D 1; --=20 2.12.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel