From nobody Thu May 2 23:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1523558899270742.3887260724367; Thu, 12 Apr 2018 11:48:19 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 7A8AE226EAC71; Thu, 12 Apr 2018 11:48:16 -0700 (PDT) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id A9BC122729625 for ; Thu, 12 Apr 2018 11:48:14 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7E41D1596; Thu, 12 Apr 2018 11:48:14 -0700 (PDT) Received: from usa.arm.com (a74716-lin.blr.arm.com [10.162.4.145]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 618633F5AD; Thu, 12 Apr 2018 11:48:13 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=thomas.abraham@arm.com; receiver=edk2-devel@lists.01.org From: Thomas Abraham To: edk2-devel@lists.01.org Date: Fri, 13 Apr 2018 00:17:38 +0530 Message-Id: <1523558863-5427-2-git-send-email-thomas.abraham@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> References: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> Subject: [edk2] [PATCH edk2-platforms v2 1/6] Platform/ARM/Sgi: Add Platform library implementation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add initial SGI platform library support. This includes the virtual memory map and helper functions for platform intialization. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Thomas Abraham --- Platform/ARM/SgiPkg/Include/SgiPlatform.h | 63 ++++++++++++ .../SgiPkg/Library/PlatformLib/AArch64/Helper.S | 65 ++++++++++++ Platform/ARM/SgiPkg/Library/PlatformLib/Mem.c | 111 +++++++++++++++++= ++++ Platform/ARM/SgiPkg/Library/PlatformLib/Platform.c | 72 +++++++++++++ .../ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 56 +++++++++++ 5 files changed, 367 insertions(+) create mode 100644 Platform/ARM/SgiPkg/Include/SgiPlatform.h create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/Mem.c create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/Platform.c create mode 100644 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPk= g/Include/SgiPlatform.h new file mode 100644 index 0000000..86994d5 --- /dev/null +++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h @@ -0,0 +1,63 @@ +/** @file +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made avail= able +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef __SGI_PLATFORM_H__ +#define __SGI_PLATFORM_H__ + +/*************************************************************************= ********** +// Platform Memory Map +**************************************************************************= **********/ + +// Expansion AXI - SMC Chip Select 0 +#define SGI_EXP_SMC_CS0_BASE 0x08000000 +#define SGI_EXP_SMC_CS0_SZ SIZE_64MB + +// Expansion AXI - SMSC 91C111 (Ethernet) +#define SGI_EXP_SMSC91X_BASE 0x18000000 +#define SGI_EXP_SMSC91X_SZ SIZE_64MB + +// Expansion AXI - System peripherals +#define SGI_EXP_SYS_PERIPH_BASE 0x1C000000 +#define SGI_EXP_SYS_PERIPH_SZ SIZE_2MB + +#define SGI_EXP_SYSPH_VIRTIO_BLOCK_BASE 0x1c130000 + +// Sub System Peripherals - UART0 +#define SGI_SUBSYS_UART0_BASE 0x2A400000 +#define SGI_SUBSYS_UART0_SZ 0x00010000 + +// Sub System Peripherals - UART1 +#define SGI_SUBSYS_UART1_BASE 0x2A410000 +#define SGI_SUBSYS_UART1_SZ 0x00010000 + +// Sub System Peripherals - Generic Watchdog +#define SGI_SUBSYS_GENERIC_WDOG_BASE 0x2A440000 +#define SGI_SUBSYS_GENERIC_WDOG_SZ SIZE_128KB + +// Sub System Peripherals - GIC +#define SGI_SUBSYS_GENERIC_GIC_BASE 0x30000000 +#define SGI_SUBSYS_GENERIC_GICR_BASE 0x300C0000 +#define SGI_SUBSYS_GENERIC_GIC_SZ SIZE_1MB + +// Expansion AXI - Platform Peripherals - UART0 +#define SGI_EXP_PLAT_PERIPH_UART0_BASE 0x7FF70000 +#define SGI_EXP_PLAT_PERIPH_UART0_SZ SIZE_64KB + +// Expansion AXI - Platform Peripherals - UART1 +#define SGI_EXP_PLAT_PERIPH_UART1_BASE 0x7FF80000 +#define SGI_EXP_PLAT_PERIPH_UART1_SZ SIZE_64KB + +#define ARM_PLATFORM_WATCHDOG_COUNT 2 + +#endif // __SGI_PLATFORM_H__ diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S b/Pla= tform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S new file mode 100644 index 0000000..9537bb0 --- /dev/null +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/AArch64/Helper.S @@ -0,0 +1,65 @@ +/** @file +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made avail= able +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#include +#include + +.text +.align 3 + +GCC_ASM_EXPORT(ArmPlatformPeiBootAction) +GCC_ASM_EXPORT(ArmPlatformGetCorePosition) +GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) +GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) + +// +// First platform specific function to be called in the PEI phase +// +// This function is actually the first function called by the PrePi +// or PrePeiCore modules. It allows to retrieve arguments passed to +// the UEFI firmware through the CPU registers. +// +ASM_PFX(ArmPlatformPeiBootAction): + ret + +//UINTN +//ArmPlatformGetCorePosition ( +// IN UINTN MpId +// ); +// With this function: CorePos =3D (ClusterId * 2) + CoreId +ASM_PFX(ArmPlatformGetCorePosition): + and x1, x0, #ARM_CORE_MASK + and x0, x0, #ARM_CLUSTER_MASK + add x0, x1, x0, LSR #7 + ret + +//UINTN +//ArmPlatformGetPrimaryCoreMpId ( +// VOID +// ); +ASM_PFX(ArmPlatformGetPrimaryCoreMpId): + MOV32 (w0, FixedPcdGet32(PcdArmPrimaryCore)) + ret + +//UINTN +//ArmPlatformIsPrimaryCore ( +// IN UINTN MpId +// ); +ASM_PFX(ArmPlatformIsPrimaryCore): + MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCoreMask)) + and x0, x0, x1 + MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCore)) + cmp w0, w1 + cset x0, eq + ret diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/Mem.c b/Platform/ARM/S= giPkg/Library/PlatformLib/Mem.c new file mode 100644 index 0000000..124742b --- /dev/null +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/Mem.c @@ -0,0 +1,111 @@ +/** @file +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made avail= able +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#include +#include +#include +#include +#include +#include + +#include + +// The total number of descriptors, including the final "end-of-table" des= criptor. +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 8 + +// DDR attributes +#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_= BACK +#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACH= ED_UNBUFFERED + +/** + Return the Virtual Memory Map of your platform + + This Virtual Memory Map is used by MemoryInitPei Module to initialize th= e MMU on your platform. + + @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR = describing a Physical-to- + Virtual Memory mapping. This array mus= t be ended by a zero-filled + entry + +**/ +VOID +ArmPlatformGetVirtualMemoryMap ( + IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap + ) +{ + ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes; + UINTN Index =3D 0; + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; + + ASSERT (VirtualMemoryMap !=3D NULL); + + VirtualMemoryTable =3D (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages (EFI= _SIZE_TO_PAGES ( + sizeof (ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_M= AP_DESCRIPTORS ) ); + if (VirtualMemoryTable =3D=3D NULL) { + return; + } + + CacheAttributes =3D DDR_ATTRIBUTES_CACHED; + + // Expansion AXI - SMC Chip Select 0 (NOR Flash) + VirtualMemoryTable[Index].PhysicalBase =3D SGI_EXP_SMC_CS0_BASE; + VirtualMemoryTable[Index].VirtualBase =3D SGI_EXP_SMC_CS0_BASE; + VirtualMemoryTable[Index].Length =3D SIZE_64MB; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE; + + // Expansion AXI - SMSC 91X (Ethernet) + VirtualMemoryTable[++Index].PhysicalBase =3D SGI_EXP_SMSC91X_BASE; + VirtualMemoryTable[Index].VirtualBase =3D SGI_EXP_SMSC91X_BASE; + VirtualMemoryTable[Index].Length =3D SGI_EXP_SMSC91X_SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE; + + // Expansion AXI - System Peripherals + VirtualMemoryTable[++Index].PhysicalBase =3D SGI_EXP_SYS_PERIPH_BASE; + VirtualMemoryTable[Index].VirtualBase =3D SGI_EXP_SYS_PERIPH_BASE; + VirtualMemoryTable[Index].Length =3D SGI_EXP_SYS_PERIPH_SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE; + + // Sub System Peripherals - Generic Watchdog + VirtualMemoryTable[++Index].PhysicalBase =3D SGI_SUBSYS_GENERIC_WDOG_BA= SE; + VirtualMemoryTable[Index].VirtualBase =3D SGI_SUBSYS_GENERIC_WDOG_BA= SE; + VirtualMemoryTable[Index].Length =3D SGI_SUBSYS_GENERIC_WDOG_SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE; + + // Sub System Peripherals - GIC-600 + VirtualMemoryTable[++Index].PhysicalBase =3D SGI_SUBSYS_GENERIC_GIC_BAS= E; + VirtualMemoryTable[Index].VirtualBase =3D SGI_SUBSYS_GENERIC_GIC_BAS= E; + VirtualMemoryTable[Index].Length =3D SGI_SUBSYS_GENERIC_GIC_SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE; + + // Expansion AXI - Platform Peripherals - UART1 + VirtualMemoryTable[++Index].PhysicalBase =3D SGI_EXP_PLAT_PERIPH_UART1_= BASE; + VirtualMemoryTable[Index].VirtualBase =3D SGI_EXP_PLAT_PERIPH_UART1_= BASE; + VirtualMemoryTable[Index].Length =3D SGI_EXP_PLAT_PERIPH_UART1_= SZ; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE; + + // DDR - (2GB - 16MB) + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdSystemMemoryB= ase); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdSystemMemoryB= ase); + VirtualMemoryTable[Index].Length =3D PcdGet64 (PcdSystemMemoryS= ize); + VirtualMemoryTable[Index].Attributes =3D CacheAttributes; + + // End of Table + VirtualMemoryTable[++Index].PhysicalBase =3D 0; + VirtualMemoryTable[Index].VirtualBase =3D 0; + VirtualMemoryTable[Index].Length =3D 0; + VirtualMemoryTable[Index].Attributes =3D (ARM_MEMORY_REGION_ATTRIBU= TES)0; + + ASSERT ( (Index + 1) <=3D MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS); + + *VirtualMemoryMap =3D VirtualMemoryTable; +} diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/Platform.c b/Platform/= ARM/SgiPkg/Library/PlatformLib/Platform.c new file mode 100644 index 0000000..6b29768 --- /dev/null +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/Platform.c @@ -0,0 +1,72 @@ +/** @file +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made avail= able +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#include +#include +#include + +STATIC ARM_CORE_INFO mCoreInfoTable[] =3D { + { + // Cluster 0, Core 0 + 0x0, 0x0, + }, +}; + +EFI_BOOT_MODE +ArmPlatformGetBootMode ( + VOID + ) +{ + return BOOT_WITH_FULL_CONFIGURATION; +} + +RETURN_STATUS +ArmPlatformInitialize ( + IN UINTN MpId + ) +{ + return RETURN_SUCCESS; +} + +EFI_STATUS +PrePeiCoreGetMpCoreInfo ( + OUT UINTN *CoreCount, + OUT ARM_CORE_INFO **ArmCoreTable + ) +{ + *CoreCount =3D 1; + *ArmCoreTable =3D mCoreInfoTable; + return EFI_SUCCESS; +} + +STATIC EFI_GUID mArmMpCoreInfoPpiGuid =3D ARM_MP_CORE_INFO_PPI_GUID; +STATIC ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi =3D { PrePeiCoreGetMpCoreInfo }; + +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] =3D { + { + EFI_PEI_PPI_DESCRIPTOR_PPI, + &mArmMpCoreInfoPpiGuid, + &mMpCoreInfoPpi + } +}; + +VOID +ArmPlatformGetPlatformPpiList ( + OUT UINTN *PpiListSize, + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList + ) +{ + *PpiListSize =3D sizeof (gPlatformPpiTable); + *PpiList =3D gPlatformPpiTable; +} diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Plat= form/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf new file mode 100644 index 0000000..c4b7719 --- /dev/null +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf @@ -0,0 +1,56 @@ +# +# Copyright (c) 2018, ARM Limited. All rights reserved. +# +# This program and the accompanying materials are licensed and made avail= able +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D ArmSgiLib + FILE_GUID =3D 1d0ee1e1-d791-4ecf-a43e-a9c76e674264 + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D ArmPlatformLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + edk2-platforms/Platform/ARM/SgiPkg/SgiPlatform.dec + +[LibraryClasses] + IoLib + ArmLib + DebugLib + HobLib + MemoryAllocationLib + SerialPortLib + +[Sources.common] + Platform.c + Mem.c + +[Sources.AARCH64] + AArch64/Helper.S | GCC + +[FixedPcd] + gArmPlatformTokenSpaceGuid.PcdClusterCount + gArmPlatformTokenSpaceGuid.PcdCoreCount + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase + gArmTokenSpaceGuid.PcdFvBaseAddress + gArmTokenSpaceGuid.PcdArmPrimaryCore + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask + + [Guids] + gEfiHobListGuid ## CONSUMES ## SystemTable --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu May 2 23:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1523558902012240.43378609881927; Thu, 12 Apr 2018 11:48:22 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id B6249226EAC82; Thu, 12 Apr 2018 11:48:17 -0700 (PDT) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id 603F5226EAC6A for ; Thu, 12 Apr 2018 11:48:16 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3E1C680D; Thu, 12 Apr 2018 11:48:16 -0700 (PDT) Received: from usa.arm.com (a74716-lin.blr.arm.com [10.162.4.145]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E084D3F5AD; Thu, 12 Apr 2018 11:48:14 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=thomas.abraham@arm.com; receiver=edk2-devel@lists.01.org From: Thomas Abraham To: edk2-devel@lists.01.org Date: Fri, 13 Apr 2018 00:17:39 +0530 Message-Id: <1523558863-5427-3-git-send-email-thomas.abraham@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> References: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> Subject: [edk2] [PATCH edk2-platforms v2 2/6] Platform/ARM/Sgi: add NOR flash platform library implementation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Vishwanatha HG Add a initial NOR flash driver platform wrapper as part of the platform library. Access to NOR fash 0 is enabled in this initial implementation. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Vishwanatha HG Signed-off-by: Thomas Abraham --- Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlash.c | 60 ++++++++++++++++++= ++++ .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf | 33 ++++++++++++ 2 files changed, 93 insertions(+) create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlash.c create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf diff --git a/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlash.c b/Platform/= ARM/SgiPkg/Library/NorFlashLib/NorFlash.c new file mode 100644 index 0000000..5d7efea --- /dev/null +++ b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlash.c @@ -0,0 +1,60 @@ +/** @file + + Copyright (c) 2018, ARM Ltd. All rights reserved. + + This program and the accompanying materials are licensed and made availa= ble + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + + **/ + +#include +#include +#include +#include +#include + +STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] =3D { + { + SGI_EXP_SMC_CS0_BASE, + SGI_EXP_SMC_CS0_BASE, + SIZE_256KB * 255, + SIZE_256KB, + {0xEBF0B9DF, 0x17d0, 0x4812, { 0xA9, 0x59, 0xCF, 0xD7, 0x92, 0xEE, 0x3= 1, 0x13} } + }, + { + SGI_EXP_SMC_CS0_BASE, + SGI_EXP_SMC_CS0_BASE + SIZE_256KB * 255, + SIZE_64KB * 4, + SIZE_64KB, + {0x98C111C6, 0xB322, 0x4C33, { 0x95, 0xD5, 0xAF, 0x56, 0xAF, 0x90, 0x1= 8, 0x6A } } + }, +}; + +EFI_STATUS +NorFlashPlatformInitialization ( + VOID + ) +{ + return EFI_SUCCESS; +} + +EFI_STATUS +NorFlashPlatformGetDevices ( + OUT NOR_FLASH_DESCRIPTION **NorFlashDevices, + OUT UINT32 *Count + ) +{ + if ((NorFlashDevices =3D=3D NULL) || (Count =3D=3D NULL)) { + return EFI_INVALID_PARAMETER; + } + + *NorFlashDevices =3D mNorFlashDevices; + *Count =3D sizeof (mNorFlashDevices) / sizeof (NOR_FLASH_DESCRIPTION); + + return EFI_SUCCESS; +} diff --git a/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf b/Plat= form/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf new file mode 100644 index 0000000..a860e5c --- /dev/null +++ b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf @@ -0,0 +1,33 @@ +#/** @file +# +# Copyright (c) 2018, ARM Ltd. All rights reserved. + +# This program and the accompanying materials are licensed and made avail= able +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +#**/ + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D NorFlashSgiLib + FILE_GUID =3D 3f021755-6d74-4065-9ee4-98225267b36e + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D NorFlashPlatformLib + +[Sources.common] + NorFlash.c + +[Packages] + MdePkg/MdePkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + +[LibraryClasses] + BaseLib + DebugLib + IoLib --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu May 2 23:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1523558904530810.1080164751663; Thu, 12 Apr 2018 11:48:24 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E8296226EAC9A; Thu, 12 Apr 2018 11:48:18 -0700 (PDT) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id 1C7F622729625 for ; Thu, 12 Apr 2018 11:48:18 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F09F91596; Thu, 12 Apr 2018 11:48:17 -0700 (PDT) Received: from usa.arm.com (a74716-lin.blr.arm.com [10.162.4.145]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9E3773F5AD; Thu, 12 Apr 2018 11:48:16 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=thomas.abraham@arm.com; receiver=edk2-devel@lists.01.org From: Thomas Abraham To: edk2-devel@lists.01.org Date: Fri, 13 Apr 2018 00:17:40 +0530 Message-Id: <1523558863-5427-4-git-send-email-thomas.abraham@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> References: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> Subject: [edk2] [PATCH edk2-platforms v2 3/6] Platform/ARM/Sgi: add initial platform dxe driver implementation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Daniil Egranov Add a initial platform dxe driver which starts of being almost an empty implemenation. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Daniil Egranov Signed-off-by: Thomas Abraham --- .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 25 ++++++++ .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 74 ++++++++++++++++++= ++++ 2 files changed, 99 insertions(+) create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platfo= rm/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c new file mode 100644 index 0000000..2da768a --- /dev/null +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c @@ -0,0 +1,25 @@ +/** @file +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made avail= able +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#include + +EFI_STATUS +EFIAPI +ArmSgiPkgEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + return EFI_SUCCESS; +} diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Plat= form/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf new file mode 100644 index 0000000..379d7f4 --- /dev/null +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf @@ -0,0 +1,74 @@ +# +# Copyright (c) 2018, ARM Limited. All rights reserved. +# +# This program and the accompanying materials are licensed and made avail= able +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D PlatformDxe + FILE_GUID =3D 54cee352-c4cd-4d80-8524-54325c3a528e + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D ArmSgiPkgEntryPoint + +[Sources.common] + PlatformDxe.c + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + edk2-platforms/Platform/ARM/SgiPkg/SgiPlatform.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec + +[LibraryClasses] + AcpiLib + BaseMemoryLib + DebugLib + DxeServicesTableLib + FdtLib + HobLib + IoLib + PcdLib + PrintLib + SerialPortLib + UefiBootServicesTableLib + UefiRuntimeServicesTableLib + UefiLib + UefiDriverEntryPoint + VirtioMmioDeviceLib + +[Guids] + #gArmGlobalVariableGuid + gEfiEndOfDxeEventGroupGuid + gEfiFileInfoGuid + gEfiHobListGuid + gFdtTableGuid + gEfiAcpi10TableGuid + gEfiAcpiTableGuid + +[Protocols] + gEfiBlockIoProtocolGuid + gEfiDevicePathFromTextProtocolGuid + gEfiSimpleFileSystemProtocolGuid + +[FeaturePcd] + gArmSgiTokenSpaceGuid.PcdVirtioSupported + +[FixedPcd] + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize + + gArmTokenSpaceGuid.PcdHypFvBaseAddress + gArmTokenSpaceGuid.PcdHypFvSize + +[Depex] + TRUE --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu May 2 23:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1523558907571218.6924709632899; Thu, 12 Apr 2018 11:48:27 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 2487E226EAC7E; Thu, 12 Apr 2018 11:48:21 -0700 (PDT) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id D3D1022729612 for ; Thu, 12 Apr 2018 11:48:19 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B2D2680D; Thu, 12 Apr 2018 11:48:19 -0700 (PDT) Received: from usa.arm.com (a74716-lin.blr.arm.com [10.162.4.145]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5D1643F5AD; Thu, 12 Apr 2018 11:48:18 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=thomas.abraham@arm.com; receiver=edk2-devel@lists.01.org From: Thomas Abraham To: edk2-devel@lists.01.org Date: Fri, 13 Apr 2018 00:17:41 +0530 Message-Id: <1523558863-5427-5-git-send-email-thomas.abraham@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> References: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> Subject: [edk2] [PATCH edk2-platforms v2 4/6] Platform/ARM/Sgi: add support for virtio block device X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Daniil Egranov Add the registration of the virtio block device. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Daniil Egranov Signed-off-by: Thomas Abraham --- .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 18 ++++- .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 1 + .../ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c | 76 ++++++++++++++++++= ++++ 3 files changed, 94 insertions(+), 1 deletion(-) create mode 100644 Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platfo= rm/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c index 2da768a..5d54f06 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c @@ -15,11 +15,27 @@ #include =20 EFI_STATUS +InitVirtioBlockIo ( + IN EFI_HANDLE ImageHandle + ); + +EFI_STATUS EFIAPI ArmSgiPkgEntryPoint ( IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable ) { - return EFI_SUCCESS; + EFI_STATUS Status; + + // Install Virtio Block IO. + if ( FeaturePcdGet (PcdVirtioSupported) =3D=3D TRUE ) { + Status =3D InitVirtioBlockIo (ImageHandle); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install Virtio Block IO= \n")); + return Status; + } + } + + return Status; } diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf b/Plat= form/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf index 379d7f4..534947f 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf @@ -20,6 +20,7 @@ =20 [Sources.common] PlatformDxe.c + VirtioBlockIo.c =20 [Packages] ArmPkg/ArmPkg.dec diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c b/Plat= form/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c new file mode 100644 index 0000000..eb00225 --- /dev/null +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/VirtioBlockIo.c @@ -0,0 +1,76 @@ +/** @file + + Copyright (c) 2018, ARM Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made availa= ble + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include +#include +#include +#include +#include + +#pragma pack (1) +typedef struct { + VENDOR_DEVICE_PATH Vendor; + EFI_DEVICE_PATH_PROTOCOL End; +} VIRTIO_BLK_DEVICE_PATH; +#pragma pack () + +STATIC VIRTIO_BLK_DEVICE_PATH mVirtioBlockDevicePath =3D +{ + { + { + HARDWARE_DEVICE_PATH, + HW_VENDOR_DP, + { + (UINT8)( sizeof (VENDOR_DEVICE_PATH) ), + (UINT8)( (sizeof (VENDOR_DEVICE_PATH) ) >> 8) + } + }, + EFI_CALLER_ID_GUID, + }, + { + END_DEVICE_PATH_TYPE, + END_ENTIRE_DEVICE_PATH_SUBTYPE, + { + sizeof (EFI_DEVICE_PATH_PROTOCOL), + 0 + } + } +}; + +/** + * Entrypoint for 'VirtioBlockIo' driver + */ +EFI_STATUS +InitVirtioBlockIo ( + IN EFI_HANDLE ImageHandle + ) +{ + EFI_STATUS Status =3D 0; + + Status =3D gBS->InstallProtocolInterface (&ImageHandle, + &gEfiDevicePathProtocolGuid, EFI_NATIVE_INTERFACE, + &mVirtioBlockDevicePath); + + if (EFI_ERROR (Status)) { + return Status; + } + + // Declare the Virtio BlockIo device + Status =3D VirtioMmioInstallDevice (SGI_EXP_SYSPH_VIRTIO_BLOCK_BASE, Ima= geHandle); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install Virtio block devi= ce\n")); + } + + return Status; +} --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu May 2 23:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1523558910838531.2284187189653; Thu, 12 Apr 2018 11:48:30 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 68E74226EAC99; Thu, 12 Apr 2018 11:48:23 -0700 (PDT) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id 96D0A2272960E for ; Thu, 12 Apr 2018 11:48:21 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 767221596; Thu, 12 Apr 2018 11:48:21 -0700 (PDT) Received: from usa.arm.com (a74716-lin.blr.arm.com [10.162.4.145]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1E7D73F5AD; Thu, 12 Apr 2018 11:48:19 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=thomas.abraham@arm.com; receiver=edk2-devel@lists.01.org From: Thomas Abraham To: edk2-devel@lists.01.org Date: Fri, 13 Apr 2018 00:17:42 +0530 Message-Id: <1523558863-5427-6-git-send-email-thomas.abraham@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> References: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> Subject: [edk2] [PATCH edk2-platforms v2 5/6] Platform/ARM/Sgi: add the initial set of acpi tables X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Daniil Egranov Add the initial version of Acpi tables for the SGI-575 platform which is required to boot the linux kernel up to a busybox prompt. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Daniil Egranov Signed-off-by: Thomas Abraham --- .../ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf | 50 +++++++ Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc | 89 +++++++++++++ Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl | 99 ++++++++++++++ Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc | 87 +++++++++++++ Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc | 144 +++++++++++++++++= ++++ Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc | 127 ++++++++++++++++++ Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc | 76 +++++++++++ .../ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 9 ++ Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 41 ++++++ 9 files changed, 722 insertions(+) create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc create mode 100644 Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc create mode 100644 Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf b/Platfor= m/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf new file mode 100644 index 0000000..a44c76f --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf @@ -0,0 +1,50 @@ +## @file +# +# ACPI table data and ASL sources required to boot the platform. +# +# Copyright (c) 2018, ARM Ltd. All rights reserved. +# +# This program and the accompanying materials are licensed and made avail= able +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D Sgi575AcpiTables + FILE_GUID =3D c712719a-0aaf-438c-9cdd-35ab4d60207d + MODULE_TYPE =3D USER_DEFINED + VERSION_STRING =3D 1.0 + +[Sources] + Dbg2.aslc + Dsdt.asl + Fadt.aslc + Gtdt.aslc + Madt.aslc + Spcr.aslc + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + Platform/ARM/VExpressPkg/ArmVExpressPkg.dec + edk2-platforms/Platform/ARM/SgiPkg/SgiPlatform.dec + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + +[FixedPcd] + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum + + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase + gArmPlatformTokenSpaceGuid.PL011UartInterrupt diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc b/Platform/ARM= /SgiPkg/AcpiTables/Sgi575/Dbg2.aslc new file mode 100644 index 0000000..d17b7bb --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dbg2.aslc @@ -0,0 +1,89 @@ +/** @file +* DBG2 Table +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made avail= able +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#include "SgiAcpiHeader.h" +#include +#include +#include + +#pragma pack(1) + +#define DBG2_NUM_DEBUG_PORTS 1 +#define DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS 1 +#define DBG2_NAMESPACESTRING_FIELD_SIZE 8 +#define PL011_UART_LENGTH 0x1000 + +#define NAME_STR_UART1 {'C', 'O', 'M', '1', '\0', '\0', '\0', '\0'} + +typedef struct { + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT Dbg2Device; + EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE BaseAddressRegister; + UINT32 AddressSize; + UINT8 NameSpaceString[DBG2_NAMES= PACESTRING_FIELD_SIZE]; +} DBG2_DEBUG_DEVICE_INFORMATION; + +typedef struct { + EFI_ACPI_DEBUG_PORT_2_DESCRIPTION_TABLE Description; + DBG2_DEBUG_DEVICE_INFORMATION Dbg2DeviceInfo[DBG2_NUM_DE= BUG_PORTS]; +} DBG2_TABLE; + + +#define DBG2_DEBUG_PORT_DDI(NumReg, SubType, UartBase, UartAddrLen, UartNa= meStr) { \ + { = \ + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVISION, /* U= INT8 Revision */ \ + sizeof (DBG2_DEBUG_DEVICE_INFORMATION), /* U= INT16 Length */ \ + NumReg, /* U= INT8 NumberofGenericAddressRegisters */ \ + DBG2_NAMESPACESTRING_FIELD_SIZE, /* U= INT16 NameSpaceStringLength */ \ + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, NameSpaceString), /* U= INT16 NameSpaceStringOffset */ \ + 0, /* U= INT16 OemDataLength */ \ + 0, /* U= INT16 OemDataOffset */ \ + EFI_ACPI_DBG2_PORT_TYPE_SERIAL, /* U= INT16 Port Type */ \ + SubType, /* U= INT16 Port Subtype */ \ + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, /* U= INT8 Reserved[2] */ \ + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, BaseAddressRegister), /* U= INT16 BaseAddressRegister Offset */ \ + OFFSET_OF (DBG2_DEBUG_DEVICE_INFORMATION, AddressSize) /* U= INT16 AddressSize Offset */ \ + }, = \ + ARM_GAS32 (UartBase), /* EFI_ACPI_6_1_GENER= IC_ADDRESS_STRUCTURE BaseAddressRegister */ \ + UartAddrLen, /* UINT32 AddressSiz= e */ \ + UartNameStr /* UINT8 NameSpaceS= tring[MAX_DBG2_NAME_LEN] */ \ + } + +STATIC DBG2_TABLE Dbg2 =3D { + { + ARM_ACPI_HEADER (EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE, + DBG2_TABLE, + EFI_ACPI_DBG2_DEBUG_DEVICE_INFORMATION_STRUCT_REVIS= ION), + OFFSET_OF (DBG2_TABLE, Dbg2DeviceInfo), + DBG2_NUM_DEBUG_PORTS /* U= INT32 NumberDbgDeviceInfo */ + }, + { + /* + * Kernel Debug Port + */ + DBG2_DEBUG_PORT_DDI (DBG2_NUMBER_OF_GENERIC_ADDRESS_REGISTERS, + EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENER= IC_UART, + FixedPcdGet64 (PcdSerialDbgRegisterBase), + PL011_UART_LENGTH, + NAME_STR_UART1), + } +}; + +#pragma pack() + +// +// Reference the table being generated to prevent the optimizer from remov= ing +// the data structure from the executable +// +VOID* CONST ReferenceAcpiTable =3D &Dbg2; diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl b/Platform/ARM/= SgiPkg/AcpiTables/Sgi575/Dsdt.asl new file mode 100644 index 0000000..6c251e2 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Dsdt.asl @@ -0,0 +1,99 @@ +/** @file + Differentiated System Description Table Fields (DSDT) + + Copyright (c) 2018, ARM Ltd. All rights reserved. + + This program and the accompanying materials are licensed and made availa= ble + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" + +DefinitionBlock("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARM-SGI575", EFI_AC= PI_ARM_OEM_REVISION) { + Scope(_SB) { + + Device(CP00) { // A75-0: Cluster 0, Cpu 0 + Name(_HID, "ACPI0007") + Name(_UID, 0) + Name(_STA, 0xF) + } + + Device(CP01) { // A75-0: Cluster 0, Cpu 1 + Name(_HID, "ACPI0007") + Name(_UID, 1) + Name(_STA, 0xF) + } + + Device(CP02) { // A75-0: Cluster 0, Cpu 2 + Name(_HID, "ACPI0007") + Name(_UID, 2) + Name(_STA, 0xF) + } + + Device(CP03) { // A75-0: Cluster 0, Cpu 3 + Name(_HID, "ACPI0007") + Name(_UID, 3) + Name(_STA, 0xF) + } + + Device(CP04) { // A75-0: Cluster 1, Cpu 0 + Name(_HID, "ACPI0007") + Name(_UID, 4) + Name(_STA, 0xF) + } + + Device(CP05) { // A75-0: Cluster 1, Cpu 1 + Name(_HID, "ACPI0007") + Name(_UID, 5) + Name(_STA, 0xF) + } + + Device(CP06) { // A75-0: Cluster 1, Cpu 2 + Name(_HID, "ACPI0007") + Name(_UID, 6) + Name(_STA, 0xF) + } + + Device(CP07) { // A75-0: Cluster 1, Cpu 3 + Name(_HID, "ACPI0007") + Name(_UID, 7) + Name(_STA, 0xF) + } + + // UART PL011 + Device(COM0) { + Name(_HID, "ARMH0011") + Name(_CID, "ARMH0011") + Name(_UID, Zero) + Name(_STA, 0xF) + Name(_CRS, ResourceTemplate() { + Memory32Fixed(ReadWrite, 0x7FF80000, 0x1000) + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 } + }) + } + + // SMSC 91C111 + Device(ETH0) { + Name(_HID, "LNRO0003") + Name(_UID, Zero) + Name(_STA, 0xF) + Name(_CRS, ResourceTemplate() { + Memory32Fixed(ReadWrite, 0x18000000, 0x1000) + Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive) { 11= 1 } + }) + Name(_DSD, Package() { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package() { + Package(2) {"reg-io-width", 4 }, + } + }) + } + } // Scope(_SB) +} diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc b/Platform/ARM= /SgiPkg/AcpiTables/Sgi575/Fadt.aslc new file mode 100644 index 0000000..65d4e7a --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Fadt.aslc @@ -0,0 +1,87 @@ +/** @file +* Fixed ACPI Description Table (FADT) +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made avail= able +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#include "SgiAcpiHeader.h" +#include +#include + +EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE Fadt =3D { + ARM_ACPI_HEADER ( + EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE, + EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION + ), + 0, = // UINT32 FirmwareCtrl + 0, = // UINT32 Dsdt + EFI_ACPI_RESERVED_BYTE, = // UINT8 Reserved0 + EFI_ACPI_6_1_PM_PROFILE_ENTERPRISE_SERVER, = // UINT8 PreferredPmProfile + 0, = // UINT16 SciInt + 0, = // UINT32 SmiCmd + 0, = // UINT8 AcpiEnable + 0, = // UINT8 AcpiDisable + 0, = // UINT8 S4BiosReq + 0, = // UINT8 PstateCnt + 0, = // UINT32 Pm1aEvtBlk + 0, = // UINT32 Pm1bEvtBlk + 0, = // UINT32 Pm1aCntBlk + 0, = // UINT32 Pm1bCntBlk + 0, = // UINT32 Pm2CntBlk + 0, = // UINT32 PmTmrBlk + 0, = // UINT32 Gpe0Blk + 0, = // UINT32 Gpe1Blk + 0, = // UINT8 Pm1EvtLen + 0, = // UINT8 Pm1CntLen + 0, = // UINT8 Pm2CntLen + 0, = // UINT8 PmTmrLen + 0, = // UINT8 Gpe0BlkLen + 0, = // UINT8 Gpe1BlkLen + 0, = // UINT8 Gpe1Base + 0, = // UINT8 CstCnt + 0, = // UINT16 PLvl2Lat + 0, = // UINT16 PLvl3Lat + 0, = // UINT16 FlushSize + 0, = // UINT16 FlushStride + 0, = // UINT8 DutyOffset + 0, = // UINT8 DutyWidth + 0, = // UINT8 DayAlrm + 0, = // UINT8 MonAlrm + 0, = // UINT8 Century + 0, = // UINT16 IaPcBootArch + 0, = // UINT8 Reserved1 + EFI_ACPI_6_1_HW_REDUCED_ACPI | EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE, = // UINT32 Flags + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE ResetReg + 0, = // UINT8 ResetValue + EFI_ACPI_6_1_ARM_PSCI_COMPLIANT, = // UINT16 ArmBootArchFlags + EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, = // UINT8 MinorRevision + 0, = // UINT64 XFirmwareCtrl + 0, = // UINT64 XDsdt + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg + NULL_GAS, = // EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg + 0 = // UINT64 HypervisorVendorIdentity; +}; + +// +// Reference the table being generated to prevent the optimizer from remov= ing the +// data structure from the executable +// +VOID* CONST ReferenceAcpiTable =3D &Fadt; diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc b/Platform/ARM= /SgiPkg/AcpiTables/Sgi575/Gtdt.aslc new file mode 100644 index 0000000..5fdf76e --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Gtdt.aslc @@ -0,0 +1,144 @@ +/** @file +* Generic Timer Description Table (GTDT) +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made avail= able +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#include "SgiAcpiHeader.h" +#include +#include +#include + +#define SGI_PLATFORM_WATCHDOG_COUNT 2 + +#define GTDT_GLOBAL_FLAGS_MAPPED EFI_ACPI_6_1_GTDT_GLOBAL_FLAG_MEMORY= _MAPPED_BLOCK_PRESENT +#define GTDT_GLOBAL_FLAGS_NOT_MAPPED 0 +#define GTDT_GLOBAL_FLAGS_EDGE EFI_ACPI_6_1_GTDT_GLOBAL_FLAG_INTERR= UPT_MODE +#define GTDT_GLOBAL_FLAGS_LEVEL 0 + +#ifdef SYSTEM_TIMER_BASE_ADDRESS + #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_MAPPED | GTDT_G= LOBAL_FLAGS_LEVEL) +#else + #define GTDT_GLOBAL_FLAGS (GTDT_GLOBAL_FLAGS_NOT_MAPPED | GT= DT_GLOBAL_FLAGS_LEVEL) + #define SYSTEM_TIMER_BASE_ADDRESS 0xFFFFFFFFFFFFFFFF +#endif + +#define SGI_PLATFORM_TIMER_COUNT 2 +#define SGI_TIMER_FRAMES_COUNT 2 + +#define GTDT_TIMER_EDGE_TRIGGERED EFI_ACPI_6_1_GTDT_TIMER_FLAG_TIMER_INT= ERRUPT_MODE +#define GTDT_TIMER_LEVEL_TRIGGERED 0 +#define GTDT_TIMER_ACTIVE_LOW EFI_ACPI_6_1_GTDT_TIMER_FLAG_TIMER_INT= ERRUPT_POLARITY +#define GTDT_TIMER_ACTIVE_HIGH 0 +#define GTDT_TIMER_SAVE_CONTEXT EFI_ACPI_6_1_GTDT_TIMER_FLAG_ALWAYS_ON= _CAPABILITY +#define GTDT_TIMER_LOSE_CONTEXT 0 + +#define SGI_GT_BLOCK_CTL_BASE 0x000000002A810000 +#define SGI_GT_BLOCK_FRAME1_CTL_BASE 0x000000002A820000 +#define SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE 0xFFFFFFFFFFFFFFFF +#define SGI_GT_BLOCK_FRAME1_GSIV 0x5B + +#define SGI_GT_BLOCK_FRAME0_CTL_BASE 0x000000002A830000 +#define SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE 0xFFFFFFFFFFFFFFFF +#define SGI_GT_BLOCK_FRAME0_GSIV 0x5C + +#define GTX_TIMER_EDGE_TRIGGERED EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_FLAG_= TIMER_INTERRUPT_MODE +#define GTX_TIMER_LEVEL_TRIGGERED 0 +#define GTX_TIMER_ACTIVE_LOW EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_FLAG_= TIMER_INTERRUPT_POLARITY +#define GTX_TIMER_ACTIVE_HIGH 0 + +#define SGI_GTX_TIMER_FLAGS (GTX_TIMER_ACTIVE_HIGH | GTX_TIMER_LEV= EL_TRIGGERED) + +#define GTX_TIMER_SECURE EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG= _SECURE_TIMER +#define GTX_TIMER_NON_SECURE 0 +#define GTX_TIMER_SAVE_CONTEXT EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG= _ALWAYS_ON_CAPABILITY +#define GTX_TIMER_LOSE_CONTEXT 0 + +#define GTDT_GTIMER_FLAGS (GTDT_TIMER_ACTIVE_LOW | GTDT_TIMER_LE= VEL_TRIGGERED) +#define SGI_GTX_COMMON_FLAGS_S (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER_= SECURE) +#define SGI_GTX_COMMON_FLAGS_NS (GTX_TIMER_SAVE_CONTEXT | GTX_TIMER= _NON_SECURE) + #pragma pack (1) + + typedef struct { + EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE Gtdt; + EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE GtBlock; + EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE Frames[SGI_TIMER= _FRAMES_COUNT]; + } EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES; + + #pragma pack () + + EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES Gtdt =3D { + { + ARM_ACPI_HEADER( + EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLES, + EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION + ), + SYSTEM_TIMER_BASE_ADDRESS, // UINT64 PhysicalAdd= ress + 0, // UINT32 Reserved + FixedPcdGet32 (PcdArmArchTimerSecIntrNum), // UINT32 SecurePL1Ti= merGSIV + GTDT_GTIMER_FLAGS, // UINT32 SecurePL1Ti= merFlags + FixedPcdGet32 (PcdArmArchTimerIntrNum), // UINT32 NonSecurePL= 1TimerGSIV + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL= 1TimerFlags + FixedPcdGet32 (PcdArmArchTimerVirtIntrNum), // UINT32 VirtualTime= rGSIV + GTDT_GTIMER_FLAGS, // UINT32 VirtualTime= rFlags + FixedPcdGet32 (PcdArmArchTimerHypIntrNum), // UINT32 NonSecurePL= 2TimerGSIV + GTDT_GTIMER_FLAGS, // UINT32 NonSecurePL= 2TimerFlags + 0xFFFFFFFFFFFFFFFF, // UINT64 CntReadBase= PhysicalAddress + SGI_PLATFORM_WATCHDOG_COUNT, // UINT32 PlatformTim= erCount + sizeof (EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE) // UINT32 Plat= fromTimerOffset + }, + { + EFI_ACPI_6_1_GTDT_GT_BLOCK, // UINT8 Type + sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE) // UINT16 Leng= th + + sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE) * + SGI_TIMER_FRAMES_COUNT, + EFI_ACPI_RESERVED_BYTE, // UINT8 Reser= ved + SGI_GT_BLOCK_CTL_BASE, // UINT64 CntC= tlBase + SGI_TIMER_FRAMES_COUNT, // UINT32 GTBl= ockTimerCount + sizeof(EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE) // UINT32 GTBl= ockTimerOffset + }, + { + { + 0, // UINT8 GTFra= meNumber + {EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE}, // UINT8 Reser= ved[3] + SGI_GT_BLOCK_FRAME0_CTL_BASE, // UINT64 CntB= aseX + SGI_GT_BLOCK_FRAME0_CTL_EL0_BASE, // UINT64 CntE= L0BaseX + SGI_GT_BLOCK_FRAME0_GSIV, // UINT32 GTxP= hysicalTimerGSIV + SGI_GTX_TIMER_FLAGS, // UINT32 GTxP= hysicalTimerFlags + 0, // UINT32 GTxV= irtualTimerGSIV + 0, // UINT32 GTxV= irtualTimerFlags + SGI_GTX_COMMON_FLAGS_NS // UINT32 GTx= CommonFlags + }, + { + 1, // UINT8 GTFra= meNumber + {EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE}, // UINT8 Reser= ved[3] + SGI_GT_BLOCK_FRAME1_CTL_BASE, // UINT64 CntB= aseX + SGI_GT_BLOCK_FRAME1_CTL_EL0_BASE, // UINT64 CntE= L0BaseX + SGI_GT_BLOCK_FRAME1_GSIV, // UINT32 GTxP= hysicalTimerGSIV + SGI_GTX_TIMER_FLAGS, // UINT32 GTxP= hysicalTimerFlags + 0, // UINT32 GTxV= irtualTimerGSIV + 0, // UINT32 GTxV= irtualTimerFlags + SGI_GTX_COMMON_FLAGS_S // UINT32 GTxCo= mmonFlags + } + }, + }; + +// +// Reference the table being generated to prevent the optimizer from remov= ing the +// data structure from the executable +// +VOID* CONST ReferenceAcpiTable =3D &Gtdt; diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc b/Platform/ARM= /SgiPkg/AcpiTables/Sgi575/Madt.aslc new file mode 100644 index 0000000..5bb8483 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Madt.aslc @@ -0,0 +1,127 @@ +/** @file +* Multiple APIC Description Table (MADT) +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made avail= able +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#include "SgiPlatform.h" +#include "SgiAcpiHeader.h" +#include +#include +#include +#include + +/* SGI575 configuration */ +#define SGI575_CORE_COUNT 4 +#define SGI575_CLUSTER_COUNT 2 + +#define EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags, = PmuIrq, \ + GicBase, GicVBase, GicHBase, GsivId, GicRBase, Efficiency) = \ + { = \ + EFI_ACPI_6_1_GIC, sizeof (EFI_ACPI_6_1_GIC_STRUCTURE), EFI_ACPI_RESERV= ED_WORD, \ + GicId, AcpiCpuUid, Flags, 0, PmuIrq, 0, GicBase, GicVBase, GicHBase, = \ + GsivId, GicRBase, Mpidr, Efficiency, = \ + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYT= E} \ + } + +#define EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(GicDistHwId, GicDistBase, GicDis= tVector, GicVersion) \ + { \ + EFI_ACPI_6_1_GICD, sizeof (EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE), EF= I_ACPI_RESERVED_WORD, \ + GicDistHwId, GicDistBase, GicDistVector, GicVersion, \ + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYT= E} \ + } + +#define EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(RedisRegionAddr, RedisDiscLeng= th) \ + { \ + EFI_ACPI_6_1_GICR, sizeof (EFI_ACPI_6_1_GICR_STRUCTURE), 0, RedisRegio= nAddr, RedisDiscLength \ + } + + +// +// Multiple APIC Description Table +// + #pragma pack (1) + + typedef struct { + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[SG= I575_CORE_COUNT * SGI575_CLUSTER_COUNT]; + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; + EFI_ACPI_6_1_GICR_STRUCTURE GicRedistributor; + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicIts; + } EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE; + + #pragma pack () + + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt =3D { + { + ARM_ACPI_HEADER ( + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE, + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION + ), + // + // MADT specific fields + // + 0, // LocalApicAddress + 0, // Flags + }, + { + // Format: EFI_ACPI_6_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr= , Flags, PmuIrq, GicBase, GicVBase, + // GicHBase, GsivId, GicRBa= se, Efficiency) + // Note: The GIC Structure of the primary CPU must be the first entr= y (see note in 5.2.12.14 GICC Structure of + // ACPI v6.1). + EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A72-0 + 0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_1_GIC_ENABLED, 23, SGI_SUBS= YS_GENERIC_GIC_BASE, + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Processor Pow= er Efficiency Class */), + EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A72-1 + 0, 1, GET_MPID(0x0, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23, SGI_SU= BSYS_GENERIC_GIC_BASE, + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Processor Pow= er Efficiency Class */), + EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A72-2 + 0, 2, GET_MPID(0x0, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23, SGI_SU= BSYS_GENERIC_GIC_BASE, + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Processor Pow= er Efficiency Class */), + EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A72-3 + 0, 3, GET_MPID(0x0, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23, SGI_SU= BSYS_GENERIC_GIC_BASE, + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Processor Pow= er Efficiency Class */), + + EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A72-4 + 0, 4, GET_MPID(0x100, 0x00), EFI_ACPI_6_1_GIC_ENABLED, 23, SGI_S= UBSYS_GENERIC_GIC_BASE, + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Processor Pow= er Efficiency Class */), + EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A72-5 + 0, 5, GET_MPID(0x100, 0x100), EFI_ACPI_6_1_GIC_ENABLED, 23, SGI_= SUBSYS_GENERIC_GIC_BASE, + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Processor Pow= er Efficiency Class */), + EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A72-6 + 0, 6, GET_MPID(0x100, 0x200), EFI_ACPI_6_1_GIC_ENABLED, 23, SGI_= SUBSYS_GENERIC_GIC_BASE, + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Processor Pow= er Efficiency Class */), + EFI_ACPI_6_1_GICC_STRUCTURE_INIT( // A72-7 + 0, 7, GET_MPID(0x100, 0x300), EFI_ACPI_6_1_GIC_ENABLED, 23, SGI_= SUBSYS_GENERIC_GIC_BASE, + 0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Processor Pow= er Efficiency Class */), + }, + // GIC Distributor Entry + EFI_ACPI_6_1_GIC_DISTRIBUTOR_INIT(0, SGI_SUBSYS_GENERIC_GIC_BASE, 0, 3= ), + // GIC Redistributor + EFI_ACPI_6_1_GIC_REDISTRIBUTOR_INIT(SGI_SUBSYS_GENERIC_GICR_BASE, SIZE= _1MB), + /* GIC ITS */ + { + EFI_ACPI_6_1_GIC_ITS, + sizeof(EFI_ACPI_6_1_GIC_ITS_STRUCTURE), + EFI_ACPI_RESERVED_WORD, + 0x00000000, // GIC ITS ID + 0x30040000, // Base address of GIC ITS0 + EFI_ACPI_RESERVED_DWORD, + } + }; + +// +// Reference the table being generated to prevent the optimizer from remov= ing the +// data structure from the executable +// +VOID* CONST ReferenceAcpiTable =3D &Madt; diff --git a/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc b/Platform/ARM= /SgiPkg/AcpiTables/Sgi575/Spcr.aslc new file mode 100644 index 0000000..7db5e08 --- /dev/null +++ b/Platform/ARM/SgiPkg/AcpiTables/Sgi575/Spcr.aslc @@ -0,0 +1,76 @@ +/** @file +* +* SPCR Table +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made availa= ble +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. +* +**/ + +#include "SgiAcpiHeader.h" +#include +#include +#include + +STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr =3D { + ARM_ACPI_HEADER (EFI_ACPI_6_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGN= ATURE, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE, + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_REVISI= ON), + // UINT8 InterfaceType; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_ARM_PL011_= UART, + // UINT8 Reserved1[3]; + { + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE + }, + // EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE BaseAddress; + ARM_GAS32 (0x7FF80000), + // UINT8 InterruptType; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERRUPT_TYPE_GIC, + // UINT8 Irq; + 0, + // UINT32 GlobalSystemInterrupt; + FixedPcdGet32 (PL011UartInterrupt), + // UINT8 BaudRate; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_BAUD_RATE_115200, + // UINT8 Parity; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_PARITY_NO_PARITY, + // UINT8 StopBits; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_STOP_BITS_1, + // UINT8 FlowControl; + 0, + // UINT8 TerminalType; + EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_TERMINAL_TYPE_ANSI, + // UINT8 Reserved2; + EFI_ACPI_RESERVED_BYTE, + // UINT16 PciDeviceId; + 0xFFFF, + // UINT16 PciVendorId; + 0xFFFF, + // UINT8 PciBusNumber; + 0x00, + // UINT8 PciDeviceNumber; + 0x00, + // UINT8 PciFunctionNumber; + 0x00, + // UINT32 PciFlags; + 0x00000000, + // UINT8 PciSegment; + 0x00, + // UINT32 Reserved3; + EFI_ACPI_RESERVED_DWORD +}; + +// +// Reference the table being generated to prevent the optimizer from remov= ing the +// data structure from the executable +// +VOID* CONST ReferenceAcpiTable =3D &Spcr; diff --git a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c b/Platfo= rm/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c index 5d54f06..8c7d168 100644 --- a/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c +++ b/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c @@ -12,8 +12,11 @@ * **/ =20 +#include #include =20 +STATIC CONST EFI_GUID mSgi575AcpiTableFile =3D { 0xc712719a, 0x0aaf, 0x438= c, { 0x9c, 0xdd, 0x35, 0xab, 0x4d, 0x60, 0x20, 0x7d } }; + EFI_STATUS InitVirtioBlockIo ( IN EFI_HANDLE ImageHandle @@ -28,6 +31,12 @@ ArmSgiPkgEntryPoint ( { EFI_STATUS Status; =20 + Status =3D LocateAndInstallAcpiFromFv (&mSgi575AcpiTableFile); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "PlatformDxe: Failed to install ACPI tables\n")); + return Status; + } + // Install Virtio Block IO. if ( FeaturePcdGet (PcdVirtioSupported) =3D=3D TRUE ) { Status =3D InitVirtioBlockIo (ImageHandle); diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/Sgi= Pkg/Include/SgiAcpiHeader.h new file mode 100644 index 0000000..a755567 --- /dev/null +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h @@ -0,0 +1,41 @@ +/** @file +* +* Copyright (c) 2018, ARM Limited. All rights reserved. +* +* This program and the accompanying materials are licensed and made avail= able +* under the terms and conditions of the BSD License which accompanies this +* distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef __SGI_ACPI_HEADER__ +#define __SGI_ACPI_HEADER__ + +// +// ACPI table information used to initialize tables. +// +#define EFI_ACPI_ARM_OEM_ID 'A','R','M','L','T','D' // OEMID 6= bytes long +#define EFI_ACPI_ARM_OEM_TABLE_ID SIGNATURE_64('E','N','T','P','L','A'= ,'T','F') // OEM table id 8 bytes long +#define EFI_ACPI_ARM_OEM_REVISION 0x20140727 +#define EFI_ACPI_ARM_CREATOR_ID SIGNATURE_32('A','R','M',' ') +#define EFI_ACPI_ARM_CREATOR_REVISION 0x00000099 + +// A macro to initialise the common header part of EFI ACPI tables as defi= ned by +// EFI_ACPI_DESCRIPTION_HEADER structure. +#define ARM_ACPI_HEADER(Signature, Type, Revision) { \ + Signature, /* UINT32 Signature */ \ + sizeof (Type), /* UINT32 Length */ \ + Revision, /* UINT8 Revision */ \ + 0, /* UINT8 Checksum */ \ + { EFI_ACPI_ARM_OEM_ID }, /* UINT8 OemId[6] */ \ + EFI_ACPI_ARM_OEM_TABLE_ID, /* UINT64 OemTableId */ \ + EFI_ACPI_ARM_OEM_REVISION, /* UINT32 OemRevision */ \ + EFI_ACPI_ARM_CREATOR_ID, /* UINT32 CreatorId */ \ + EFI_ACPI_ARM_CREATOR_REVISION /* UINT32 CreatorRevision */ \ + } + +#endif /* __SGI_ACPI_HEADER__ */ --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu May 2 23:17:54 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1523558914090272.94269799701965; Thu, 12 Apr 2018 11:48:34 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 9328022742AB6; Thu, 12 Apr 2018 11:48:24 -0700 (PDT) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id 7FE7F22742AB2 for ; Thu, 12 Apr 2018 11:48:23 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 352D480D; Thu, 12 Apr 2018 11:48:23 -0700 (PDT) Received: from usa.arm.com (a74716-lin.blr.arm.com [10.162.4.145]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D5FED3F5AD; Thu, 12 Apr 2018 11:48:21 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=thomas.abraham@arm.com; receiver=edk2-devel@lists.01.org From: Thomas Abraham To: edk2-devel@lists.01.org Date: Fri, 13 Apr 2018 00:17:43 +0530 Message-Id: <1523558863-5427-7-git-send-email-thomas.abraham@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> References: <1523558863-5427-1-git-send-email-thomas.abraham@arm.com> Subject: [edk2] [PATCH edk2-platforms v2 6/6] Platform/ARM/Sgi: add initial support for ARM SGI platform X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, ard.biesheuvel@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Vishwanatha HG Add the initial support for ARM's System Guidance for Infrastructure (SGI) platforms. SGI-575 is the supported platform in this initial implementation and can be extented to include support for upcoming SGI platforms as well. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Vishwanatha HG Signed-off-by: Thomas Abraham --- Platform/ARM/SgiPkg/SgiPlatform.dec | 36 ++++ Platform/ARM/SgiPkg/SgiPlatform.dsc | 243 +++++++++++++++++++++++++++ Platform/ARM/SgiPkg/SgiPlatform.fdf | 320 ++++++++++++++++++++++++++++++++= ++++ 3 files changed, 599 insertions(+) create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.dec create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.dsc create mode 100644 Platform/ARM/SgiPkg/SgiPlatform.fdf diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiP= latform.dec new file mode 100644 index 0000000..b446aa6 --- /dev/null +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -0,0 +1,36 @@ +# +# Copyright (c) 2018, ARM Limited. All rights reserved. +# +# This program and the accompanying materials are licensed and made avail= able +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# + +[Defines] + DEC_SPECIFICATION =3D 0x00010005 + PACKAGE_NAME =3D SgiPkg + PACKAGE_GUID =3D e6e0f26c-0df9-4f6c-a382-37ded896c6e9 + PACKAGE_VERSION =3D 0.1 + +##########################################################################= ###### +# +# Include Section - list of Include Paths that are provided by this packag= e. +# Comments are used for Keywords and Module Types. +# +# Supported Module Types: +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_D= RIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION +# +##########################################################################= ###### +[Includes.common] + Include # Root include for the package + +[Guids.common] + gArmSgiTokenSpaceGuid =3D { 0x577d6941, 0xaea1, 0x40b4, { 0x90, 0x93= , 0x2a, 0x86, 0x61, 0x72, 0x5a, 0x57 } } + +[PcdsFeatureFlag.common] + # Set this PCD to TRUE to enable virtio support. + gArmSgiTokenSpaceGuid.PcdVirtioSupported|TRUE|BOOLEAN|0x00000001 diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiP= latform.dsc new file mode 100644 index 0000000..4f01cb0 --- /dev/null +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc @@ -0,0 +1,243 @@ +# +# Copyright (c) 2018, ARM Limited. All rights reserved. +# +# This program and the accompanying materials are licensed and made avail= able +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# + +##########################################################################= ###### +# +# Defines Section - statements that will be processed to create a Makefile. +# +##########################################################################= ###### +[Defines] + PLATFORM_NAME =3D arm_sgi_platform + PLATFORM_GUID =3D 3a6b2eae-0275-4b6e-a5d1-bd2ba1ce1fae + PLATFORM_VERSION =3D 0.1 + DSC_SPECIFICATION =3D 0x00010005 + OUTPUT_DIRECTORY =3D Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES =3D AARCH64|ARM + BUILD_TARGETS =3D DEBUG|RELEASE + SKUID_IDENTIFIER =3D DEFAULT + FLASH_DEFINITION =3D edk2-platforms/Platform/ARM/SgiPkg/Sg= iPlatform.fdf + +[LibraryClasses.common] + ArmPlatformLib|edk2-platforms/Platform/ARM/SgiPkg/Library/PlatformLib/Pl= atformLib.inf + ArmHvcLib|ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf + +!include edk2-platforms/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc + + # ARM Base Library + ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf + ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf + ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf + + BasePathLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf + + ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysC= onfigLib/ArmVExpressSysConfigLib.inf + NorFlashPlatformLib|edk2-platforms/Platform/ARM/SgiPkg/Library/NorFlashL= ib/NorFlashLib.inf + EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSyste= mLib.inf + + TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf + + # Virtio Support + VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf + VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDevice= Lib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf + +[LibraryClasses.common.SEC] + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf + ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib= /PrePiExtractGuidedSectionLib.inf + LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLi= b/LzmaCustomDecompressLib.inf + MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMe= moryAllocationLib.inf + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf + PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/Pre= PiHobListPointerLib.inf + PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.= inf + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf + +[LibraryClasses.common.UEFI_DRIVER, LibraryClasses.common.UEFI_APPLICATION= , LibraryClasses.common.DXE_RUNTIME_DRIVER, LibraryClasses.common.DXE_DRIVE= R] + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + +[BuildOptions] + *_*_*_PLATFORM_FLAGS =3D -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/In= clude -I$(WORKSPACE)/edk2-platforms/Platform/ARM/SgiPkg/Include + +##########################################################################= ###### +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +##########################################################################= ###### + +[PcdsFeatureFlag.common] + ## If TRUE, Graphics Output Protocol will be installed on virtual handle= created by ConsplitterDxe. + # It could be set FALSE to save size. + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE + gArmSgiTokenSpaceGuid.PcdVirtioSupported|TRUE + +[PcdsFixedAtBuild.common] + # + # NV Storage PCDs. Use base of 0x08000000 for NOR0, 0xC0000000 for NOR 1 + # + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0BFC0000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0BFD0000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0BFE0000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000 + + # System Memory (1GB - 16MB of Trusted DRAM at the top of the 32bit addr= ess space) + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000 + gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000 + + gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000 + gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x300C0000 + + gArmTokenSpaceGuid.PcdVFPEnabled|1 + + # + # ARM PrimeCell + # + + ## PL011 - Serial Terminal + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x7FF80000 + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200 + gArmPlatformTokenSpaceGuid.PL011UartInteger|4 + gArmPlatformTokenSpaceGuid.PL011UartFractional|0 + + ## PL011 - Serial Debug UART + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x7FF80000 + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|7372800 + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200 + gArmPlatformTokenSpaceGuid.PL011UartInterrupt|147 + + ## PL031 RealTimeClock + gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000 + +!ifdef EDK2_ENABLE_SMSC_91X + # Ethernet (SMSC 91C111) + gEmbeddedTokenSpaceGuid.PcdLan9118DxeBaseAddress|0x18000000 +!endif + + # List of Device Paths that support BootMonFs + gArmBootMonFsTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L"VenHw(E72= 23039-5836-41E1-B542-D7EC736C5E59)" + + # + # ARM OS Loader + # + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|3 + + # + # ARM Architectural Timer Frequency + # + gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000 + gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000 + gEmbeddedTokenSpaceGuid.PcdTimerPeriod|1000 + + # + # ARM Cores and Clusters + # Set initial minimum supported value needed for a initial initialization + # + gArmPlatformTokenSpaceGuid.PcdCoreCount|2 + gArmPlatformTokenSpaceGuid.PcdClusterCount|1 + +[PcdsPatchableInModule] + # Console Resolution (Full HD) + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|1920 + gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|1080 + + +##########################################################################= ###### +# +# Components Section - list of all EDK II Modules needed by this Platform +# +##########################################################################= ###### +[Components.common] + # + # PEI Phase modules + # + ArmPlatformPkg/PrePi/PeiMPCore.inf { + + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.= inf + } + + # + # DXE + # + MdeModulePkg/Core/Dxe/DxeMain.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32Gu= idedSectionExtractLib.inf + } + + # + # Architectural Protocols + # + ArmPkg/Drivers/CpuDxe/CpuDxe.inf + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntim= eDxe.inf + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf + + # + # ACPI Support + # + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf + edk2-platforms/Platform/ARM/SgiPkg/AcpiTables/Sgi575/AcpiTables.inf + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + ArmPkg/Drivers/TimerDxe/TimerDxe.inf + ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf + + ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf + OvmfPkg/VirtioBlkDxe/VirtioBlk.inf + + # + # Semi-hosting filesystem + # + ArmPkg/Filesystem/SemihostFs/SemihostFs.inf + + # + # platform driver + # + edk2-platforms/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + # + # Bds + # + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + MdeModulePkg/Application/UiApp/UiApp.inf { + + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanc= eManagerUiLib.inf + PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf + } diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiP= latform.fdf new file mode 100644 index 0000000..05a6582 --- /dev/null +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf @@ -0,0 +1,320 @@ +# +# Copyright (c) 2018, ARM Limited. All rights reserved. +# +# This program and the accompanying materials are licensed and made avail= able +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# + +##########################################################################= ###### +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +##########################################################################= ###### + +[FD.BL33_AP_UEFI] +BaseAddress =3D 0xE0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The ba= se address of the Firmware in NOR Flash. +Size =3D 0x000F0000|gArmTokenSpaceGuid.PcdFdSize # The si= ze in bytes of the FLASH Device +ErasePolarity =3D 1 + +# This one is tricky, it must be: BlockSize * NumBlocks =3D Size +BlockSize =3D 0x00001000 +NumBlocks =3D 0xF0 + +##########################################################################= ###### +# +# Following are lists of FD Region layout which correspond to the location= s of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" requir= ed) followed by +# the pipe "|" character, followed by the size of the region, also in hex = with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +##########################################################################= ###### + +0x00000000|0x000F0000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV =3D FVMAIN_COMPACT + +##########################################################################= ###### +# +# FV Section +# +# [FV] section is used to define what components or modules are placed wit= hin a flash +# device file. This section also defines order the components and modules= are positioned +# within the image. The [FV] section consists of define statements, set s= tatements and +# module statements. +# +##########################################################################= ###### + +[FV.FvMain] +BlockSize =3D 0x40 +NumBlocks =3D 0 # This FV gets compressed so make it just= big enough +FvAlignment =3D 8 # FV alignment and FV attributes setting. +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRu= ntimeDxe.inf + INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.i= nf + + # + # ACPI Support + # + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf + INF RuleOverride=3DACPITABLE edk2-platforms/Platform/ARM/SgiPkg/AcpiTabl= es/Sgi575/AcpiTables.inf + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # Multiple Console IO support + # + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf + + INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf + INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf + INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf + + # NOR Flash driver + INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf + INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf + + # Semi-hosting filesystem + INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf + # Versatile Express FileSystem + INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf + + INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatBinPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.i= nf + + # FV FileSystem + INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.i= nf + + # + # Networking stack + # + INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf + INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf + INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf + INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf + INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf + INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf + INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf + INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf + INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf + INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf + INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf + +!ifdef EDK2_ENABLE_SMSC_91X + INF EmbeddedPkg/Drivers/Lan91xDxe/Lan91xDxe.inf +!endif + + # + # UEFI applications + # + INF ShellPkg/Application/Shell/Shell.inf + + # + # platform driver + # + INF edk2-platforms/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.i= nf + + # + # Bds + # + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf + INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf + INF MdeModulePkg/Application/UiApp/UiApp.inf + +[FV.FVMAIN_COMPACT] +FvAlignment =3D 8 +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + INF ArmPlatformPkg/PrePi/PeiMPCore.inf + + FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRE= D =3D TRUE { + SECTION FV_IMAGE =3D FVMAIN + } + } + + +##########################################################################= ###### +# +# Rules are use with the [FV] section's module INF type to define +# how an FFS file is created for a given INF file. The following Rule are = the default +# rules for the different module type. User can add the customized rules t= o define the +# content of the FFS file. +# +##########################################################################= ###### + + +##########################################################################= ## +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section = # +##########################################################################= ## +# +#[Rule.Common.DXE_DRIVER] +# FILE DRIVER =3D $(NAMED_GUID) { +# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_= NAME).depex +# COMPRESS PI_STD { +# GUIDED { +# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi +# UI STRING=3D"$(MODULE_NAME)" Optional +# VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_N= UMBER) +# } +# } +# } +# +##########################################################################= ## + +# +# These SEC rules are used for ArmPlatformPkg/PrePi module. +# ArmPlatformPkg/PrePi is declared as a SEC module to make GenFv patch the +# UEFI Firmware to jump to ArmPlatformPkg/PrePi entrypoint +# + +[Rule.Common.SEC] + FILE SEC =3D $(NAMED_GUID) RELOCS_STRIPPED FIXED { + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME).efi + } + +[Rule.Common.PEI_CORE] + FILE PEI_CORE =3D $(NAMED_GUID) { + TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING =3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.PEIM] + FILE PEIM =3D $(NAMED_GUID) { + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.PEIM.TIANOCOMPRESSED] + FILE PEIM =3D $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED =3D TR= UE { + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + } + +[Rule.Common.DXE_CORE] + FILE DXE_CORE =3D $(NAMED_GUID) { + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.UEFI_DRIVER] + FILE DRIVER =3D $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NA= ME).depex + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.DXE_DRIVER] + FILE DRIVER =3D $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NA= ME).depex + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.DXE_RUNTIME_DRIVER] + FILE DRIVER =3D $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NA= ME).depex + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + } + +[Rule.Common.UEFI_APPLICATION] + FILE APPLICATION =3D $(NAMED_GUID) { + UI STRING =3D"$(MODULE_NAME)" Optional + PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi + } + +[Rule.Common.UEFI_DRIVER.BINARY] + FILE DRIVER =3D $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING=3D"$(MODULE_NAME)" Optional + VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_NUMBE= R) + } + +[Rule.Common.UEFI_APPLICATION.BINARY] + FILE APPLICATION =3D $(NAMED_GUID) { + PE32 PE32 |.efi + UI STRING=3D"$(MODULE_NAME)" Optional + VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_NUMBE= R) + } + +[Rule.Common.USER_DEFINED.ACPITABLE] + FILE FREEFORM =3D $(NAMED_GUID) { + RAW ACPI |.acpi + RAW ASL |.aml + } --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel