From nobody Fri May 3 23:35:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1513758103660692.0098425971523; Wed, 20 Dec 2017 00:21:43 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 7D511222447C7; Wed, 20 Dec 2017 00:16:54 -0800 (PST) Received: from mail-pf0-x22c.google.com (mail-pf0-x22c.google.com [IPv6:2607:f8b0:400e:c00::22c]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4C9B2208F7A58 for ; Wed, 20 Dec 2017 00:16:53 -0800 (PST) Received: by mail-pf0-x22c.google.com with SMTP id e3so12271332pfi.10 for ; Wed, 20 Dec 2017 00:21:40 -0800 (PST) Received: from localhost.localdomain ([45.56.152.249]) by smtp.gmail.com with ESMTPSA id h13sm30349169pfi.40.2017.12.20.00.21.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Dec 2017 00:21:39 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::22c; helo=mail-pf0-x22c.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=wFrMdnXCosxPfUFMrvmZA0EmNIbL8FxHxluTrohFMuQ=; b=ePqPAQWYVXdhVdUAwWEh85e8MdSfCMoCI9BCMBIi+ukuwucmjU8B+la2kqCfKZ0s9k NTXjy+eVND7l+TbzFAOyQV3lxDREYlydWFHfAirY+Opean37FV6KY/8VhwoC4MXe6zq+ kS/cDBcyafFTO3+fp6hfjLvRuzEvjIUlhg+fs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=wFrMdnXCosxPfUFMrvmZA0EmNIbL8FxHxluTrohFMuQ=; b=rU+88zMFfXNgFQ28f5desVKABslGXMUJRTBj2q+mROd081azQCsD7B794D3kJE+X9h YFmMwZPvD+X0gMlwEeDjgw3aktdVEVsTPCOlYk5qvX8I9hqym3nhXIcyUBBg968KRn8F 2fGCKqrZzidZnj8R8AzW3D3wlgnNUw/zHi1M68X8i7r2o7dbmfD6Gumv/oIdX3JklyPH ul8u03YW3sn2T0143XCDsR+Dr2ePR9nFvn58pmRkLfItiYxcTXvHPylHFVMylvfUrl87 F1eJM3ojfeVNuGces3Dtg5oBItkR9LvaUvKa0X8Y5kTm9Q+3grnWe72Asg+BV1sCUcH9 eHSg== X-Gm-Message-State: AKGB3mKmK1z9s70tVrCxYPeaMXkxawvUKk69SUNnhx7ZIpS/TSDWgRY9 ndzC4aoM6jlACxIs39PJJxT3BcoyJa8= X-Google-Smtp-Source: ACJfBovGNL4yIgOAWvkr6btXN11seaF/UV2e7Uorce6/OM0fg6Inlb32DLFdi3AhlLj67J+w3jFKvQ== X-Received: by 10.99.170.1 with SMTP id e1mr5826871pgf.120.1513758100041; Wed, 20 Dec 2017 00:21:40 -0800 (PST) From: Heyi Guo To: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org Date: Wed, 20 Dec 2017 16:21:18 +0800 Message-Id: <1513758078-99534-1-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 2.7.4 Subject: [edk2] [RFC] MdeModulePkg/PciHostBridge: Add address translation support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ruiyu Ni , Eric Dong , Jason Zhang , Ard Biesheuvel , Heyi Guo , Star Zeng MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" PCIe on some ARM platforms requires address translation, not only for legacy IO access, but also for 32bit memory BAR access as well. There will be "Address Translation Unit" or something similar in PCI host bridges to translation CPU address to PCI address and vice versa. So we think it may be useful to add address translation support to the generic PCI host bridge driver. This RFC only contains one minor change to the definition of PciHostBridgeLib, and there certainly will be a lot of other changes to make it work, including: 1. Use CPU address for GCD space add and allocate operations, instead of PCI address; also IO space will be changed to memory space if translation exists. 2. RootBridgeIoMemRead/Write, RootBridgeIoRead/Write need to get translation of the corresponding aperture, add the translation to the input address, and then call CpuIo2 protocol; IO access will also be converted to memory access if IO translation exists. 3. RootBridgeIoConfiguration needs to fill AddrTranslationOffset in the discriptor. If it makes sense, then I'll continue to prepare the formal patch. Any comments? Thanks, Gary (Heyi Guo) Cc: Star Zeng Cc: Eric Dong Cc: Ruiyu Ni Cc: Ard Biesheuvel Cc: Jason Zhang --- MdeModulePkg/Include/Library/PciHostBridgeLib.h | 1 + 1 file changed, 1 insertion(+) diff --git a/MdeModulePkg/Include/Library/PciHostBridgeLib.h b/MdeModulePkg= /Include/Library/PciHostBridgeLib.h index d42e9ec..b9e8c0f 100644 --- a/MdeModulePkg/Include/Library/PciHostBridgeLib.h +++ b/MdeModulePkg/Include/Library/PciHostBridgeLib.h @@ -22,6 +22,7 @@ typedef struct { UINT64 Base; UINT64 Limit; + UINT64 Translation; } PCI_ROOT_BRIDGE_APERTURE; =20 typedef struct { --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel