From nobody Wed May 1 08:32:02 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 150294146167337.8549922484965; Wed, 16 Aug 2017 20:44:21 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A736021E2DA58; Wed, 16 Aug 2017 20:41:51 -0700 (PDT) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AF51421E2DA48 for ; Wed, 16 Aug 2017 20:41:49 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP; 16 Aug 2017 20:44:16 -0700 Received: from ydong10-win10.ccr.corp.intel.com ([10.239.158.51]) by orsmga002.jf.intel.com with ESMTP; 16 Aug 2017 20:44:15 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,386,1498546800"; d="scan'208";a="124570786" From: Eric Dong To: edk2-devel@lists.01.org Date: Thu, 17 Aug 2017 11:44:12 +0800 Message-Id: <1502941453-12332-2-git-send-email-eric.dong@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 In-Reply-To: <1502941453-12332-1-git-send-email-eric.dong@intel.com> References: <1502941453-12332-1-git-send-email-eric.dong@intel.com> Subject: [edk2] [Patch 1/2] UefiCpuPkg/CpuCommonFeaturesLib: Add CPUID MCA support check X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Kinney , Ruiyu Ni MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add CPUID check to see if the CPU supports the Machine Check Architecture before accessing the Machine Check Architecture related MSRs. Cc: Michael Kinney Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong Reviewed-by: Ruiyu Ni --- UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c b/UefiCpuPkg/Li= brary/CpuCommonFeaturesLib/Lmce.c index 65e5cd3..bf7e26b 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Lmce.c @@ -41,6 +41,10 @@ LmceSupport ( { MSR_IA32_MCG_CAP_REGISTER McgCap; =20 + if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) { + return FALSE; + } + McgCap.Uint64 =3D AsmReadMsr64 (MSR_IA32_MCG_CAP); if (ProcessorNumber =3D=3D 0) { DEBUG ((EFI_D_INFO, "LMCE eanble =3D %x\n", (BOOLEAN) (McgCap.Bits.MCG= _LMCE_P !=3D 0))); --=20 2.7.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Wed May 1 08:32:02 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1502941464025759.785730865447; Wed, 16 Aug 2017 20:44:24 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E1B2021E2DA5C; Wed, 16 Aug 2017 20:41:53 -0700 (PDT) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BC9D821E2DA4F for ; Wed, 16 Aug 2017 20:41:50 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP; 16 Aug 2017 20:44:17 -0700 Received: from ydong10-win10.ccr.corp.intel.com ([10.239.158.51]) by orsmga002.jf.intel.com with ESMTP; 16 Aug 2017 20:44:16 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,386,1498546800"; d="scan'208";a="124570789" From: Eric Dong To: edk2-devel@lists.01.org Date: Thu, 17 Aug 2017 11:44:13 +0800 Message-Id: <1502941453-12332-3-git-send-email-eric.dong@intel.com> X-Mailer: git-send-email 2.7.0.windows.1 In-Reply-To: <1502941453-12332-1-git-send-email-eric.dong@intel.com> References: <1502941453-12332-1-git-send-email-eric.dong@intel.com> Subject: [edk2] [Patch 2/2] UefiCpuPkg/CpuCommonFeaturesLib: Merge machine check code to same file. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Kinney , Ruiyu Ni MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Original code about Local Machine Check exception feature saves in a discrete file, because features related to machine check architecture all saved in MachineCheck.c file. This patch moved LMCE logic to same file for easy maintenance. Cc: Michael Kinney Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Eric Dong Reviewed-by: Ruiyu Ni --- .../CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | 1 - .../Library/CpuCommonFeaturesLib/MachineCheck.c | 81 ++++++++++++++++++= ++++ 2 files changed, 81 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.i= nf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf index 9fc3a9c..e9225bb 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf @@ -48,7 +48,6 @@ PendingBreak.c X2Apic.c Ppin.c - Lmce.c ProcTrace.c =20 [Packages] diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiC= puPkg/Library/CpuCommonFeaturesLib/MachineCheck.c index 72f665d..b012c69 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c @@ -229,3 +229,84 @@ McgCtlInitialize ( return RETURN_SUCCESS; } =20 +/** + Detects if Local machine check exception feature supported on current=20 + processor. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + + @retval TRUE Local machine check exception feature is supported. + @retval FALSE Local machine check exception feature is not supported. + + @note This service could be called by BSP/APs. +**/ +BOOLEAN +EFIAPI +LmceSupport ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData OPTIONAL + ) +{ + MSR_IA32_MCG_CAP_REGISTER McgCap; + + if (!McaSupport (ProcessorNumber, CpuInfo, ConfigData)) { + return FALSE; + } + + McgCap.Uint64 =3D AsmReadMsr64 (MSR_IA32_MCG_CAP); + if (ProcessorNumber =3D=3D 0) { + DEBUG ((EFI_D_INFO, "LMCE eanble =3D %x\n", (BOOLEAN) (McgCap.Bits.MCG= _LMCE_P !=3D 0))); + } + return (BOOLEAN) (McgCap.Bits.MCG_LMCE_P !=3D 0); +} + +/** + Initializes Local machine check exception feature to specific state. + + @param[in] ProcessorNumber The index of the CPU executing this functio= n. + @param[in] CpuInfo A pointer to the REGISTER_CPU_FEATURE_INFOR= MATION + structure for the CPU executing this functi= on. + @param[in] ConfigData A pointer to the configuration buffer retur= ned + by CPU_FEATURE_GET_CONFIG_DATA. NULL if + CPU_FEATURE_GET_CONFIG_DATA was not provide= d in + RegisterCpuFeature(). + @param[in] State If TRUE, then the Local machine check excep= tion + feature must be enabled. + If FALSE, then the Local machine check exce= ption + feature must be disabled. + + @retval RETURN_SUCCESS Local machine check exception feature is in= itialized. + +**/ +RETURN_STATUS +EFIAPI +LmceInitialize ( + IN UINTN ProcessorNumber, + IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, + IN VOID *ConfigData, OPTIONAL + IN BOOLEAN State + ) +{ + MSR_IA32_FEATURE_CONTROL_REGISTER *MsrRegister; + + ASSERT (ConfigData !=3D NULL); + MsrRegister =3D (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData; + if (MsrRegister[ProcessorNumber].Bits.Lock =3D=3D 0) { + CPU_REGISTER_TABLE_WRITE_FIELD ( + ProcessorNumber, + Msr, + MSR_IA32_FEATURE_CONTROL, + MSR_IA32_FEATURE_CONTROL_REGISTER, + Bits.LmceOn, + (State) ? 1 : 0 + ); + } + return RETURN_SUCCESS; +} --=20 2.7.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel