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Mon, 25 Dec 2023 09:33:22 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming via groups.io" To: , , "'Michael D Kinney'" Cc: "'Zhiguang Liu'" , "'Laszlo Ersek'" References: <20231212130932.2467028-1-lichao@loongson.cn> <17A017B459AD36A8.31409@groups.io> <00f401da327c$4c735010$e559f030$@byosoft.com.cn> <515091b3-35d9-44b0-befe-a2874f56ba75@loongson.cn> <00a801da33dd$a06ba890$e142f9b0$@byosoft.com.cn> In-Reply-To: Subject: =?UTF-8?B?5Zue5aSNOiDlm57lpI06IOWbnuWkjTogW2VkazItZGV2ZWxdIFtQQVRDSCB2NCAwOS8zN10gTWRlUGtnOiBBZGQgYSBuZXcgbGlicmFyeSBuYW1lZCBQZWlTZXJ2aWNlc1RhYmxlUG9pbnRlckxpYktzMA==?= Date: Mon, 25 Dec 2023 09:33:23 +0800 Message-ID: <027101da36d2$59ac5830$0d050890$@byosoft.com.cn> MIME-Version: 1.0 Thread-Index: AQCEYG8EQWgyRBqnKjP2eTsQI6iJCAOQYeSQAxrmPF8CW8FPCQH3s99HAgEWD/ICDwKIobLsaqxA Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,gaoliming@byosoft.com.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Iq4gRjCg4oSGDBkTmGi0VKvex1787277AA= Content-Type: multipart/alternative; boundary="----=_NextPart_000_0272_01DA3715.67D1E220" Content-Language: zh-cn X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1703468021333100001 ------=_NextPart_000_0272_01DA3715.67D1E220 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Chao: I add my comments below.=20 =20 =E5=8F=91=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io = =E4=BB=A3=E8=A1=A8 Chao Li =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2023=E5=B9=B412=E6=9C=8821=E6=97=A5 1= 9:19 =E6=94=B6=E4=BB=B6=E4=BA=BA: gaoliming ; devel@ed= k2.groups.io; 'Michael D Kinney' =E6=8A=84=E9=80=81: 'Zhiguang Liu' ; 'Laszlo Ersek'= =E4=B8=BB=E9=A2=98: Re: =E5=9B=9E=E5=A4=8D: =E5=9B=9E=E5=A4=8D: [edk2-devel= ] [PATCH v4 09/37] MdePkg: Add a new library named PeiServicesTablePointerL= ibKs0 =20 Hi Liming, Sorry, I forget to CC you when I submitted the patch that modified the Debu= gSupport.h, I originally planned to CC you when I submitted V5. My answer: =20 Thanks, Chao On 2023/12/21 15:16, gaoliming wrote: Chao: For the changes in MdePkg, I have two comments here.=20 =20 1. DebugSupport.h definition is from UEFI spec. Current definitions match = the latest spec UEFI2.10. And, current definitions follow the same style to= other archs.=20 I have submit the ECR to USWG(https://mantis.uefi.org/mantis/view.php?id=3D= 2431), and the ECR was marked "Added to homework pile" at 12/06/2023 USWG m= eeting, here is the meeting minutes link: https://members.uefi.org/wg/uswg/= mail/thread/9948. The USWG meeting saied may be V2.11 will release 2024, I'm not sure, so the= ECR is code first. Can I submit the code and merge the code first, and wait for the V2.11 to b= e release? If we wait for the V2.11 to be release first, I guss we will pro= bably wait a long time. In fact, RISC-V also modified this file when submit= ting the virtual-machine code, and the code does not match to the V2.10... So, please help to merge first, please... [Liming] I understand current situation. Code first process is to add the c= ode implementation in edk2 staging branch. I may suggest to delay this chan= ge only. Other changes can be continued to be merged.=20 Thanks 2. CpuLib.h. The patch removes #if defined (MDE_CPU_IA32) || defined (MDE_= CPU_X64), then these APIs are exposed for all archs, but ARM and RISCV don= =E2=80=99t support them. So, I suggest to update it as below. =20 =20 #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) =3D=3D> #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) || defined (MDE_CPU_LOO= NGARCH64)=20 Agree, I will fix it in V5. =20 Thanks Liming =E5=8F=91=E4=BB=B6=E4=BA=BA: Chao Li =20 =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2023=E5=B9=B412=E6=9C=8820=E6=97=A5 9= :21 =E6=94=B6=E4=BB=B6=E4=BA=BA: gaoliming <= gaoliming@byosoft.com.cn>; devel@edk2.groups.io ; 'Michael D Kinney' =E6=8A=84=E9=80=81: 'Zhiguang Liu' ; 'Laszlo Ersek' =E4=B8=BB=E9=A2=98: Re: =E5=9B=9E=E5=A4=8D: [edk2-devel] [PATCH v4 09/37] M= dePkg: Add a new library named PeiServicesTablePointerLibKs0 =20 Hi Liming, Yes, the code branch is in my private repo, here is the link: https://githu= b.com/kilaterlee/edk2/tree/push1102 =20 Thanks, Chao On 2023/12/19 21:07, gaoliming wrote: Chao: Is there a branch or pull request for this patch set? I would like to chec= k how this new library instance be used. =20 Thanks Liming =E5=8F=91=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io =E4=BB=A3=E8=A1= =A8 Chao Li =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2023=E5=B9=B412=E6=9C=8819=E6=97=A5 2= 1:01 =E6=94=B6=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io ; Michael D Kinney ; Liming Gao =E6=8A=84=E9=80=81: Zhiguang Liu ; Laszlo Ersek =E4=B8=BB=E9=A2=98: Re: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new lib= rary named PeiServicesTablePointerLibKs0 =20 Hi Mike and Liming, Can you please review this patch? Thank you!=20 =20 Thanks, Chao On 2023/12/12 21:11, Chao Li wrote: Adding PeiServicesTablePointerLibKs0 for LoongArch64, which provides setting and getting the PEI service table pointer through the CSR KS0 register. =20 The idea of this library is derived from ArmPkg/Library/PeiServicesTablePointerLib/ =20 BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4584 =20 Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Laszlo Ersek Signed-off-by: Chao Li --- .../Library/PeiServicesTablePointerLib.h | 9 +- .../PeiServicesTablePointer.c | 87 +++++++++++++++++++ .../PeiServicesTablePointerLibKs0.inf | 37 ++++++++ .../PeiServicesTablePointerLibKs0.uni | 20 +++++ MdePkg/MdePkg.dsc | 3 + 5 files changed, 152 insertions(+), 4 deletions(-) create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiService= sTablePointer.c create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiService= sTablePointerLibKs0.inf create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiService= sTablePointerLibKs0.uni =20 diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg/I= nclude/Library/PeiServicesTablePointerLib.h index 61635eff00..f85c38363c 100644 --- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h +++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h @@ -52,10 +52,11 @@ SetPeiServicesTablePointer ( immediately preceding the Interrupt Descriptor Table (IDT) in memory. For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes immediately preceding the Interrupt Descriptor Table (IDT) in memory. - For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in - a dedicated CPU register. This means that there is no memory storage - associated with storing the PEI Services Table pointer, so no additional - migration actions are required for Itanium or ARM CPUs. + For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer + is stored in a dedicated CPU register. This means that there is no + memory storage associated with storing the PEI Services Table pointer, + so no additional migration actions are required for Itanium, ARM and + LoongArch CPUs. =20 **/ VOID diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTableP= ointer.c b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePoi= nter.c new file mode 100644 index 0000000000..2560b232f9 --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c @@ -0,0 +1,87 @@ +/** @file + PEI Services Table Pointer Library For Reigseter Mechanism. + + This library is used for PEIM which does executed from flash device dire= ctly but + executed in memory. + + Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+ Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.
+ Copyright (c) 2023 Loongson Technology Corporation Limited. All rights r= eserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include + +/** + Caches a pointer PEI Services Table. + + Caches the pointer to the PEI Services Table specified by PeiServicesTab= lePointer + in a platform specific manner. + + If PeiServicesTablePointer is NULL, then ASSERT(). + + @param PeiServicesTablePointer The address of PeiServices pointer. +**/ +VOID +EFIAPI +SetPeiServicesTablePointer ( + IN CONST EFI_PEI_SERVICES **PeiServicesTablePointer + ) +{ + ASSERT (PeiServicesTablePointer !=3D NULL); + CsrWrite (LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer); +} + +/** + Retrieves the cached value of the PEI Services Table pointer. + + Returns the cached value of the PEI Services Table pointer in a CPU spec= ific manner + as specified in the CPU binding section of the Platform Initialization P= re-EFI + Initialization Core Interface Specification. + + If the cached PEI Services Table pointer is NULL, then ASSERT(). + + @return The pointer to PeiServices. + +**/ +CONST EFI_PEI_SERVICES ** +EFIAPI +GetPeiServicesTablePointer ( + VOID + ) +{ + CONST EFI_PEI_SERVICES **PeiServices; + + PeiServices =3D (CONST EFI_PEI_SERVICES **)(CsrRead (LOONGARCH_CSR_KS0)); + ASSERT (PeiServices !=3D NULL); + return PeiServices; +} + +/** + Perform CPU specific actions required to migrate the PEI Services Table + pointer from temporary RAM to permanent RAM. + + For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes + immediately preceding the Interrupt Descriptor Table (IDT) in memory. + For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes + immediately preceding the Interrupt Descriptor Table (IDT) in memory. + For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer + is stored in a dedicated CPU register. This means that there is no + memory storage associated with storing the PEI Services Table pointer, + so no additional migration actions are required for Itanium, ARM and + LoongArch CPUs. + +**/ +VOID +EFIAPI +MigratePeiServicesTablePointer ( + VOID + ) +{ + return; +} diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTableP= ointerLibKs0.inf b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServices= TablePointerLibKs0.inf new file mode 100644 index 0000000000..e8ecd4616d --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerL= ibKs0.inf @@ -0,0 +1,37 @@ +## @file +# Instance of PEI Services Table Pointer Library using register CSR KS0 fo= r the table pointer. +# +# PEI Services Table Pointer Library implementation that retrieves a point= er to the +# PEI Services Table from a CPU register. Applies to modules that execute = from +# read-only memory. +# +# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.
+# Copyright (c) 2023 Loongson Technology Corporation Limited. All rights r= eserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +# +## + +[Defines] + INF_VERSION =3D 1.29 + BASE_NAME =3D PeiServicesTablePointerLib + MODULE_UNI_FILE =3D PeiServicesTablePointerLibKs0.uni + FILE_GUID =3D 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B7 + MODULE_TYPE =3D PEIM + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PeiServicesTablePointerLib|PEIM PEI_C= ORE SEC + +# +# VALID_ARCHITECTURES =3D LOONGARCH64 +# + +[Sources] + PeiServicesTablePointer.c + +[Packages] + MdePkg/MdePkg.dec + +[LibraryClasses] + DebugLib diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTableP= ointerLibKs0.uni b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServices= TablePointerLibKs0.uni new file mode 100644 index 0000000000..2539448ce5 --- /dev/null +++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerL= ibKs0.uni @@ -0,0 +1,20 @@ +// /** @file +// Instance of PEI Services Table Pointer Library using register CSR KS0 f= or the table pointer. +// +// PEI Services Table Pointer Library implementation that retrieves a poin= ter to the +// PEI Services Table from a CPU register. Applies to modules that execute= from +// read-only memory. +// +// Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
+// Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.
+// Copyright (c) 2023 Loongson Technology Corporation Limited. All rights = reserved.
+// +// SPDX-License-Identifier: BSD-2-Clause-Patent +// +// **/ + + +#string STR_MODULE_ABSTRACT #language en-US "Instance of PEI S= ervices Table Pointer Library using CPU register for the table pointer" + +#string STR_MODULE_DESCRIPTION #language en-US "The PEI Services = Table Pointer Library implementation that retrieves a pointer to the PEI Se= rvices Table from a CPU register. Applies to modules that execute from read= -only memory." + diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc index 3abd1a1e23..109224c527 100644 --- a/MdePkg/MdePkg.dsc +++ b/MdePkg/MdePkg.dsc @@ -200,4 +200,7 @@ MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib= .inf MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib= Ram.inf =20 +[Components.LOONGARCH64] + MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibK= s0.inf + [BuildOptions] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112877): https://edk2.groups.io/g/devel/message/112877 Mute This Topic: https://groups.io/mt/103355356/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- ------=_NextPart_000_0272_01DA3715.67D1E220 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Chao:

=C2=A0I= add my comments below.

&= nbsp;

=E5=8F=91=E4=BB=B6=E4=BA= =BA: devel@edk2.groups.io <devel@= edk2.groups.io> =E4=BB=A3=E8=A1=A8 Chao Li
<= span style=3D'font-size:11.0pt;font-family:=E7=AD=89=E7=BA=BF'>=E5=8F=91=E9= =80=81=E6=97=B6=E9=97=B4: 2023=E5=B9=B4<= span lang=3DEN-US>12=E6=9C=8821=E6=97=A5 19:19
=E6=94=B6=E4=BB=B6=E4=BA=BA: gaoliming <gaoliming@byosoft.co= m.cn>; devel@edk2.groups.io; 'Michael D Kinney' <michael.d.kinney@int= el.com>
=E6=8A=84=E9=80=81: 'Zhiguang Liu' <zhiguang.liu@intel.com>; 'Laszlo Er= sek' <lersek@redhat.com>
=E4=B8=BB=E9=A2=98: Re: =E5=9B=9E=E5=A4=8D: =E5=9B=9E=E5=A4=8D: [edk2-devel] [PA= TCH v4 09/37] MdePkg: Add a new library named PeiServicesTablePointerLibKs0=

 

Hi Liming,

Sorry, I forget to CC you when I su= bmitted the patch that modified the DebugSupport.h, I originally planned to= CC you when I submitted V5.

My answer:

 

Thanks,
Chao

On 2023/12/21 15:16, gaolimin= g wrote:

Chao:<= o:p>

 For the changes in MdePkg= , I have two comments here.

 <= /p>

1.&n= bsp; DebugSupport.h definition is from UEF= I spec. Current definitions match the latest spec UEFI2.10. And, current de= finitions follow the same style to other archs. <= o:p>

I have submit the E= CR to USWG(ht= tps://mantis.uefi.org/mantis/view.php?id=3D2431), and the ECR was marke= d "Added to homework pile" at 12/06/2023 USWG meeting, here is th= e meeting minutes link: https://members.uefi.org/wg/uswg/mail/thread/9948.

The USWG meeting saied may be V2.11 will = release 2024, I'm not sure, so the ECR is code first.

=

Can I submit the code and merge the code first, and w= ait for the V2.11 to be release? If we wait for the V2.11 to be release fir= st, I guss we will probably wait a long time. In fact, RISC-V also modified= this file when submitting the virtual-machine code, and the code does not = match to the V2.10...

So, please= help to merge first, please...

[Liming] I unders= tand current situation. Code first process is to add the code implementatio= n in edk2 staging branch. I may suggest to delay this change only. Other ch= anges can be continued to be merged.

Thanks=

2.&nbs= p; CpuLib.h. The patch removes #if defined= (MDE_CPU_IA32) || defined (MDE_CPU_X64), then these APIs are exposed for a= ll archs, but ARM and RISCV don=E2=80=99t support them. So, = I suggest to update it as below.  

 <= o:p>

#if defined (MDE_CPU_IA32) || d= efined (MDE_CPU_X64)

=C3=A8

#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) || defined (= MDE_CPU_LOONGARCH64)

Agree, I will fix it in V5.<= br>

 

Thanks=

Liming

=E5=8F=91=E4=BB=B6=E4= =BA=BA: Chao Li <lichao@loongson.cn>
=E5=8F=91=E9=80=81=E6= =97=B6=E9=97=B4: 2023=E5=B9=B412=E6=9C=8820=E6=97=A5 9:21
=E6=94=B6=E4=BB=B6=E4=BA=BA:= gaoliming <gaoliming@byosoft.com.cn>; devel@edk2.groups.io; 'Michael D Kinney' <michael.d.kinney@intel.com>
=E6=8A=84=E9=80=81: = 'Zhiguang Liu' <zhiguang.liu@i= ntel.com>; 'Laszlo Ersek' <l= ersek@redhat.com>
=E4=B8=BB=E9=A2=98= : Re: =E5=9B=9E=E5=A4=8D: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new library named PeiSer= vicesTablePointerLibKs0<= /p>

 

Hi Liming,<= span lang=3DEN-US>

Yes, the code branch is in my private repo, here is the link:= https://githu= b.com/kilaterlee/edk2/tree/push1102

 <= /span>

Thanks,
Chao

=

On 2023/12/19 21:07, gao= liming wrote:

Chao:

 Is there a branch or= pull request for this patch set? I would like to check how this new librar= y instance be used.

 

Thanks

<= p class=3DMsoNormal>Liming

=E5=8F=91=E4=BB=B6=E4=BA=BA:= devel@edk2.gro= ups.io <devel@edk2.groups.io= > =E4=BB=A3=E8=A1=A8 Chao Li
=E5=8F=91=E9=80=81=E6=97= =B6=E9=97=B4: 2023=E5=B9=B412=E6=9C=8819=E6=97=A5 21:01
=E6=94=B6=E4=BB=B6=E4=BA=BA= : dev= el@edk2.groups.io; Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>
=E6=8A=84=E9=80=81: = Zhiguang Liu <zhiguang.liu@int= el.com>; Laszlo Ersek <lerse= k@redhat.com>
=E4=B8=BB=E9=A2=98: Re: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a= new library named PeiServicesTablePointerLibKs0

 

Hi Mike and Liming,

<= p class=3DMsoNormal>Can you p= lease review this patch? Thank you!

 

Thanks,
Chao

On 2023/12/12 21:11, Chao L= i wrote:

Adding PeiServicesTablePointerL=
ibKs0 for LoongArch64, which provides
setting and getting the PEI service table pointer through the CSR=
 KS0
register.
 
The idea of this library is derived from
ArmPkg/Library/PeiServicesTablePointerLib/
 
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4584
 
= 
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Laszlo Ersek <lersek=
@redhat.com>
Signed-o=
ff-by: Chao Li <lichao@loongson.cn=
>
---
 .../Library/PeiServicesTablePointerLib.h&n=
bsp;     |  9 +-
 .../PeiServicesTablePointer.c     &=
nbsp;           | 87 ++++=
+++++++++++++++
 .../PeiServ=
icesTablePointerLibKs0.inf         =
| 37 ++++++++
 .../PeiServic=
esTablePointerLibKs0.uni         | =
20 +++++
 MdePkg/MdePkg.dsc&=
nbsp;           &nbs=
p;            &=
nbsp;   |  3 +
 5 files changed, 152 insertions(+), 4 deletions(-)
 create mode 100644 MdePkg/Library/PeiServicesTab=
lePointerLibKs0/PeiServicesTablePointer.c
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLib=
Ks0/PeiServicesTablePointerLibKs0.inf
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/=
PeiServicesTablePointerLibKs0.uni
 
diff --git a/Md=
ePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg/Include/Library/=
PeiServicesTablePointerLib.h
index 61635eff00..f85c38363c 100644
--- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h
+++ b/MdePkg/Include/Library/PeiServ=
icesTablePointerLib.h
@@ -52=
,10 +52,11 @@ SetPeiServicesTablePointer (
   immediately preceding the Interrupt Descriptor =
Table (IDT) in memory.
 =
;  For X64 CPUs, the PEI Services Table pointer is stored in the 8 byt=
es
   immediately =
preceding the Interrupt Descriptor Table (IDT) in memory.=

-  For Itanium and ARM CPUs, a the PEI S=
ervices Table Pointer is stored in
-  a dedicated CPU register.  This means that there is n=
o memory storage
-  ass=
ociated with storing the PEI Services Table pointer, so no additional<=
/o:p>
-  migration actions are req=
uired for Itanium or ARM CPUs.
+  For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Po=
inter
+  is stored in a=
 dedicated CPU register.  This means that there is no
+  memory storage associated with stori=
ng the PEI Services Table pointer,
+  so no additional migration actions are required for Itaniu=
m, ARM and
+  LoongArch=
 CPUs.
 
 **/
 VOID
diff --git a=
/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c b/M=
dePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c<=
/o:p>
new file mode 100644
index 0000000000..2560b232f9<=
/span>
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/Pe=
iServicesTablePointer.c
@@ -=
0,0 +1,87 @@
+/** @file=

+  PEI Services Table Point=
er Library For Reigseter Mechanism.
+
+  This libr=
ary is used for PEIM which does executed from flash device directly but
+  executed in memory.
+
<=
span lang=3DEN-US>+  Copyright (c) 2006 - 2010, Intel Corporation. All=
 rights reserved.<BR>
=
+  Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved=
.<BR>
+  Copyrigh=
t (c) 2023 Loongson Technology Corporation Limited. All rights reserved.<=
;BR>
+<=
/pre>
+  SPDX-License-Identifier: BSD-2-Clause-=
Patent
+
+**/
+
+#include <PiPei.h=
>
+#include <Library/D=
ebugLib.h>
+#include <=
Library/PeiServicesTablePointerLib.h>
+#include <Register/LoongArch64/Csr.h>=

+
+/**
+  Caches a po=
inter PEI Services Table.
+<=
o:p>
+  Caches the pointer t=
o the PEI Services Table specified by PeiServicesTablePointer
+  in a platform specific manner.
+
=
+  If PeiServicesTablePointer is NULL, then ASSERT(=
).
+
=

+  @param    PeiServicesTablePo=
inter   The address of PeiServices pointer.
+**/
+VOID
+EFIAPI<=
/span>
+SetPeiServicesTablePointer (
+  IN CONST EFI_PEI_SERVICES&nbs=
p; **PeiServicesTablePointer
+  )
+{
+  ASSERT (PeiServicesTablePointer !=
=3D NULL);
+  CsrWrite =
(LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer);
+}
=
+
+/**
+  Retrieves the cached value of the PEI Ser=
vices Table pointer.
+<=
/o:p>
+  Returns the cached value =
of the PEI Services Table pointer in a CPU specific manner
+  as specified in the CPU binding sect=
ion of the Platform Initialization Pre-EFI
+  Initialization Core Interface Specification.
+
+  If the cached PEI Services Table pointer is NULL, the=
n ASSERT().
+
+  @return  The pointer to PeiSe=
rvices.
+<=
/pre>
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServices=
TablePointer (
+  VOID<=
o:p>
+  )<=
/pre>
+{
+  CONST EFI_PEI_SERVICES  **PeiServices;
+
+  PeiServices =3D (CONST EFI_PEI_SERVICES **)(CsrRead (LOONGARCH_CS=
R_KS0));
+  ASSERT (Pei=
Services !=3D NULL);
+ =
 return PeiServices;
+}=

+
+/**
+ =
; Perform CPU specific actions required to migrate the PEI Services Table
+  pointer from temporar=
y RAM to permanent RAM.
+
+  For IA32 CPUs, the PEI=
 Services Table pointer is stored in the 4 bytes
+  immediately preceding the Interrupt Descriptor=
 Table (IDT) in memory.
+&nb=
sp; For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+  immediately preceding=
 the Interrupt Descriptor Table (IDT) in memory.
+  For Itanium, ARM and LoongArch CPUs, a the PEI=
 Services Table Pointer
+&nb=
sp; is stored in a dedicated CPU register.  This means that there is n=
o
+  memory storage ass=
ociated with storing the PEI Services Table pointer,
+  so no additional migration actions are req=
uired for Itanium, ARM and
+=
  LoongArch CPUs.
+
+**/
+VOID
+=
EFIAPI
+MigratePeiServicesTa=
blePointer (
+  VOID
+  )
+{
+  return;
+}
diff --git a/MdePkg/Library/PeiServ=
icesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf b/MdePkg/Library/P=
eiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
new file mode 100644
index 0000000000..e8ecd4616d<=
/pre>
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServic=
esTablePointerLibKs0.inf
@@ =
-0,0 +1,37 @@
+## @file=

+# Instance of PEI Services Tabl=
e Pointer Library using register CSR KS0 for the table pointer.<=
/span>
+#
+# PEI Services Table Pointer Library implementation that retrie=
ves a pointer to the
+# PEI =
Services Table from a CPU register. Applies to modules that execute from
+# read-only memory.
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights re=
served.<BR>
+# Copyrig=
ht (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
+# Copyright (c) 2023 Loongson =
Technology Corporation Limited. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent<=
/span>
+#
+#
+##=

+
+[Defines]
+ =
; INF_VERSION          &n=
bsp;         =3D 1.29
+  BASE_NAME    =
            &nb=
sp;     =3D PeiServicesTablePointerLib
+  MODULE_UNI_FILE   &nb=
sp;            =3D P=
eiServicesTablePointerLibKs0.uni
+  FILE_GUID         =
;             =
=3D 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B7
+  MODULE_TYPE       &=
nbsp;            =3D=
 PEIM
+  VERSION_STRING=
            &nb=
sp;    =3D 1.0
+  LIBRARY_CLASS        &nbs=
p;         =3D PeiServicesTablePoin=
terLib|PEIM PEI_CORE SEC
+
+#
+#  VALID_ARCHITECTURES    &n=
bsp;      =3D LOONGARCH64
<=
pre>+#
+<=
o:p>
+[Sources]=

+  PeiServicesTablePointer.c<=
/span>
+
+[Packages]
+ =
; MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
diff --git a/MdePkg/Library/PeiServicesTablePointerLibK=
s0/PeiServicesTablePointerLibKs0.uni b/MdePkg/Library/PeiServicesTablePoint=
erLibKs0/PeiServicesTablePointerLibKs0.uni
new file mode 100644
index 0000000000..2539448ce5
--- /dev/null
+++ =
b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs=
0.uni
@@ -0,0 +1,20 @@<=
/o:p>
+// /** @file
+// Instance of PEI Services Table Pointer Libr=
ary using register CSR KS0 for the table pointer.
+//
+/=
/ PEI Services Table Pointer Library implementation that retrieves a pointe=
r to the
+// PEI Services Ta=
ble from a CPU register. Applies to modules that execute from
+// read-only memory.
+//
+// Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.&=
lt;BR>
+// Copyright (c) =
2011 Hewlett-Packard Corporation. All rights reserved.<BR>=

+// Copyright (c) 2023 Loongson Techno=
logy Corporation Limited. All rights reserved.<BR><=
/pre>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT       =
      #language en-US "Instance of PEI Servic=
es Table Pointer Library using CPU register for the table pointer"
+
<=
span lang=3DEN-US>+#string STR_MODULE_DESCRIPTION    &n=
bsp;     #language en-US "The PEI Services Table P=
ointer Library implementation that retrieves a pointer to the PEI Services =
Table from a CPU register. Applies to modules that execute from read-only m=
emory."
+
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/M=
dePkg.dsc
index 3abd1a1e23..=
109224c527 100644
--- a/MdeP=
kg/MdePkg.dsc
+++ b/MdePkg/M=
dePkg.dsc
@@ -200,4 +200,7 @=
@
   MdePkg/Librar=
y/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib.inf<=
/span>
   MdePkg/Library/BaseSerialP=
ortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLibRam.inf
 
=
+[Components.LOONGARCH64]
+&=
nbsp; MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerL=
ibKs0.inf
+
 [BuildOptions]

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