From nobody Thu May 16 08:45:28 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+94302+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+94302+1787277+3901457@groups.io ARC-Seal: i=1; a=rsa-sha256; t=1664167144; cv=none; d=zohomail.com; s=zohoarc; b=GIRIWFW00Zk0HG0RgUDuEjPixq+Hpd3ioU+ce7c2QsYs/oxsLpEMcjYsRICfrtin1/MsOqNhk9jkzzv1Lv4Ii4qdd9ZHsW2j7ZSL1hFVqe8hHdq9dF/feSvu5qanjxLuCfKdtlVJB7HXGoBMer9oBjqW0m2aupJnpuvLM6TdQTk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1664167144; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=TU7pDzHUTMqLJZKo7TFrnApjall7zXldnJQ7SBc7YCg=; b=JBDiHDrOICJgTOHdUK5kOg2xfELyaI9aSRDjXRO8G5Hy1IA11qfpIBpqoHKGDiLVxh/do6Pq/QYNVkTv8XVNshBNFRZSUXnrkb6xg5YIPGx2J344Nc8ixrwiEcIGTZS4+KwtgrlMW6Nkry2q4flBzmtxeI8twKn0HfTkcqFj+9s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+94302+1787277+3901457@groups.io Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1664167144746816.090123110042; Sun, 25 Sep 2022 21:39:04 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id cb1pYY1788612xbwIYN47BMm; Sun, 25 Sep 2022 21:39:04 -0700 X-Received: from walk.intel-email.com (walk.intel-email.com [101.227.64.242]) by mx.groups.io with SMTP id smtpd.web10.24799.1664167141525423565 for ; Sun, 25 Sep 2022 21:39:03 -0700 X-Received: from walk.intel-email.com (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id 5ADD9CD1F66A for ; Mon, 26 Sep 2022 12:38:58 +0800 (CST) X-Received: from localhost (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id 57650CD1F65C for ; Mon, 26 Sep 2022 12:38:58 +0800 (CST) X-Received: from walk.intel-email.com (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id 1DD9CCD1F64B for ; Mon, 26 Sep 2022 12:38:58 +0800 (CST) X-Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by walk.intel-email.com (Postfix) with SMTP id A7256CD1F638 for ; Mon, 26 Sep 2022 12:38:55 +0800 (CST) X-Received: from DESKTOPS6D0PVI ([58.246.60.130]) (envelope-sender ) by 192.168.6.13 with ESMTP for ; Mon, 26 Sep 2022 12:38:54 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming via groups.io" To: "'chao li'" , "'Guomin Jiang'" , "'Baoqi Zhang'" Cc: References: <20220914094210.3699298-1-lichao@loongson.cn> In-Reply-To: Subject: =?UTF-8?B?W2VkazItZGV2ZWxdIOWbnuWkjTogW1BBVENIIHYyIDMyLzM0XSBNZGVNb2R1bGVQa2cvRHhlSXBsUGVpbSA6IExvb25nQXJjaCBEeGVJUEwgaW1wbGVtZW50YXRpb24u?= Date: Mon, 26 Sep 2022 12:38:54 +0800 Message-ID: <007a01d8d161$e263e4e0$a72baea0$@byosoft.com.cn> MIME-Version: 1.0 Thread-Index: AQJf3Wv6oDeT6ELw0HXwIGYEMnTK6gFX9lQcrNhJN7A= Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,gaoliming@byosoft.com.cn X-Gm-Message-State: IpJAE7sHXI3DcnWKdtJ6GU8kx1787277AA= Content-Type: multipart/alternative; boundary="----=_NextPart_000_007B_01D8D1A4.F08947C0" Content-Language: zh-cn DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1664167144; bh=q9VC+dv3omXY9Ag+zb9QNkvZB/3AArt3sKZshMe+tSQ=; h=Cc:Content-Type:Date:From:Reply-To:Subject:To; b=IDXLoH3M4zV4bMe9X4myLtRRZTILZD5gxTR/WUWBbVi3vmoukJ6zuv6+RdS4ELJa2kN Kx5BwAYbu2h0AEOFHGrIbrOtNi+EMmo9mHVyJghvjSqlOwqMQt/lMCbj9zlbtU2GLInE5 dLPrqbtPpZHsB5+tdU+5HcmMU+f8swi3rAw= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1664167146994100003 ------=_NextPart_000_007B_01D8D1A4.F08947C0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Reviewed-by: Liming Gao =20 =E5=8F=91=E4=BB=B6=E4=BA=BA: chao li =20 =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2022=E5=B9=B49=E6=9C=8823=E6=97=A5 15= :24 =E6=94=B6=E4=BB=B6=E4=BA=BA: Liming Gao ; Guomin = Jiang ; Baoqi Zhang =E6=8A=84=E9=80=81: devel@edk2.groups.io =E4=B8=BB=E9=A2=98: Re: [PATCH v2 32/34] MdeModulePkg/DxeIplPeim : LoongArc= h DxeIPL implementation. =20 Hi Liming and Guomin, This patch has not been reviewed, would you please review it? =20 Thanks, Chao -------- On 9=E6=9C=88 14 2022, at 5:42 =E4=B8=8B=E5=8D=88, Chao Li > wrote: REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4053 =20 Implement LoongArch DxeIPL instance. =20 Cc: Liming Gao > Cc: Guomin Jiang > =20 Signed-off-by: Chao Li > Co-authored-by: Baoqi Zhang > --- MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 6 +- .../Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c | 63 +++++++++++++++++++ 2 files changed, 68 insertions(+), 1 deletion(-) create mode 100644 MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c =20 diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/Dx= eIplPeim/DxeIpl.inf index 19b8a4c8ae..052ea0ec1a 100644 --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf @@ -8,6 +8,7 @@ # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
=20 # Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights= reserved.
=20 +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=20 # =20 # SPDX-License-Identifier: BSD-2-Clause-Patent =20 # =20 @@ -26,7 +27,7 @@ # =20 # The following information is for reference only and not required by the b= uild tools. =20 # =20 -# VALID_ARCHITECTURES =3D IA32 X64 EBC (EBC is for build only) AARCH64 RIS= CV64 =20 +# VALID_ARCHITECTURES =3D IA32 X64 EBC (EBC is for build only) AARCH64 RIS= CV64 LOONGARCH64 =20 # [Sources] =20 @@ -53,6 +54,9 @@ [Sources.RISCV64] =20 RiscV64/DxeLoadFunc.c +[Sources.LOONGARCH64] =20 + LoongArch64/DxeLoadFunc.c =20 + =20 [Packages] =20 MdePkg/MdePkg.dec =20 MdeModulePkg/MdeModulePkg.dec =20 diff --git a/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c b/MdeMo= dulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c new file mode 100644 index 0000000000..95d3af19ea --- /dev/null +++ b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c @@ -0,0 +1,63 @@ +/** @file =20 + LoongArch specifc functionality for DxeLoad. =20 + =20 + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights r= eserved.
=20 + =20 + SPDX-License-Identifier: BSD-2-Clause-Patent =20 + =20 +**/ =20 + =20 +#include "DxeIpl.h" =20 + =20 +/** =20 + Transfers control to DxeCore. =20 + =20 + This function performs a CPU architecture specific operations to execute =20 + the entry point of DxeCore with the parameters of HobList. =20 + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase. =20 + =20 + @param[in] DxeCoreEntryPoint The entry point of DxeCore. =20 + @param[in] HobList The start of HobList passed to DxeCore. =20 + =20 +**/ =20 +VOID =20 +HandOffToDxeCore ( =20 + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint, =20 + IN EFI_PEI_HOB_POINTERS HobList =20 + ) =20 +{ =20 + VOID *BaseOfStack; =20 + VOID *TopOfStack; =20 + EFI_STATUS Status; =20 + =20 + // =20 + // Allocate 128KB for the Stack =20 + // =20 + BaseOfStack =3D AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE)); =20 + ASSERT (BaseOfStack !=3D NULL); =20 + =20 + // =20 + // Compute the top of the stack we were allocated. Pre-allocate a UINTN =20 + // for safety. =20 + // =20 + TopOfStack =3D (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZ= E) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT); =20 + TopOfStack =3D ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT); =20 + =20 + // =20 + // End of PEI phase signal =20 + // =20 + Status =3D PeiServicesInstallPpi (&gEndOfPeiSignalPpi); =20 + ASSERT_EFI_ERROR (Status); =20 + =20 + // =20 + // Update the contents of BSP stack HOB to reflect the real stack info pa= ssed to DxeCore. =20 + // =20 + UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE); =20 + =20 + SwitchStack ( =20 + (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint, =20 + HobList.Raw, =20 + NULL, =20 + TopOfStack =20 + ); =20 +} =20 -- 2.27.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#94302): https://edk2.groups.io/g/devel/message/94302 Mute This Topic: https://groups.io/mt/93920996/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- ------=_NextPart_000_007B_01D8D1A4.F08947C0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Reviewed-by: Liming Gao <gaoliming@byosoft.com.= cn>

 

=E5=8F=91=E4=BB=B6=E4=BA=BA: chao li <lichao@loongson.cn>
=E5= =8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2= 022= =E5=B9=B49=E6=9C=8823= =E6=97=A5 15:24
=E6=94=B6=E4=BB=B6=E4=BA=BA= : Liming Gao <gaoliming= @byosoft.com.cn>; Guomin Jiang <guomin.jiang@intel.com>; Baoqi Zha= ng <zhangbaoqi@loongson.cn>
=E6=8A=84=E9=80=81: devel@edk2.groups.io
= =E4=B8=BB=E9=A2=98: Re: [P= ATCH v2 32/34] MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation.

 

Hi Liming and Guomin,

This patch has not been reviewed, would you please review it?

 


Thanks,
Ch= ao
--------

On 9=E6=9C=88 14 2022, at 5:42 =E4=B8=8B=E5=8D=88, Chao Li <lichao@loongson.cn> wrote:

 

Implement LoongArch DxeIPL instance.

 

Cc: Liming Gao <gaoliming@byosoft.com.cn>

<= /div>

Cc: Guomin Jiang <guomin.jiang@intel.com>

 

Signed-off-by: C= hao Li <lichao@loongson.cn>=

Co= -authored-by: Baoqi Zhang <zha= ngbaoqi@loongson.cn>

---

MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 6 +-

.../C= ore/DxeIplPeim/LoongArch64/DxeLoadFunc.c | 63 +++++++++++++++++++

2 files chan= ged, 68 insertions(+), 1 deletion(-)

create mode 100644 MdeModulePkg/Core/DxeI= plPeim/LoongArch64/DxeLoadFunc.c

 

diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf= b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf

=

index 19b8a4c8ae..052ea0ec1a 100644=

--= - a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf

+++ b/MdeModulePkg/Core/DxeIplPeim= /DxeIpl.inf

@@ -8,6 +8,7 @@

# Copyright (c) 2006 - 2019, Intel Corporation. All r= ights reserved.<BR>

<= span lang=3DEN-US> 

# Copyright (c) 2017, AMD Incorporated. All rights reserved= .<BR>

 

# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.<BR>

 

+# Copyright (c) 2022, Loongson Technology Corporation Limited= . All rights reserved.<BR>

 

#

 

# SPDX-License-Identifier: BSD-2-Clause-Patent

 

#

=

 

<= div>

@@ -26,7 +27,7 @@

#

 

# The following informat= ion is for reference only and not required by the build tools.

 

#

 

=

-# VALID_ARCHITECTURES =3D IA3= 2 X64 EBC (EBC is for build only) AARCH64 RISCV64

 

=

+# VALID_ARCHITECTURES =3D IA32 X64= EBC (EBC is for build only) AARCH64 RISCV64 LOONGARCH64<= /p>

 

#


[So= urces]

<= o:p> 

@@ = -53,6 +54,9 @@

[Sources.RISCV64]

 

RiscV64/DxeLoadFunc.c



+[Sources.= LOONGARCH64]

 

+ LoongArch64/DxeLoadFunc.c

 

+

 

[Packages]

 

MdePkg/MdePkg.dec

 

MdeModulePkg/MdeModulePkg.dec

 

diff --git a/MdeModulePkg/Core/Dx= eIplPeim/LoongArch64/DxeLoadFunc.c b/MdeModulePkg/Core/DxeIplPeim/LoongArch= 64/DxeLoadFunc.c

new file mode 100644

index 0000000000..95d3af19ea

--- /dev/null

+++ b/= MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c

@@ -0,0 +1,63 @@

+/** @fil= e

&= nbsp;

+ LoongA= rch specifc functionality for DxeLoad.

 

+

 

+ Copyright (c) 2022, Loongson Technology Corporati= on Limited. All rights reserved.<BR>

 

+

 

+ SPDX-License-Identifier: BSD-2-Clause-Patent

 =

+<= /span>

 

+**/

 =

+

 

+#include "DxeIpl.h"

 =

+<= /span>

 

+/**

 =

+ Transfers control to Dxe= Core.

 

+

 = ;

+ This funct= ion performs a CPU architecture specific operations to execute

 

+ the entry point of D= xeCore with the parameters of HobList.

 

+ It also installs EFI_END_OF_PEI_PPI to si= gnal the end of PEI phase.

=  

+

 

+ @param[in] DxeCoreEntryPoint The entry point of DxeCore.

 

+ @param[in] HobL= ist The start of HobList passed to DxeCore.

 

+

 

+**/

 

+VOID

=  

+HandOffToDxeCore (

 

+ IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,

 =

+ IN EFI_PEI_= HOB_POINTERS HobList

 

+ )

 

+{

 

+ VOID *BaseOfStack;

 

+ VOID *TopOfStack;

 

+ EFI_STATUS Status;

 

+

 

+ //

 

+ // Allocate 128KB for the Stack

 

=

+ //

 

=

+ BaseOfStack =3D AllocatePages (EF= I_SIZE_TO_PAGES (STACK_SIZE));

 

+ ASSERT (BaseOfStack !=3D NULL);

 

=

+

<= p class=3DMsoNormal> 

+ //

 

+ // Compute the top of the stack we were a= llocated. Pre-allocate a UINTN

 

+ // for safety.

 

+ //

 

+ TopOfStack =3D (VOID *)((UINTN)BaseOfStack + E= FI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);<= /o:p>

 

+ TopOfStack = =3D ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);

<= /div>

 

+

 

+ //

 

+ // End of PEI phase signal

 

+ //

 

+ Status =3D PeiServicesInsta= llPpi (&gEndOfPeiSignalPpi);

 

+ ASSERT_EFI_ERROR (Status);

 

+

 

+ //

 

+ // Update the contents of BSP stack HOB t= o reflect the real stack info passed to DxeCore.

 

<= p class=3DMsoNormal>+ //

 

+ UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(= UINTN)BaseOfStack, STACK_SIZE);

 

+

 

+ SwitchStack (

 

+ (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,

&nbs= p;

+ HobList.R= aw,

 

+ NULL= ,

&= nbsp;

+ TopOfS= tack

 

+ );<= o:p>

&nb= sp;

+}

 

--

2.27.0=

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